JP3879063B2 - 半導体装置およびその製造方法 - Google Patents

半導体装置およびその製造方法 Download PDF

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Publication number
JP3879063B2
JP3879063B2 JP2002170150A JP2002170150A JP3879063B2 JP 3879063 B2 JP3879063 B2 JP 3879063B2 JP 2002170150 A JP2002170150 A JP 2002170150A JP 2002170150 A JP2002170150 A JP 2002170150A JP 3879063 B2 JP3879063 B2 JP 3879063B2
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substrate
region
gate electrode
diffusion region
conductivity type
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Expired - Fee Related
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JP2002170150A
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English (en)
Japanese (ja)
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JP2004015003A (ja
Inventor
俊雄 野村
輝夫 鈴木
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Fujitsu Ltd
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Fujitsu Ltd
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Priority to JP2002170150A priority Critical patent/JP3879063B2/ja
Priority to US10/441,216 priority patent/US6897536B2/en
Priority to TW092113742A priority patent/TWI290364B/zh
Priority to CNB031408036A priority patent/CN1332447C/zh
Priority to KR1020030037043A priority patent/KR100902726B1/ko
Publication of JP2004015003A publication Critical patent/JP2004015003A/ja
Application granted granted Critical
Publication of JP3879063B2 publication Critical patent/JP3879063B2/ja
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0266—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements
    • H01L27/027—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements specially adapted to provide an electrical current path other than the field effect induced current path
    • H01L27/0277—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements specially adapted to provide an electrical current path other than the field effect induced current path involving a parasitic bipolar transistor triggered by the local electrical biasing of the layer acting as base of said parasitic bipolar transistor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
    • H01L29/7835—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
JP2002170150A 2002-06-11 2002-06-11 半導体装置およびその製造方法 Expired - Fee Related JP3879063B2 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2002170150A JP3879063B2 (ja) 2002-06-11 2002-06-11 半導体装置およびその製造方法
US10/441,216 US6897536B2 (en) 2002-06-11 2003-05-20 ESD protection circuit
TW092113742A TWI290364B (en) 2002-06-11 2003-05-21 ESD protection circuit
CNB031408036A CN1332447C (zh) 2002-06-11 2003-06-03 半导体器件及其制造方法
KR1020030037043A KR100902726B1 (ko) 2002-06-11 2003-06-10 반도체 장치 및 정전 방전 보호 장치

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002170150A JP3879063B2 (ja) 2002-06-11 2002-06-11 半導体装置およびその製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2006239383A Division JP2007005825A (ja) 2006-09-04 2006-09-04 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JP2004015003A JP2004015003A (ja) 2004-01-15
JP3879063B2 true JP3879063B2 (ja) 2007-02-07

Family

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Family Applications (1)

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JP2002170150A Expired - Fee Related JP3879063B2 (ja) 2002-06-11 2002-06-11 半導体装置およびその製造方法

Country Status (5)

Country Link
US (1) US6897536B2 (zh)
JP (1) JP3879063B2 (zh)
KR (1) KR100902726B1 (zh)
CN (1) CN1332447C (zh)
TW (1) TWI290364B (zh)

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JP4170210B2 (ja) * 2003-12-19 2008-10-22 Ｎｅｃエレクトロニクス株式会社 半導体装置
JP4636844B2 (ja) * 2004-10-07 2011-02-23 パナソニック株式会社 電子デバイスの製造方法
US7875933B2 (en) * 2005-03-29 2011-01-25 Infineon Technologies Ag Lateral bipolar transistor with additional ESD implant
JP2006339444A (ja) 2005-06-02 2006-12-14 Fujitsu Ltd 半導体装置及びその半導体装置の製造方法
US7646063B1 (en) * 2005-06-15 2010-01-12 Pmc-Sierra, Inc. Compact CMOS ESD layout techniques with either fully segmented salicide ballasting (FSSB) in the source and/or drain regions
DE102005028919B4 (de) * 2005-06-22 2010-07-01 Infineon Technologies Ag Verfahren zum Herstellen eines elektronischen Bauelementes und elektronisches Bauelement
US7595245B2 (en) * 2005-08-12 2009-09-29 Texas Instruments Incorporated Semiconductor device having a gate electrode material feature located adjacent a gate width side of its gate electrode and a method of manufacture therefor
US9035359B2 (en) 2006-03-09 2015-05-19 Tela Innovations, Inc. Semiconductor chip including region including linear-shaped conductive structures forming gate electrodes and having electrical connection areas arranged relative to inner region between transistors of different types and associated methods
US9563733B2 (en) 2009-05-06 2017-02-07 Tela Innovations, Inc. Cell circuit and layout with linear finfet structures
US7763534B2 (en) 2007-10-26 2010-07-27 Tela Innovations, Inc. Methods, structures and designs for self-aligning local interconnects used in integrated circuits
US9009641B2 (en) 2006-03-09 2015-04-14 Tela Innovations, Inc. Circuits with linear finfet structures
US9230910B2 (en) 2006-03-09 2016-01-05 Tela Innovations, Inc. Oversized contacts and vias in layout defined by linearly constrained topology
US8658542B2 (en) 2006-03-09 2014-02-25 Tela Innovations, Inc. Coarse grid design methods and structures
US7446352B2 (en) 2006-03-09 2008-11-04 Tela Innovations, Inc. Dynamic array architecture
US7956421B2 (en) 2008-03-13 2011-06-07 Tela Innovations, Inc. Cross-coupled transistor layouts in restricted gate level layout architecture
US8653857B2 (en) 2006-03-09 2014-02-18 Tela Innovations, Inc. Circuitry and layouts for XOR and XNOR logic
US8541879B2 (en) 2007-12-13 2013-09-24 Tela Innovations, Inc. Super-self-aligned contacts and method for making the same
US8448102B2 (en) 2006-03-09 2013-05-21 Tela Innovations, Inc. Optimizing layout of irregular structures in regular layout context
US8839175B2 (en) 2006-03-09 2014-09-16 Tela Innovations, Inc. Scalable meta-data objects
US7908578B2 (en) 2007-08-02 2011-03-15 Tela Innovations, Inc. Methods for designing semiconductor device with dynamic array section
KR100678693B1 (ko) * 2006-10-16 2007-02-02 주식회사 명보교구상사 알루미늄재 문틀 및 도어 결합구조
JP5217180B2 (ja) * 2007-02-20 2013-06-19 富士通セミコンダクター株式会社 静電放電保護装置の製造方法
US8667443B2 (en) 2007-03-05 2014-03-04 Tela Innovations, Inc. Integrated circuit cell library for multiple patterning
US8453094B2 (en) 2008-01-31 2013-05-28 Tela Innovations, Inc. Enforcement of semiconductor structure regularity for localized transistors and interconnect
US7939443B2 (en) 2008-03-27 2011-05-10 Tela Innovations, Inc. Methods for multi-wire routing and apparatus implementing same
SG192532A1 (en) 2008-07-16 2013-08-30 Tela Innovations Inc Methods for cell phasing and placement in dynamic array architecture and implementation of the same
US9122832B2 (en) 2008-08-01 2015-09-01 Tela Innovations, Inc. Methods for controlling microloading variation in semiconductor wafer layout and fabrication
JP2010251522A (ja) * 2009-04-15 2010-11-04 Panasonic Corp 半導体装置及びその製造方法
US8183107B2 (en) * 2009-05-27 2012-05-22 Globalfoundries Inc. Semiconductor devices with improved local matching and end resistance of RX based resistors
JP5202473B2 (ja) * 2009-08-18 2013-06-05 シャープ株式会社 半導体装置の製造方法
US8661392B2 (en) 2009-10-13 2014-02-25 Tela Innovations, Inc. Methods for cell boundary encroachment and layouts implementing the Same
DE102009049671B4 (de) * 2009-10-16 2020-02-27 Infineon Technologies Ag Integrierte Schaltung mit ESD Struktur
JP5567405B2 (ja) * 2010-06-21 2014-08-06 セイコーインスツル株式会社 櫛形の静電気保護用のｍｏｓ型半導体装置
US9159627B2 (en) 2010-11-12 2015-10-13 Tela Innovations, Inc. Methods for linewidth modification and apparatus implementing the same
US8610217B2 (en) * 2010-12-14 2013-12-17 International Business Machines Corporation Self-protected electrostatic discharge field effect transistor (SPESDFET), an integrated circuit incorporating the SPESDFET as an input/output (I/O) pad driver and associated methods of forming the SPESDFET and the integrated circuit
US8907432B2 (en) * 2012-02-10 2014-12-09 Richtek Technology Corporation Isolated device and manufacturing method thereof
US9378958B2 (en) 2012-12-28 2016-06-28 United Microelectronics Corporation Electrostatic discharge protection structure and fabricating method thereof
TWI565024B (zh) * 2012-12-28 2017-01-01 聯華電子股份有限公司 靜電放電防護結構
CN104882479B (zh) * 2014-02-28 2018-02-27 无锡华润上华科技有限公司 一种hvpmos器件及其制造方法
JP6600491B2 (ja) * 2014-07-31 2019-10-30 エイブリック株式会社 Ｅｓｄ素子を有する半導体装置
JP2017092297A (ja) * 2015-11-12 2017-05-25 ソニー株式会社 電界効果トランジスタ、および半導体装置
JP6838240B2 (ja) * 2017-01-19 2021-03-03 日立Astemo株式会社 電子装置
US11430749B2 (en) * 2018-10-31 2022-08-30 Infineon Technologies Ag ESD protection in an electronic device
US11289471B2 (en) 2020-08-24 2022-03-29 Globalfoundries U.S. Inc. Electrostatic discharge device
WO2023120317A1 (ja) * 2021-12-22 2023-06-29 キヤノン株式会社 半導体デバイス、光電変換システム、移動体

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Publication number Priority date Publication date Assignee Title
KR0146028B1 (ko) * 1994-08-31 1998-09-15 김정덕 칩저항기 전극도포장치
US6388288B1 (en) * 1998-03-30 2002-05-14 Texas Instruments Incorporated Integrating dual supply voltages using a single extra mask level
US6198142B1 (en) * 1998-07-31 2001-03-06 Intel Corporation Transistor with minimal junction capacitance and method of fabrication
JP3237626B2 (ja) 1998-10-02 2001-12-10 日本電気株式会社 半導体装置の製造方法
JP3408762B2 (ja) 1998-12-03 2003-05-19 シャープ株式会社 Ｓｏｉ構造の半導体装置及びその製造方法
KR100596765B1 (ko) * 1999-06-28 2006-07-04 주식회사 하이닉스반도체 정전방전 보호용 모스 트랜지스터의 제조 방법
US6218226B1 (en) * 2000-01-21 2001-04-17 Vanguard International Semiconductor Corporation Method of forming an ESD protection device
JP3416628B2 (ja) * 2000-04-27 2003-06-16 松下電器産業株式会社 半導体集積回路装置
CN1232711C (zh) 2002-02-06 2005-12-21 陆相成 轻质保温墙体砌块

Also Published As

Publication number Publication date
TWI290364B (en) 2007-11-21
CN1332447C (zh) 2007-08-15
JP2004015003A (ja) 2004-01-15
US20030227053A1 (en) 2003-12-11
CN1479374A (zh) 2004-03-03
KR20030095339A (ko) 2003-12-18
TW200401424A (en) 2004-01-16
US6897536B2 (en) 2005-05-24
KR100902726B1 (ko) 2009-06-15

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