JP3101297B2 - 半導体メモリ装置 - Google Patents
半導体メモリ装置Info
- Publication number
- JP3101297B2 JP3101297B2 JP02084609A JP8460990A JP3101297B2 JP 3101297 B2 JP3101297 B2 JP 3101297B2 JP 02084609 A JP02084609 A JP 02084609A JP 8460990 A JP8460990 A JP 8460990A JP 3101297 B2 JP3101297 B2 JP 3101297B2
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- bit line
- transistors
- channel mos
- sense amplifier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Databases & Information Systems (AREA)
- Dram (AREA)
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP02084609A JP3101297B2 (ja) | 1990-03-30 | 1990-03-30 | 半導体メモリ装置 |
| EP91104765A EP0449204B1 (en) | 1990-03-30 | 1991-03-26 | Dynamic type semiconductor memory device |
| DE69120447T DE69120447T2 (de) | 1990-03-30 | 1991-03-26 | Halbleiterspeicheranordnung von dynamischem Typus |
| US07/676,073 US5323345A (en) | 1990-03-30 | 1991-03-27 | Semiconductor memory device having read/write circuitry |
| KR1019910004966A KR940004515B1 (ko) | 1990-03-30 | 1991-03-29 | 다이나믹형 반도체 메모리장치 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP02084609A JP3101297B2 (ja) | 1990-03-30 | 1990-03-30 | 半導体メモリ装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH03283186A JPH03283186A (ja) | 1991-12-13 |
| JP3101297B2 true JP3101297B2 (ja) | 2000-10-23 |
Family
ID=13835437
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP02084609A Expired - Fee Related JP3101297B2 (ja) | 1990-03-30 | 1990-03-30 | 半導体メモリ装置 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US5323345A (enExample) |
| EP (1) | EP0449204B1 (enExample) |
| JP (1) | JP3101297B2 (enExample) |
| KR (1) | KR940004515B1 (enExample) |
| DE (1) | DE69120447T2 (enExample) |
Families Citing this family (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR940007639B1 (ko) * | 1991-07-23 | 1994-08-22 | 삼성전자 주식회사 | 분할된 입출력 라인을 갖는 데이타 전송회로 |
| KR940007640B1 (ko) * | 1991-07-31 | 1994-08-22 | 삼성전자 주식회사 | 공통 입출력선을 가지는 데이타 전송회로 |
| US5283760A (en) * | 1991-08-14 | 1994-02-01 | Samsung Electronics Co., Ltd. | Data transmission circuit |
| EP0579862A1 (de) * | 1992-07-24 | 1994-01-26 | Siemens Aktiengesellschaft | Integrierte Halbleiterspeicheranordnung |
| US5539701A (en) * | 1994-08-05 | 1996-07-23 | Nippon Steel Corporation | Sense circuit for semiconductor memory devices |
| TW299448B (enExample) * | 1995-07-20 | 1997-03-01 | Matsushita Electric Industrial Co Ltd | |
| KR0164359B1 (ko) * | 1995-09-06 | 1999-02-18 | 김광호 | 싸이클시간을 감소시키기 위한 반도체 메모리 장치 |
| DE19536486C2 (de) * | 1995-09-29 | 1997-08-07 | Siemens Ag | Bewerter- und Verstärkerschaltung |
| KR0153602B1 (ko) * | 1995-10-04 | 1998-12-01 | 김광호 | 반도체 메모리 장치의 데이타 고속 전송회로 |
| JP2000132969A (ja) | 1998-10-28 | 2000-05-12 | Nec Corp | ダイナミックメモリ装置 |
| JP2001006367A (ja) * | 1999-06-21 | 2001-01-12 | Mitsubishi Electric Corp | 半導体記憶装置 |
| JP2004095017A (ja) * | 2002-08-30 | 2004-03-25 | Fujitsu Ltd | センスアンプ |
| US7200061B2 (en) | 2002-11-08 | 2007-04-03 | Hitachi, Ltd. | Sense amplifier for semiconductor memory device |
| JP2004213830A (ja) * | 2003-01-08 | 2004-07-29 | Sony Corp | 半導体記憶装置 |
| KR100546373B1 (ko) * | 2003-08-28 | 2006-01-26 | 삼성전자주식회사 | 기준셀을 사용하지 않는 vss/vdd 비트라인프리차지 스킴을 갖는 반도체 메모리장치 |
| KR100753418B1 (ko) * | 2006-03-30 | 2007-08-30 | 주식회사 하이닉스반도체 | 로우 및 컬럼 어드레스를 이용하여 비트라인 감지 증폭동작을 제어하는 반도체 메모리 장치 |
| WO2022016476A1 (zh) * | 2020-07-23 | 2022-01-27 | 华为技术有限公司 | 一种位线读取电路及存储器 |
Family Cites Families (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5132930A (en) * | 1986-07-31 | 1992-07-21 | Mitsubishi Denki Kabushiki Kaisha | CMOS dynamic memory device having multiple flip-flop circuits selectively coupled to form sense amplifiers specific to neighboring data bit lines |
| JPS63175293A (ja) * | 1987-01-16 | 1988-07-19 | Hitachi Ltd | ダイナミツク型ram |
| JPH0799627B2 (ja) * | 1987-01-23 | 1995-10-25 | 松下電器産業株式会社 | 半導体メモリの書き込み読み出し回路 |
| JPS63183687A (ja) * | 1987-01-26 | 1988-07-29 | Hitachi Ltd | 半導体記憶装置 |
| JPS6414792A (en) * | 1987-07-08 | 1989-01-18 | Hitachi Ltd | Semiconductor storage device |
| JPH07105137B2 (ja) * | 1987-11-17 | 1995-11-13 | 日本電気株式会社 | 半導体メモリ |
| US4954992A (en) * | 1987-12-24 | 1990-09-04 | Mitsubishi Denki Kabushiki Kaisha | Random access memory having separate read out and write in bus lines for reduced access time and operating method therefor |
| JPH01199393A (ja) * | 1988-02-03 | 1989-08-10 | Mitsubishi Electric Corp | 半導体記憶装置 |
| JPH01173392A (ja) * | 1987-12-28 | 1989-07-10 | Toshiba Corp | 半導体記憶装置 |
| JP2644261B2 (ja) * | 1988-03-15 | 1997-08-25 | 株式会社東芝 | ダイナミック型半導体記憶装置 |
| JPH01264692A (ja) * | 1988-04-15 | 1989-10-20 | Hitachi Ltd | 半導体メモリ回路 |
| JPH0214487A (ja) * | 1988-06-30 | 1990-01-18 | Mitsubishi Electric Corp | 半導体記憶装置 |
| US5023842A (en) * | 1988-07-11 | 1991-06-11 | Kabushiki Kaisha Toshiba | Semiconductor memory having improved sense amplifiers |
| JP2681285B2 (ja) * | 1988-09-19 | 1997-11-26 | 富士通株式会社 | 半導体記憶装置 |
| US5146427A (en) * | 1989-08-30 | 1992-09-08 | Hitachi Ltd. | High speed semiconductor memory having a direct-bypass signal path |
-
1990
- 1990-03-30 JP JP02084609A patent/JP3101297B2/ja not_active Expired - Fee Related
-
1991
- 1991-03-26 DE DE69120447T patent/DE69120447T2/de not_active Expired - Fee Related
- 1991-03-26 EP EP91104765A patent/EP0449204B1/en not_active Expired - Lifetime
- 1991-03-27 US US07/676,073 patent/US5323345A/en not_active Expired - Lifetime
- 1991-03-29 KR KR1019910004966A patent/KR940004515B1/ko not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| DE69120447D1 (de) | 1996-08-01 |
| EP0449204A3 (enExample) | 1994-01-05 |
| JPH03283186A (ja) | 1991-12-13 |
| EP0449204B1 (en) | 1996-06-26 |
| DE69120447T2 (de) | 1996-12-05 |
| US5323345A (en) | 1994-06-21 |
| EP0449204A2 (en) | 1991-10-02 |
| KR940004515B1 (ko) | 1994-05-25 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20070818 Year of fee payment: 7 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20080818 Year of fee payment: 8 |
|
| LAPS | Cancellation because of no payment of annual fees |