JP2875334B2 - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JP2875334B2
JP2875334B2 JP9033290A JP9033290A JP2875334B2 JP 2875334 B2 JP2875334 B2 JP 2875334B2 JP 9033290 A JP9033290 A JP 9033290A JP 9033290 A JP9033290 A JP 9033290A JP 2875334 B2 JP2875334 B2 JP 2875334B2
Authority
JP
Japan
Prior art keywords
semiconductor element
lead frame
semiconductor device
thickness
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP9033290A
Other languages
English (en)
Other versions
JPH03289163A (ja
Inventor
竜治 河野
誠 北野
朝雄 西村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP9033290A priority Critical patent/JP2875334B2/ja
Priority to KR1019910005359A priority patent/KR940007951B1/ko
Publication of JPH03289163A publication Critical patent/JPH03289163A/ja
Priority to US08/075,928 priority patent/US5391916A/en
Priority to US08/369,486 priority patent/US5635756A/en
Application granted granted Critical
Publication of JP2875334B2 publication Critical patent/JP2875334B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49503—Lead-frames or other flat leads characterised by the die pad
    • H01L23/4951—Chip-on-leads or leads-on-chip techniques, i.e. inner lead fingers being used as die pad
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Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置に係り、特に半導体装置やメモリ
カードを薄型化するのに好適な半導体装置に関する。
〔従来の技術〕
従来、半導体装置はタブと呼ばれる半導体素子積載板
表面に接合用樹脂を塗布して半導体素子を積載してい
た。つまり半導体素子はその下面においてタブと接合さ
れていた。そしてその後にワイヤボンデイング等の諸工
程を経、封止用樹脂にて封止，成形していた。同技術に
おける薄型装置の例として、その厚さが1mmのものが既
に発表されている。
また、タブを排除した例として、樹脂シート中に素
子、及び内部リード先端部を埋め込み、温度サイクル性
を向上させた例（特開昭60−97645号公報参照）や、あ
るいは半導体素子と内部リード先端部との側面同士を接
合用樹脂を介して接合した例（特開平１−220464号公報
参照）等が知られている。
〔発明が解決しようとする課題〕 上記従来技術におけるタブでは、その上に接合用樹
脂、並びに半導体素子を積載せねばならず、現在のとこ
ろそれら各々の厚さを合計すると0.6〜0.7mm程度とな
る。更にワイヤボンデイング高さや、封止時の樹脂流入
バランス等を考慮すると、装置厚さを前記した1mmより
も薄くすることはかなり困難となつている。
また、特開昭60−97645号公報記載の技術は、基本的
に樹脂シート上に半導体素子を積載することが目的であ
り、従つて当技術によつて装置の薄型化が図れるという
ことはない。
更に、特開平１−220464号公報記載の技術は、リード
フレーム、及び接合用樹脂の厚みが素子の厚みに吸収さ
れることからその分の装置薄型化を図つた点で、本発明
と目的を同じくするものであるが、内部リード先端部に
接合用樹脂を塗布する手法であるため、その精度如何に
よつては、ワイヤボンデイングに支障をきたす、接着剤
でリード面が盛り上がる、あるいは接合後内部リードに
位置的バラツキが出る等の恐れがあつた。
本発明の目的は、上記問題点を克服し、信頼性を低下
させることなく薄型化の図れるリードフレーム及び半導
体装置とこれを組み込んだメモリーカードを提供するこ
とにある。
〔課題を解決するための手段〕
上記目的を達成するために本発明では、半導体素子を
リードフレーム上に積載することなく、半導体素子と、
リードフレーム中の素子配置位置周辺に設けられた素子
支持部（素子吊り部）との側面同士を、互いの絶縁が図
られる措置を講じて接合し、最終的に封止用樹脂にて封
止，成形するという構造をとるものである。
本願発明の半導体装置は、半導体素子と、半導体素子
に電気的に接続されるリードフレームと、半導体素子を
封止する樹脂とを備えた半導体装置においてリードフレ
ームは弾性絶縁部材で形成されており、リードフレーム
の半導体素子配置部には貫通孔が形成されており、貫通
孔には半導体素子が嵌合されており、半導体素子は半導
体素子の側面のみにおいて貫通孔の側面の弾性絶縁部材
の露出部と接合されていることを特徴とするものであ
る。
〔作用〕 上記手段をとれば、一般に半導体素子よりも薄いリー
ドフレームの厚みは、半導体素子の厚みに吸収され、し
かも装置厚さ方向の両者間に介在していた接合用樹脂
は、同幅方向について関与するものの、同厚さ方向には
関与しなくなる。そのため、例えば半導体素子，接合用
樹脂厚を従来と同一とするならば、必然的に装置の薄型
化が図られる。
〔実施例〕
以下、本発明の実施例を、図を用いて説明する。
第１図は、本発明の一実施例による装置の封止樹脂５
の一部を除去し、実装基板と対向する面を上に向けた状
態の部分断面斜視図である。また第２図は、同装置の厚
さ方向の断面図である。
本例においてリードフレーム2fsは、例えばシリコン
ゴム等の弾性絶縁部材で構成されており、その実装基板
と対向する面には、外部との電気接続のための導電パタ
ーン11が形成されている。また、半導体素子１は、同導
電パターン11との電気接続が容易なように、その電極形
成面が下向きとなるように配置されている。
半導体素子１はその側面のみにおいて素子吊り部２と
接合されており、同リードフレーム2fsは、前述のよう
に弾性絶縁部材であることから、両者の直接接合が行え
るものである。
基板への実装は第２図に示したように、装置上方より
外力Ｆを加えて導電パターン11を実装基板に押えつけた
状態で行うものである。
〔発明の効果〕
本発明によれば、半導体素子は従来の素子積載部（ダ
ブ）には積載されず、素子吊り部と、その側面を以つて
接合されるため、素子積載部，接合用樹脂夫々の厚さが
装置厚さに対して影響を及ぼさなくなる。
【図面の簡単な説明】
第１図は本発明の一実施例による半導体装置の部分断面
斜視図、第２図は本発明の一実施例による半導体装置の
厚さ方向の断面図である。 １……半導体装置、２……リード、2fs……弾性絶縁部
材製リードフレーム、４……ワイヤ、５……封止樹脂、
11……導電パターン。
───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 昭63−240055（ＪＰ，Ａ) 特開 平１−179351（ＪＰ，Ａ) 特開 平２−278857（ＪＰ，Ａ) 実開 昭62−109974（ＪＰ，Ｕ) 実開 昭51−163867（ＪＰ，Ｕ) (58)調査した分野(Int.Cl.6，ＤＢ名) H01L 23/50,21/52,23/12 G06K 19/00 B42D 15/10

Claims (1)

    (57)【特許請求の範囲】
  1. 【請求項１】半導体素子と、この半導体素子に電気的に
    接続されるリードフレームと、前記半導体素子を封止す
    る樹脂とを備えた半導体装置において、 前記リードフレームは弾性絶縁部材で形成されており、 前記リードフレームの前記半導体素子配置部には貫通孔
    が形成されており、 前記貫通孔には前記半導体素子が嵌合されており、 前記半導体素子は前記半導体素子の側面のみにおいて前
    記貫通孔の側面の弾性絶縁部材の露出部と接合されてい
    ることを特徴とする半導体装置。
JP9033290A 1990-04-06 1990-04-06 半導体装置 Expired - Lifetime JP2875334B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP9033290A JP2875334B2 (ja) 1990-04-06 1990-04-06 半導体装置
KR1019910005359A KR940007951B1 (ko) 1990-04-06 1991-04-03 반도체장치와 그 제조방법, 리이드프레임 및 메모리카드와 그 제조방법
US08/075,928 US5391916A (en) 1990-04-06 1993-06-14 Resin sealed type semiconductor device
US08/369,486 US5635756A (en) 1990-04-06 1995-01-06 Semiconductor device, lead frame therefor and memory card to provide a thin structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9033290A JP2875334B2 (ja) 1990-04-06 1990-04-06 半導体装置

Publications (2)

Publication Number Publication Date
JPH03289163A JPH03289163A (ja) 1991-12-19
JP2875334B2 true JP2875334B2 (ja) 1999-03-31

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Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR950005269B1 (ko) * 1992-07-29 1995-05-22 삼성전자주식회사 반도체 패키지 구조 및 제조방법
JP2677967B2 (ja) * 1993-12-08 1997-11-17 松下電器産業株式会社 半導体装置の製造方法
TW270213B (ja) * 1993-12-08 1996-02-11 Matsushita Electric Ind Co Ltd
TW344109B (en) * 1994-02-10 1998-11-01 Hitachi Ltd Methods of making semiconductor devices
US6686226B1 (en) 1994-02-10 2004-02-03 Hitachi, Ltd. Method of manufacturing a semiconductor device a ball grid array package structure using a supporting frame
US6002181A (en) * 1994-11-08 1999-12-14 Oki Electric Industry Co., Ltd. Structure of resin molded type semiconductor device with embedded thermal dissipator
US5667388A (en) * 1994-11-14 1997-09-16 Intel Corporation Printed circuit board adapter carrier for input/output cards
JPH08264685A (ja) * 1995-03-27 1996-10-11 Toshiba Corp 樹脂封止型半導体装置及びその製造方法
WO1996030943A1 (en) * 1995-03-31 1996-10-03 Maxim Integrated Products, Inc. Thin profile integrated circuit package
JP3290869B2 (ja) * 1995-11-16 2002-06-10 株式会社東芝 半導体装置
JPH09186286A (ja) * 1996-01-05 1997-07-15 Matsushita Electron Corp リードフレーム及び半導体チップの実装方法
US6288764B1 (en) * 1996-06-25 2001-09-11 Semiconductor Energy Laboratory Co., Ltd. Display device or electronic device having liquid crystal display panel
US6281026B1 (en) * 1997-11-14 2001-08-28 Niigata Seimitsu Co., Ltd. Semiconductor device and method for manufacturing the same
JP3147071B2 (ja) * 1998-01-19 2001-03-19 日本電気株式会社 半導体装置及びその製造方法
US6969623B1 (en) * 1998-05-19 2005-11-29 Niigata Seimitsu Co., Ltd. Semiconductor device and method for manufacturing the same
DE19844966A1 (de) * 1998-09-30 2000-01-13 Siemens Ag Halbleiterbauteil sowie dieses umfassender Chipkartenmodul
US6121672A (en) * 1998-11-03 2000-09-19 Utmc Microelectronic Systems Inc. Raised pedestal radiation shield for sensitive electronics
KR100309161B1 (ko) * 1999-10-11 2001-11-02 윤종용 메모리 카드 및 그 제조방법
US6431380B1 (en) 1999-10-21 2002-08-13 Rexam Medical Packaging Inc. Child-resistant flip top closure
JP3490987B2 (ja) * 2001-07-19 2004-01-26 沖電気工業株式会社 半導体パッケージおよびその製造方法
DE10227059A1 (de) * 2002-06-17 2004-01-15 Infineon Technologies Ag Verpackung für Halbleiter-Bauelemente und Verfahren zum Herstellen derselben
DE10323296A1 (de) * 2003-05-21 2005-01-05 Infineon Technologies Ag Anordnung zur Stress-Reduzierung bei substratbasierten Chip-Packages
US7307502B2 (en) * 2003-07-16 2007-12-11 Marvell World Trade Ltd. Power inductor with reduced DC current saturation
JP4307362B2 (ja) * 2004-11-10 2009-08-05 パナソニック株式会社 半導体装置、リードフレーム及びリードフレームの製造方法
ITMI20050139A1 (it) * 2005-01-31 2006-08-01 St Microelectronics Srl Dispositivo di memorizzazione dati rimovibile e relativo metodo di assemblaggio
JP2008141122A (ja) * 2006-12-05 2008-06-19 Denso Corp 樹脂モールド電子部品及びその製造方法
US9141157B2 (en) * 2011-10-13 2015-09-22 Texas Instruments Incorporated Molded power supply system having a thermally insulated component

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1907075B2 (de) * 1969-02-13 1974-07-04 Semikron Gesellschaft Fuer Gleichrichterbau Und Elektronik Mbh, 8500 Nuernberg Verfahren zur Herstellung von Halbleiter-Kleingleichrichtern
US4137546A (en) * 1977-10-14 1979-01-30 Plessey Incorporated Stamped lead frame for semiconductor packages
JPS6097645A (ja) * 1983-11-02 1985-05-31 Hitachi Ltd 樹脂封止型半導体装置およびその製造方法
US4680613A (en) * 1983-12-01 1987-07-14 Fairchild Semiconductor Corporation Low impedance package for integrated circuit die
US4635092A (en) * 1984-06-04 1987-01-06 General Electric Company Tape automated manufacture of power semiconductor devices
JPS61255043A (ja) * 1985-05-07 1986-11-12 Canon Inc 電子部品装置
US4816427A (en) * 1986-09-02 1989-03-28 Dennis Richard K Process for connecting lead frame to semiconductor device
US4766478A (en) * 1986-09-02 1988-08-23 Dennis Richard K Lead frame for semi-conductor device and process of connecting same
JPH0719872B2 (ja) * 1987-03-30 1995-03-06 三菱電機株式会社 半導体装置
JPS63198567U (ja) * 1987-06-12 1988-12-21
JPS6431449A (en) * 1987-07-27 1989-02-01 Mitsubishi Electric Corp Lead frame for semiconductor device
JPS6479351A (en) * 1987-09-19 1989-03-24 Toyota Motor Corp Heat-resisting steel for valve
JPH01122144A (ja) * 1987-11-06 1989-05-15 Hitachi Ltd プラスチック半導体パッケージ
JP2589520B2 (ja) * 1987-12-30 1997-03-12 富士通株式会社 樹脂封止型半導体装置の製造方法
JPH01220464A (ja) * 1988-02-29 1989-09-04 Hitachi Ltd 樹脂封止型半導体装置
US5068712A (en) * 1988-09-20 1991-11-26 Hitachi, Ltd. Semiconductor device
JPH01255260A (ja) * 1988-04-04 1989-10-12 Nec Corp リードフレームの構造
JPH02119255A (ja) * 1988-10-28 1990-05-07 Mitsubishi Electric Corp 半導体装置
US4916506A (en) * 1988-11-18 1990-04-10 Sprague Electric Company Integrated-circuit lead-frame package with low-resistance ground-lead and heat-sink means
US4985748A (en) * 1989-12-27 1991-01-15 Ag Communication Systems Corporation Universal tape for use in tape automated bonding system

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US5635756A (en) 1997-06-03
US5391916A (en) 1995-02-21
KR910019184A (ko) 1991-11-30
JPH03289163A (ja) 1991-12-19
KR940007951B1 (ko) 1994-08-29

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