WO1996030943A1 - Thin profile integrated circuit package - Google Patents

Thin profile integrated circuit package Download PDF

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Publication number
WO1996030943A1
WO1996030943A1 PCT/US1996/001766 US9601766W WO9630943A1 WO 1996030943 A1 WO1996030943 A1 WO 1996030943A1 US 9601766 W US9601766 W US 9601766W WO 9630943 A1 WO9630943 A1 WO 9630943A1
Authority
WO
WIPO (PCT)
Prior art keywords
electrical device
integrated circuit
recited
lead frame
lead
Prior art date
Application number
PCT/US1996/001766
Other languages
French (fr)
Inventor
Bret Young
Original Assignee
Maxim Integrated Products, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Maxim Integrated Products, Inc. filed Critical Maxim Integrated Products, Inc.
Publication of WO1996030943A1 publication Critical patent/WO1996030943A1/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49589Capacitor integral with or on the leadframe
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • H01L23/49548Cross section geometry
    • H01L23/49551Cross section geometry characterised by bent parts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19041Component type being a capacitor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19105Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate

Definitions

  • the present invention relates to an electrical circuit package.
  • Integrated circuits are commonly housed within a package that is mounted to a printed circuit board.
  • the packages are typically formed by a plastic injection molding process which encapsulates the integrated circuit with a hard plastic outer shell.
  • the package also contains a lead frame that is connected to the integrated circuit and partially encapsulated by the plastic shell.
  • the lead frame has a plurality of leads that extend from the plastic shell and are typically bent so that the leads can be soldered to a printed circuit board.
  • the integrated circuit receives power and digital signals from external sources through the printed circuit board and leads of the package.
  • the power provided to the IC may contain "noise" components that can adversely affect the performance of the circuit. It is sometimes desirable to incorporate a filter circuit into the IC package to remove the undesirable noise.
  • Figure 1 shows a prior art lead frame assembly which has a plurality of capacitors 2 mounted to the leads 4 of a lead frame 6.
  • the leads 4 are connected to an integrated circuit 8 that is mounted to a die paddle 10 of the lead frame 6.
  • the capacitors 2 are mounted to paddle portions 12 of the lead frame 6 and connected to the power and ground pins of the integrated circuit to filter the power supplied to the IC.
  • the lead frame assembly is encapsulated by a plastic shell (not shown) and typically cut and bent into a final configuration.
  • the lead frame assembly shown in Fig. 1 may be taller than a conventional package that does not have such capacitors.
  • the taller package will increase the thickness of the final product. It would be desirable to provide a relatively thin integrated circuit package that has capacitors connected to the lead frame of the package.
  • the present invention is an electrical circuit package which has electrical components connected to a lead frame in a manner that minimizes the height of the package.
  • the lead frame has a plurality of leads that are typically connected to an integrated circuit. Some of the leads have fingers that extend into openings within the lead frame.
  • the electrical components are coupled to the lead 'frame by pushing the components into the openings. The fingers within the openings are deflected by the insertion of the components. The deflected fingers create spring forces that push the electrical components into contact with the leads.
  • the integrated circuit and components are encapsulated by an outer plastic shell. The lead frame is then cut and typically bent into a final package configuration.
  • the assembled electrical components are symmetrically located about a center section of the lead frame, wherein a top portion of each component extends from a top surface of the lead frame and an equal bottom portion of each component extends from an opposite bottom surface of the lead frame. Locating the electrical components within openings of the lead frame reduces the profile of the assembled components and the overall height of the final package.
  • Figure 1 is a perspective view of a lead frame assembly of the prior art
  • Figure 2 is a perspective view of a lead frame assembly of the present invention
  • Figure 3 is an enlarged perspective view showing a pair of capacitors attached to a lead frame
  • Figure 4 is a cross-sectional view of the lead frame assembly within a plastic integrated circuit package.
  • Figure 2 shows a lead frame assembly 20 of the present invention.
  • the lead frame assembly 20 includes a lead frame 22 that contains a plurality of leads 24.
  • the leads 24 are typically copper conductors that are etched into a desired pattern.
  • the lead frame 22 has a die paddle 26 that supports an integrated circuit die 28.
  • the die 28 is typically bonded to the paddle 26 with an adhesive or epoxy.
  • the die 28 may be mounted to the die paddle 26 with a bonding agent that electrically grounds the integrated circuit 28 to the paddle 26.
  • the integrated circuit 28 typically has a plurality of bonding pads 30 located at the outer perimeter of the die 28.
  • the bonding pads 30 are connected to the leads 24 by bonding wires 32. Although wire bonds 32 are shown and described, it is to be understood that the lead frame 22 can be connected to the integrated circuit with other means such as tape automated bonding.
  • the lead frame assembly 20 has a pair of capacitors 32 and 34 attached to the lead frame 22.
  • Each capacitor typically has a pair of conductive terminal plates 36 separated by a dielectric material 37.
  • Capacitor 32 is located within an opening 38 formed by a pair of leads 40 and 42.
  • capacitor 34 is located within an opening 44 formed by a pair of leads 46 and 48.
  • the openings are preferably formed by C-shaped sections 50 of the leads.
  • the leads 40 and 48 are typically connected to the power pins of the integrated circuit 28.
  • the leads 42 and 46 are typically connected to the ground pins of the integrated circuit 28. Connecting the leads to power and ground allows the capacitors 32 and 34 to filter the power provided to the integrated circuit 28 from an external source.
  • capacitors are described as filtering power, it is to be understood that the leads may be connected to 'other pins of the integrated circuit 28. Additionally, although capacitors have been shown and described, other electrical devices such as resistors, transformer, etc. can be inserted into the openings of the lead frame 22.
  • the capacitors 32 and 34 are held in place by a plurality of fingers 52 that extend from the leads and into the openings.
  • the fingers 52 are deflected by inserting the capacitors into the openings.
  • the deflected fingers 52 create spring forces that push the capacitors into base portions 54 of the C-shaped lead sections 50.
  • the ' fingers 52 typically have a cross- sectional area that is smaller than the cross-sectional area of the leads, so that the fingers 52 are deflected without significantly deflecting the leads.
  • the inserted capacitors may also deflect the leads so that the terminal plates 36 are pressed into the neck portions 56 of the C-shaped sections 50.
  • the pressure between the terminal plates 36 and the C-shaped lead sections 50 create an electrical connection between the capacitors and the lead frame 22.
  • the spring forces also mechanically secure the capacitors to the lead frame.
  • the capacitors may be further secured to the lead frame by solder, epoxy, adhesive, etc.
  • the integrated circuit 28 and capacitors 32 and 34 are enclosed by an outer plastic shell 58 to create an integrated circuit package 60.
  • the outer shell 58 is typically formed by a plastic injection process. A portion of the leads 24 extend from the outer shell 58 so that the package can be soldered to a printed circuit board (not shown) .
  • the capacitors are typically inserted into the lead frame openings so that the center of each capacitor 32 is aligned with a center line CL of the lead frame 22.
  • a top portion of the capacitor 32 extends from a top surface of the lead frame 22 and another equal bottom portion of the capacitor 32 extends from an opposite bottom surface of the lead frame 22.
  • the profile of the assembled capacitors and the height of the overall package, as measured by the dimension "d" is minimized by placing the capacitors within the openings of the lead frame.
  • the package of the present invention is therefore thinner than conventional IC packages which have filtering capacitors incorporated therein.
  • the integrated circuit package is typically created by initially etching a lead frame from a sheet of copper.
  • the lead frame is typically part of a strip or sheet that has a plurality of lead frames which allow a number of packages to be simultaneously formed.
  • the copper sheet is preferably exposed to a double sided etching process to create the leads and the fingers 52, wherein the reduced area of the fingers is created by exposing only the fingers on one side of the sheet.
  • etching process is described, other methods such as laser ablation or stamping can be employed to create the lead frame and/or fingers.
  • the capacitors 32 and 34 are pushed into the openings 38 and 44, and secured to the lead frame 22 by the deflected fingers 52.
  • the lead frame 22 may be placed in a tool that limits the distance the capacitors can be pushed into the openings.
  • the die 28 is mounted to the die paddle 28 and connected to the leads 24 by the wire bonds 32.
  • the lead frame, die and capacitors are then placed in a mold that is injected with plastic.
  • the plastic is cured and the encapsulated IC and lead frame are removed from the mold.
  • the leads of the lead frame are then cut from the copper sheet and then typically bent into a final configuration.

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Geometry (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

An electrical circuit package has electrical components connected to a lead frame (22) in a manner that minimizes the height of the package. The lead frame has a plurality of leads (24) that are typically connected to an integrated circuit. Some of the leads have fingers that extend into openings within the lead frame. The electrical components (32, 34) are coupled to the lead frame by pushing the components into the openings. The fingers within the openings are deflected by the insertion of the components. The deflected fingers create spring forces that push the electrical components into contact with the leads. The integrated circuit components are encapsulated by an outer plastic shell. The lead frame is then cut and typically bent into a final package configuration.

Description

THIN PROFILE INTEGRATED CIRCUIT PACKAGE
BACKGROUND OP THE INVENTION
1 . FIELD OP THE INVENTION
The present invention relates to an electrical circuit package.
2. DESCRIPTION OF RELATED ART
Integrated circuits (ICs) are commonly housed within a package that is mounted to a printed circuit board. To minimize cost, the packages are typically formed by a plastic injection molding process which encapsulates the integrated circuit with a hard plastic outer shell. The package also contains a lead frame that is connected to the integrated circuit and partially encapsulated by the plastic shell. The lead frame has a plurality of leads that extend from the plastic shell and are typically bent so that the leads can be soldered to a printed circuit board.
The integrated circuit receives power and digital signals from external sources through the printed circuit board and leads of the package. The power provided to the IC may contain "noise" components that can adversely affect the performance of the circuit. It is sometimes desirable to incorporate a filter circuit into the IC package to remove the undesirable noise.
Figure 1 shows a prior art lead frame assembly which has a plurality of capacitors 2 mounted to the leads 4 of a lead frame 6. The leads 4 are connected to an integrated circuit 8 that is mounted to a die paddle 10 of the lead frame 6. The capacitors 2 are mounted to paddle portions 12 of the lead frame 6 and connected to the power and ground pins of the integrated circuit to filter the power supplied to the IC. The lead frame assembly is encapsulated by a plastic shell (not shown) and typically cut and bent into a final configuration.
The advent of cellular phones, personal communicators and other small electronic systems has increased the desire for relatively thin integrated circuit packages. Depending upon the size of the capacitors, the lead frame assembly shown in Fig. 1 may be taller than a conventional package that does not have such capacitors. The taller package will increase the thickness of the final product. It would be desirable to provide a relatively thin integrated circuit package that has capacitors connected to the lead frame of the package.
SUMMARY OF THE INVENTION
The present invention is an electrical circuit package which has electrical components connected to a lead frame in a manner that minimizes the height of the package. The lead frame has a plurality of leads that are typically connected to an integrated circuit. Some of the leads have fingers that extend into openings within the lead frame. The electrical components are coupled to the lead 'frame by pushing the components into the openings. The fingers within the openings are deflected by the insertion of the components. The deflected fingers create spring forces that push the electrical components into contact with the leads. The integrated circuit and components are encapsulated by an outer plastic shell. The lead frame is then cut and typically bent into a final package configuration. The assembled electrical components are symmetrically located about a center section of the lead frame, wherein a top portion of each component extends from a top surface of the lead frame and an equal bottom portion of each component extends from an opposite bottom surface of the lead frame. Locating the electrical components within openings of the lead frame reduces the profile of the assembled components and the overall height of the final package.
BRIEF DESCRIPTION OF THE DRAWINGS
The objects and advantages of the present invention will become more readily apparent to those ordinarily skilled in the art after reviewing the following detailed description and accompanying drawings, wherein:
Figure 1 is a perspective view of a lead frame assembly of the prior art;
Figure 2 is a perspective view of a lead frame assembly of the present invention;
Figure 3 is an enlarged perspective view showing a pair of capacitors attached to a lead frame;
Figure 4 is a cross-sectional view of the lead frame assembly within a plastic integrated circuit package.
DETAILED DESCRIPTION OF THE INVENTION
Referring to the drawings more particularly by reference numbers, Figure 2 shows a lead frame assembly 20 of the present invention. The lead frame assembly 20 includes a lead frame 22 that contains a plurality of leads 24. The leads 24 are typically copper conductors that are etched into a desired pattern.
The lead frame 22 has a die paddle 26 that supports an integrated circuit die 28. The die 28 is typically bonded to the paddle 26 with an adhesive or epoxy. In one embodiment, the die 28 may be mounted to the die paddle 26 with a bonding agent that electrically grounds the integrated circuit 28 to the paddle 26. The integrated circuit 28 typically has a plurality of bonding pads 30 located at the outer perimeter of the die 28. The bonding pads 30 are connected to the leads 24 by bonding wires 32. Although wire bonds 32 are shown and described, it is to be understood that the lead frame 22 can be connected to the integrated circuit with other means such as tape automated bonding.
As shown in Figure 3, the lead frame assembly 20 has a pair of capacitors 32 and 34 attached to the lead frame 22. Each capacitor typically has a pair of conductive terminal plates 36 separated by a dielectric material 37. Capacitor 32 is located within an opening 38 formed by a pair of leads 40 and 42. Likewise, capacitor 34 is located within an opening 44 formed by a pair of leads 46 and 48. The openings are preferably formed by C-shaped sections 50 of the leads. The leads 40 and 48 are typically connected to the power pins of the integrated circuit 28. The leads 42 and 46 are typically connected to the ground pins of the integrated circuit 28. Connecting the leads to power and ground allows the capacitors 32 and 34 to filter the power provided to the integrated circuit 28 from an external source. Although the capacitors are described as filtering power, it is to be understood that the leads may be connected to 'other pins of the integrated circuit 28. Additionally, although capacitors have been shown and described, other electrical devices such as resistors, transformer, etc. can be inserted into the openings of the lead frame 22.
The capacitors 32 and 34 are held in place by a plurality of fingers 52 that extend from the leads and into the openings. The fingers 52 are deflected by inserting the capacitors into the openings. The deflected fingers 52 create spring forces that push the capacitors into base portions 54 of the C-shaped lead sections 50. The' fingers 52 typically have a cross- sectional area that is smaller than the cross-sectional area of the leads, so that the fingers 52 are deflected without significantly deflecting the leads.
The inserted capacitors may also deflect the leads so that the terminal plates 36 are pressed into the neck portions 56 of the C-shaped sections 50. The pressure between the terminal plates 36 and the C-shaped lead sections 50 create an electrical connection between the capacitors and the lead frame 22. The spring forces also mechanically secure the capacitors to the lead frame. To improve the reliability of the package, the capacitors may be further secured to the lead frame by solder, epoxy, adhesive, etc.
As shown in Figure 4, the integrated circuit 28 and capacitors 32 and 34 are enclosed by an outer plastic shell 58 to create an integrated circuit package 60. The outer shell 58 is typically formed by a plastic injection process. A portion of the leads 24 extend from the outer shell 58 so that the package can be soldered to a printed circuit board (not shown) .
The capacitors are typically inserted into the lead frame openings so that the center of each capacitor 32 is aligned with a center line CL of the lead frame 22. A top portion of the capacitor 32 extends from a top surface of the lead frame 22 and another equal bottom portion of the capacitor 32 extends from an opposite bottom surface of the lead frame 22. The profile of the assembled capacitors and the height of the overall package, as measured by the dimension "d", is minimized by placing the capacitors within the openings of the lead frame. The package of the present invention is therefore thinner than conventional IC packages which have filtering capacitors incorporated therein. Although a plastic package is shown and described, it is to be understood that the lead frame assembly can be used in other types of integrated circuit packages.
The integrated circuit package is typically created by initially etching a lead frame from a sheet of copper. The lead frame is typically part of a strip or sheet that has a plurality of lead frames which allow a number of packages to be simultaneously formed. The copper sheet is preferably exposed to a double sided etching process to create the leads and the fingers 52, wherein the reduced area of the fingers is created by exposing only the fingers on one side of the sheet. Although an etching process is described, other methods such as laser ablation or stamping can be employed to create the lead frame and/or fingers.
After the lead frame 22 is created, the capacitors 32 and 34 are pushed into the openings 38 and 44, and secured to the lead frame 22 by the deflected fingers 52. The lead frame 22 may be placed in a tool that limits the distance the capacitors can be pushed into the openings.
After the capacitors are inserted into the openings, the die 28 is mounted to the die paddle 28 and connected to the leads 24 by the wire bonds 32. The lead frame, die and capacitors are then placed in a mold that is injected with plastic. The plastic is cured and the encapsulated IC and lead frame are removed from the mold. The leads of the lead frame are then cut from the copper sheet and then typically bent into a final configuration. Although the method of forming the package is described as initially inserting the capacitors into the openings and then mounting the die, it is to be understood that these steps may be reversed.
While certain exemplary embodiments have been described and shown in the accompanying drawings, it is to be understood that such embodiments are merely illustrative of and not restrictive on the broad invention, and that this invention not be limited to the specific constructions and arrangements shown and described, since various other modifications may occur to those ordinarily skilled in the art.

Claims

C LAIMSWhat is claimed is:
1. A lead frame assembly for an electrical circuit package, comprising: a lead frame that has a lead, said lead having a pair of opposing wire bonding surfaces and a contact surface that is essentially perpendicular to said wire bonding surfaces; and, an electrical device that is connected to said contact surface of said lead.
2. The assembly as recited in claim 1, wherein said electrical device is pressed into said contact surface by a spring force of a finger that extends from said lead.
3. The assembly as recited in claim 1, wherein said lead frame has a die paddle.
4. The assembly as recited in claim 1, wherein said electrical device is located between a pair of leads .
5. The assembly as recited in claim 1, wherein said electrical device is an electrically passive element.
6. The assembly as recited in claim 5, wherein said electrical device is a capacitor.
7. An integrated circuit package, comprising: an integrated circuit that has a plurality of bonding pads; a lead frame that has a lead which is connected to said integrated circuit, said lead having a pair of opposing wire bonding surfaces that are essentially parallel with said bonding pads of said integrated circuit and a contact surface that is essentially perpendicular to said wire bonding surfaces; an electrical device that is connected to said contact surface of said lead; and, an outer shell that encloses said integrated circuit. »
8. The package as recited in claim 7, wherein said electrical device is pressed into said contact surface by a spring force of a finger that extends from said lead.
9. The package as recited in claim 7, wherein said lead frame has a die paddle that can support said integrated circuit .
10. The package as recited in claim 7, wherein said electrical device is located between a pair of leads.
11. The package as recited in claim 7, wherein said electrical device is an electrically passive element.
12. The package as recited in claim 11, wherein said electrical device is a capacitor.
13. A lead frame assembly for an integrated circuit package, comprising: an electrical device; and, a lead frame that has a lead, said lead having a deflected finger that pushes said electrical device into contact with said lead.
14. The assembly as recited in claim 13, wherein said lead frame has a die paddle.
15. The assembly as recited in claim 13, wherein said electrical device is located between a pair of leads.
16. The assembly as recited in claim 13, wherein said electrical device is an electrically passive element.
17. The assembly as recited in claim 16, wherein said electrical device is a capacitor.
18. An integrated circuit package, comprising: an integrated circuit; an electrical device; a lead frame that has a lead connected to said integrated circuit, said lead having a deflected finger that pushes said electrical device into contact with said lead; and, an outer shell that encloses said integrated circuit.
19. The package as recited in claim 18, wherein said lead frame has a die paddle that supports said integrated circuit.
20. The package as recited in claim 18, wherein said electrical device is located between a pair of leads .
21. The package as recited in claim 18, wherein said electrical device is an electrically passive element.
22. The package as recited in claim 21, wherein said electrical device is a capacitor.
23. A method for assembling an integrated circuit package, comprising the steps of: a) creating a*lead frame that has a finger which extends from a lead, said finger extending into an opening of said lead frame; and, b) pushing an electrical device into said lead frame opening so that said finger is deflected and said electrical device is pushed into contact with said lead.
24. The method as recited in claim 23, further comprising the steps of mounting an integrated circuit to said lead frame and connecting said integrated circuit to said lead.
25. The method as recited in claim 24, further comprising the step of encapsulating said integrated circuit with a plastic outer shell.
AMENDED CLAIMS
[received by the International Bureau on 12 August 1996 (12.08.96) original claims 1-25 replaced by amended claims 1-21 (4 Pages)]
1. A lead frame assembly for an electrical circuit package, comprising: a lead frame that has a pair of leads that are separated by an opening; and, an electrical device that has a top surface and a pair of side surfaces, said electrical device being inserted into said opening so that said side surfaces deflect said leads in a direction essentially parallel with said top surface of said integrated circuit.
2. The assembly as recited in claim 1, wherein said electrical device is pressed into said leads by a spring force of a finger that extends from said lead.
3. The assembly as recited in claim 1, wherein said lead frame has a die paddle.
4. The assembly as recited in claim 1, wherein said electrical device is an electrically passive element .
5. The assembly as recited in claim 4, wherein said electrical device is a capacitor.
6. An integrated circuit package, comprising: an integrated circuit that has a plurality of bonding pads; a lead frame that has a pair of leads that are separated by an opening; an electrical device that has a top surface and a pair of side surfaces, said electrical device being inserted into said opening so that said side surfaces deflect said leads in a direction essentially parallel with said top surface of said integrated circuit; and, an outer shell that encloses said integrated circuit .
7. The package as recited in claim 6, wherein said electrical device is pressed into said leads by a spring force of a finger that extends from said lead.
8. The package as recited in claim 6, wherein said lead frame has a die paddle that can support said integrated circuit.
9. The package as recited in claim 6, wherein said electrical device is an electrically passive element.
10. The package as recited in claim 9, wherein said electrical device is a capacitor.
11. A lead frame assembly for an integrated circuit package, comprising: an electrical device; and, a lead frame that has a pair of leads that are separated by an opening that receives said electrical device, said lead frame having a deflected finger that extends from one of said leads and that pushes said electrical device into contact with said lead.
12. The assembly as recited in claim 11, wherein said lead frame has a die paddle.
13. The assembly as recited in claim 11, wherein said electrical device is an electrically passive element .
14. The assembly as recited in claim 13, wherein said electrical device is a capacitor. 15. An integrated circuit package, comprising: an integrated circuit; an electrical device; a lead frame that has a pair of leads that are connected to said integrated circuit and separated by an opening that receives said electrical device, said lead frame having a deflected finger that extends from one of said leads and that pushes said electrical device into contact with said lead; and, an outer shell tihat encloses said integrated circuit.
16. The package as recited in claim 15, wherein said lead frame has a die paddle that supports said integrated circuit .
17. The package as recited in claim 15, wherein said electrical device is an electrically passive element .
18. The package as recited in claim 27, wherein said electrical device is a capacitor.
19. A method for assembling an integrated circuit package, comprising the steps of: a) creating a lead frame that has a finger which extends from a lead, said finger extending into an opening of said lead frame; and, b) pushing an electrical device into said lead frame opening so that said finger is deflected and said electrical device is pushed into contact with said lead.
20. The method as recited in claim 19, further comprising the steps of mounting an integrated circuit to said lead frame and connecting said integrated circuit to said lead. 21. The method as recited in claim 20, further comprising the step of encapsulating said integrated circuit with a plastic outer shell.
PCT/US1996/001766 1995-03-31 1996-02-09 Thin profile integrated circuit package WO1996030943A1 (en)

Applications Claiming Priority (2)

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US41472695A 1995-03-31 1995-03-31
US08/414,726 1995-03-31

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1602130A2 (en) * 2003-02-21 2005-12-07 Advanced Interconnect Technologies Limited Lead frame with included passive devices
EP2041592A2 (en) * 2006-07-14 2009-04-01 Allegro Microsystems Inc. Methods and apparatus for passive attachment of components for integrated circuits
CN104183591A (en) * 2005-07-01 2014-12-03 维税-希力康克斯公司 Complete power management system implemented in a single surface mount package
US10211134B2 (en) 2011-09-30 2019-02-19 Mediatek Inc. Semiconductor package

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04317363A (en) * 1991-04-16 1992-11-09 Sony Corp Resin sealed semiconductor device without die pad and its manufacturing method
JPH0621318A (en) * 1992-07-06 1994-01-28 Seiko Epson Corp Lead frame for semiconductor device and manufacture of semiconductor device
US5391916A (en) * 1990-04-06 1995-02-21 Hitachi, Ltd. Resin sealed type semiconductor device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5391916A (en) * 1990-04-06 1995-02-21 Hitachi, Ltd. Resin sealed type semiconductor device
JPH04317363A (en) * 1991-04-16 1992-11-09 Sony Corp Resin sealed semiconductor device without die pad and its manufacturing method
JPH0621318A (en) * 1992-07-06 1994-01-28 Seiko Epson Corp Lead frame for semiconductor device and manufacture of semiconductor device

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1602130A2 (en) * 2003-02-21 2005-12-07 Advanced Interconnect Technologies Limited Lead frame with included passive devices
EP1602130A4 (en) * 2003-02-21 2008-11-05 Advanced Interconnect Tech Ltd Lead frame with included passive devices
US7489021B2 (en) 2003-02-21 2009-02-10 Advanced Interconnect Technologies Limited Lead frame with included passive devices
CN104183591A (en) * 2005-07-01 2014-12-03 维税-希力康克斯公司 Complete power management system implemented in a single surface mount package
EP2041592A2 (en) * 2006-07-14 2009-04-01 Allegro Microsystems Inc. Methods and apparatus for passive attachment of components for integrated circuits
EP2041592B1 (en) * 2006-07-14 2021-11-10 Allegro MicroSystems, LLC Methods and apparatus for passive attachment of components for integrated circuits
US10211134B2 (en) 2011-09-30 2019-02-19 Mediatek Inc. Semiconductor package

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