JP2788889B2 - 半導体装置における分離形成方法 - Google Patents
半導体装置における分離形成方法Info
- Publication number
- JP2788889B2 JP2788889B2 JP8038523A JP3852396A JP2788889B2 JP 2788889 B2 JP2788889 B2 JP 2788889B2 JP 8038523 A JP8038523 A JP 8038523A JP 3852396 A JP3852396 A JP 3852396A JP 2788889 B2 JP2788889 B2 JP 2788889B2
- Authority
- JP
- Japan
- Prior art keywords
- film
- forming
- insulating film
- semiconductor substrate
- transition metal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/01—Manufacture or treatment
- H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/69—Inorganic materials
- H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
- H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
- H10P14/6922—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P52/00—Grinding, lapping or polishing of wafers, substrates or parts of devices
- H10P52/40—Chemomechanical polishing [CMP]
- H10P52/403—Chemomechanical polishing [CMP] of conductive or resistive materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/01—Manufacture or treatment
- H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
- H10W10/014—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations
- H10W10/0148—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations comprising introducing impurities in side walls or bottom walls of trenches, e.g. for forming channel stoppers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/01—Manufacture or treatment
- H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
- H10W10/018—Manufacture or treatment of isolation regions comprising dielectric materials using selective deposition of crystalline silicon, e.g. using epitaxial growth of silicon
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/10—Isolation regions comprising dielectric materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/10—Isolation regions comprising dielectric materials
- H10W10/17—Isolation regions comprising dielectric materials formed using trench refilling with dielectric materials, e.g. shallow trench isolations
Landscapes
- Element Separation (AREA)
- Local Oxidation Of Silicon (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019950003727A KR100190367B1 (ko) | 1995-02-24 | 1995-02-24 | 소자분리막형성방법 |
| KR1995-3727 | 1995-02-24 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH08264634A JPH08264634A (ja) | 1996-10-11 |
| JP2788889B2 true JP2788889B2 (ja) | 1998-08-20 |
Family
ID=19408771
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8038523A Expired - Fee Related JP2788889B2 (ja) | 1995-02-24 | 1996-02-26 | 半導体装置における分離形成方法 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US5668043A (enExample) |
| JP (1) | JP2788889B2 (enExample) |
| KR (1) | KR100190367B1 (enExample) |
| CN (1) | CN1048821C (enExample) |
| TW (1) | TW301022B (enExample) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW365047B (en) * | 1996-10-04 | 1999-07-21 | Winbond Electronics Corp | Manufacturing method for simultaneously forming trenches of different depths |
| US6686283B1 (en) * | 1999-02-05 | 2004-02-03 | Texas Instruments Incorporated | Shallow trench isolation planarization using self aligned isotropic etch |
| US6306723B1 (en) | 2000-03-13 | 2001-10-23 | Chartered Semiconductor Manufacturing Ltd. | Method to form shallow trench isolations without a chemical mechanical polish |
| CN110223916B (zh) * | 2019-05-06 | 2022-03-08 | 瑞声科技(新加坡)有限公司 | 一种硅晶片的加工方法 |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5766627A (en) * | 1980-10-13 | 1982-04-22 | Toshiba Corp | Manufacture of semiconductor device |
| JPS5893220A (ja) * | 1981-11-30 | 1983-06-02 | Toshiba Corp | 半導体単結晶膜の製造方法 |
| JPH01321629A (ja) * | 1988-06-23 | 1989-12-27 | Nec Corp | 薄膜形成方法 |
| US5256591A (en) * | 1991-01-07 | 1993-10-26 | Gold Star Electron Co., Ltd. | Method for forming isolation region in semiconductor device using trench |
-
1995
- 1995-02-24 KR KR1019950003727A patent/KR100190367B1/ko not_active Expired - Fee Related
-
1996
- 1996-02-22 US US08/605,691 patent/US5668043A/en not_active Expired - Lifetime
- 1996-02-24 CN CN96101498A patent/CN1048821C/zh not_active Expired - Fee Related
- 1996-02-24 TW TW085102096A patent/TW301022B/zh active
- 1996-02-26 JP JP8038523A patent/JP2788889B2/ja not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US5668043A (en) | 1997-09-16 |
| JPH08264634A (ja) | 1996-10-11 |
| KR100190367B1 (ko) | 1999-06-01 |
| KR960032673A (ko) | 1996-09-17 |
| CN1048821C (zh) | 2000-01-26 |
| CN1134038A (zh) | 1996-10-23 |
| TW301022B (enExample) | 1997-03-21 |
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| Date | Code | Title | Description |
|---|---|---|---|
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
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| R250 | Receipt of annual fees |
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| LAPS | Cancellation because of no payment of annual fees | ||
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