CN1048821C - 形成半导体器件隔离的方法 - Google Patents
形成半导体器件隔离的方法 Download PDFInfo
- Publication number
- CN1048821C CN1048821C CN96101498A CN96101498A CN1048821C CN 1048821 C CN1048821 C CN 1048821C CN 96101498 A CN96101498 A CN 96101498A CN 96101498 A CN96101498 A CN 96101498A CN 1048821 C CN1048821 C CN 1048821C
- Authority
- CN
- China
- Prior art keywords
- substrate
- insulating barrier
- transition metal
- metal pad
- groove
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76294—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using selective deposition of single crystal silicon, i.e. SEG techniques
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
- H01L21/76237—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials introducing impurities in trench side or bottom walls, e.g. for forming channel stoppers or alter isolation behavior
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Element Separation (AREA)
- Local Oxidation Of Silicon (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR3727/95 | 1995-02-24 | ||
| KR3727/1995 | 1995-02-24 | ||
| KR1019950003727A KR100190367B1 (ko) | 1995-02-24 | 1995-02-24 | 소자분리막형성방법 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1134038A CN1134038A (zh) | 1996-10-23 |
| CN1048821C true CN1048821C (zh) | 2000-01-26 |
Family
ID=19408771
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN96101498A Expired - Fee Related CN1048821C (zh) | 1995-02-24 | 1996-02-24 | 形成半导体器件隔离的方法 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US5668043A (enExample) |
| JP (1) | JP2788889B2 (enExample) |
| KR (1) | KR100190367B1 (enExample) |
| CN (1) | CN1048821C (enExample) |
| TW (1) | TW301022B (enExample) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW365047B (en) * | 1996-10-04 | 1999-07-21 | Winbond Electronics Corp | Manufacturing method for simultaneously forming trenches of different depths |
| US6686283B1 (en) * | 1999-02-05 | 2004-02-03 | Texas Instruments Incorporated | Shallow trench isolation planarization using self aligned isotropic etch |
| US6306723B1 (en) | 2000-03-13 | 2001-10-23 | Chartered Semiconductor Manufacturing Ltd. | Method to form shallow trench isolations without a chemical mechanical polish |
| CN110223916B (zh) * | 2019-05-06 | 2022-03-08 | 瑞声科技(新加坡)有限公司 | 一种硅晶片的加工方法 |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5256591A (en) * | 1991-01-07 | 1993-10-26 | Gold Star Electron Co., Ltd. | Method for forming isolation region in semiconductor device using trench |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5766627A (en) * | 1980-10-13 | 1982-04-22 | Toshiba Corp | Manufacture of semiconductor device |
| JPS5893220A (ja) * | 1981-11-30 | 1983-06-02 | Toshiba Corp | 半導体単結晶膜の製造方法 |
| JPH01321629A (ja) * | 1988-06-23 | 1989-12-27 | Nec Corp | 薄膜形成方法 |
-
1995
- 1995-02-24 KR KR1019950003727A patent/KR100190367B1/ko not_active Expired - Fee Related
-
1996
- 1996-02-22 US US08/605,691 patent/US5668043A/en not_active Expired - Lifetime
- 1996-02-24 CN CN96101498A patent/CN1048821C/zh not_active Expired - Fee Related
- 1996-02-24 TW TW085102096A patent/TW301022B/zh active
- 1996-02-26 JP JP8038523A patent/JP2788889B2/ja not_active Expired - Fee Related
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5256591A (en) * | 1991-01-07 | 1993-10-26 | Gold Star Electron Co., Ltd. | Method for forming isolation region in semiconductor device using trench |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1134038A (zh) | 1996-10-23 |
| JP2788889B2 (ja) | 1998-08-20 |
| KR960032673A (ko) | 1996-09-17 |
| US5668043A (en) | 1997-09-16 |
| KR100190367B1 (ko) | 1999-06-01 |
| JPH08264634A (ja) | 1996-10-11 |
| TW301022B (enExample) | 1997-03-21 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C56 | Change in the name or address of the patentee |
Owner name: HYNIX SEMICONDUCTOR INC. Free format text: FORMER NAME OR ADDRESS: HYUNDAI ELECTRONICS INDUSTRIES CO., LTD. |
|
| CP01 | Change in the name or title of a patent holder |
Address after: Gyeonggi Do, South Korea Patentee after: Hairyoksa Semiconductor Co., Ltd. Address before: Gyeonggi Do, South Korea Patentee before: Hyundai Electronics Industries Co., Ltd. |
|
| C19 | Lapse of patent right due to non-payment of the annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |