JP2015188071A - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP2015188071A JP2015188071A JP2015045448A JP2015045448A JP2015188071A JP 2015188071 A JP2015188071 A JP 2015188071A JP 2015045448 A JP2015045448 A JP 2015045448A JP 2015045448 A JP2015045448 A JP 2015045448A JP 2015188071 A JP2015188071 A JP 2015188071A
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- circuit
- transistor
- film
- oxide semiconductor
- semiconductor film
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- 239000000395 magnesium oxide Substances 0.000 description 1
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- 230000014759 maintenance of location Effects 0.000 description 1
- 238000000691 measurement method Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 239000013081 microcrystal Substances 0.000 description 1
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- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000002159 nanocrystal Substances 0.000 description 1
- QEFYFXOXNSNQGX-UHFFFAOYSA-N neodymium atom Chemical compound [Nd] QEFYFXOXNSNQGX-UHFFFAOYSA-N 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- PVADDRMAFCOOPC-UHFFFAOYSA-N oxogermanium Chemical compound [Ge]=O PVADDRMAFCOOPC-UHFFFAOYSA-N 0.000 description 1
- BPUBBGLMJRNUCC-UHFFFAOYSA-N oxygen(2-);tantalum(5+) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ta+5].[Ta+5] BPUBBGLMJRNUCC-UHFFFAOYSA-N 0.000 description 1
- RVTZCBVAJQQJTK-UHFFFAOYSA-N oxygen(2-);zirconium(4+) Chemical compound [O-2].[O-2].[Zr+4] RVTZCBVAJQQJTK-UHFFFAOYSA-N 0.000 description 1
- PUDIUYLPXJFUGB-UHFFFAOYSA-N praseodymium atom Chemical compound [Pr] PUDIUYLPXJFUGB-UHFFFAOYSA-N 0.000 description 1
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- 238000005057 refrigeration Methods 0.000 description 1
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- VSZWPYCFIRKVQL-UHFFFAOYSA-N selanylidenegallium;selenium Chemical compound [Se].[Se]=[Ga].[Se]=[Ga] VSZWPYCFIRKVQL-UHFFFAOYSA-N 0.000 description 1
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- JBQYATWDVHIOAR-UHFFFAOYSA-N tellanylidenegermanium Chemical compound [Te]=[Ge] JBQYATWDVHIOAR-UHFFFAOYSA-N 0.000 description 1
- GZCRRIHWUXGPOV-UHFFFAOYSA-N terbium atom Chemical compound [Tb] GZCRRIHWUXGPOV-UHFFFAOYSA-N 0.000 description 1
- FRNOGLGSGLTDKL-UHFFFAOYSA-N thulium atom Chemical compound [Tm] FRNOGLGSGLTDKL-UHFFFAOYSA-N 0.000 description 1
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 1
- 229910001887 tin oxide Inorganic materials 0.000 description 1
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- 229910052723 transition metal Inorganic materials 0.000 description 1
- LXEXBJXDGVGRAR-UHFFFAOYSA-N trichloro(trichlorosilyl)silane Chemical compound Cl[Si](Cl)(Cl)[Si](Cl)(Cl)Cl LXEXBJXDGVGRAR-UHFFFAOYSA-N 0.000 description 1
- RGGPNXQUMRMPRA-UHFFFAOYSA-N triethylgallium Chemical compound CC[Ga](CC)CC RGGPNXQUMRMPRA-UHFFFAOYSA-N 0.000 description 1
- MCULRUJILOGHCJ-UHFFFAOYSA-N triisobutylaluminium Chemical compound CC(C)C[Al](CC(C)C)CC(C)C MCULRUJILOGHCJ-UHFFFAOYSA-N 0.000 description 1
- 230000008016 vaporization Effects 0.000 description 1
- NAWDYIZEMPQZHO-UHFFFAOYSA-N ytterbium Chemical compound [Yb] NAWDYIZEMPQZHO-UHFFFAOYSA-N 0.000 description 1
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Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
- G11C5/025—Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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Abstract
Description
本実施の形態では、本発明の一態様に係る構成の一例について説明する。
非単結晶半導体としては、非晶質シリコン、微結晶シリコン、多結晶シリコンなどの非単結晶シリコンや、非晶質ゲルマニウム、微結晶ゲルマニウム、多結晶ゲルマニウムなどの非単結晶ゲルマニウムなどを用いることができる。また、トランジスタ321、322、323は、OSトランジスタによって構成することもできる。上記のような半導体膜にチャネル形成領域が形成されるトランジスタは、絶縁層101上に形成することが可能であるため、論理回路130を絶縁層101上に形成することができる。これにより、記憶回路120上に絶縁層101を設け、絶縁層101上に論理回路130が設けた構成とすることができる。すなわち、記憶回路120と論理回路130を積層した構成とすることができる。
まず、記憶回路120[1,1]および記憶回路120[1,2]へのデータの書き込み動作について説明する。ここでは、記憶回路120[1,1]にハイレベルのデータを書き込み、記憶回路120[1,2]にローレベルのデータを書き込む場合について述べる。
次に、記憶回路120[1,1]および記憶回路120[1,2]からのデータの読み出し動作について説明する。ここでは、記憶回路120[1,1]からハイレベルのデータを読み出し、記憶回路120[1,2]からローレベルのデータを読み出す場合について述べる。
次に、論理回路130[1,1]からのデータの読み出し動作について説明する。ここでは、論理回路130[1,1]が、記憶回路120[1,1]に書き込まれたハイレベルのデータと記憶回路120[1,2]に書き込まれたローレベルのデータを入力信号として、否定論理積の演算結果を出力する場合について述べる。
本実施の形態では、本発明の一態様に係る半導体装置の構成の一例について説明する。
本実施の形態では、記憶回路または論理回路に用いることができるトランジスタの構成について説明する。
本実施の形態では、記憶回路または論理回路に用いることができるトランジスタの構成について説明する。
図10に、トランジスタ520、530の構成の一例を示す。なお、図10では、OSトランジスタであるトランジスタ530が、単結晶のシリコン基板にチャネル形成領域を有するトランジスタ(以下、Siトランジスタともいう)であるトランジスタ520上に形成されている場合を例示している。なお、このようにSiトランジスタとOSトランジスタが積層された構成は、回路30に適宜用いることができる。なお、本実施の形態では、図9(B)と同様に、トランジスタ520のゲートとトランジスタ530のソースまたはドレインの一方が接続された構成を示すが、これに限られない。トランジスタ520のソースまたはドレインの一方とトランジスタ530のゲートが接続されていてもよいし(図8(D)参照)、トランジスタ520のソースまたはドレインの一方とトランジスタ530のソースまたはドレインの一方が接続されていてもよいし(図9(A)参照)、トランジスタ520のゲートとトランジスタ530のゲートが接続されていてもよい(図9(C)参照)。
次いで、OSトランジスタの構成例について説明する。
以下では、酸化物半導体膜の構造について説明する。なお、以下の説明において、「平行」とは、二つの直線が−10°以上10°以下の角度で配置されている状態をいう。従って、−5°以上5°以下の場合も含まれる。また、「垂直」とは、二つの直線が80°以上100°以下の角度で配置されている状態をいう。従って、85°以上95°以下の場合も含まれる。また、本明細書において、結晶が三方晶または菱面体晶である場合、その結晶を六方晶系として表す。
まずは、CAAC−OS膜について説明する。
次に、多結晶酸化物半導体膜について説明する。
次に、微結晶酸化物半導体膜について説明する。
次に、非晶質酸化物半導体膜について説明する。
次に、単結晶酸化物半導体膜について説明する。
本実施の形態では、図10とは異なる構造を有する半導体装置の構造の一例について説明する。
他の実施の形態で開示された、導電膜、半導体膜、絶縁膜など様々な膜はスパッタ法やプラズマCVD法により形成することができるが、他の方法、例えば、熱CVD法により形成してもよい。熱CVD法の例としてMOCVD(Metal Organic Chemical Vapor Deposition)法やALD(Atomic Layer Deposition)法を使っても良い。
本発明の一態様に係る半導体装置は、表示機器、パーソナルコンピュータ、記録媒体を備えた画像再生装置(代表的にはDVD:Digital Versatile Disc等の記録媒体を再生し、その画像を表示しうるディスプレイを有する装置)に用いることができる。その他に、本発明の一態様に係る半導体装置を用いることができる電子機器として、携帯電話、携帯型を含むゲーム機、携帯情報端末、電子書籍端末、ビデオカメラ、デジタルスチルカメラ等のカメラ、ゴーグル型ディスプレイ(ヘッドマウントディスプレイ)、ナビゲーションシステム、音響再生装置(カーオーディオ、デジタルオーディオプレイヤー等)、複写機、ファクシミリ、プリンタ、プリンタ複合機、現金自動預け入れ払い機(ATM)、自動販売機、医療機器などが挙げられる。これら電子機器の具体例を図14に示す。
本明細書等の記載に関して、以下に説明する。
20 回路
30 回路
31 回路
32 回路
33 回路
40 キャッシュメモリ
41 回路
42 回路
50 主記憶装置
51 回路
52 回路
60 補助記憶装置
61 回路
62 回路
90 トランジスタ
91 絶縁膜
92a 酸化物半導体膜
92b 酸化物半導体膜
92c 酸化物半導体膜
93 導電膜
94 導電膜
95 絶縁膜
96 導電膜
97 基板
100 基板
101 絶縁層
102 導電層
103 絶縁層
111 回路
112 回路
113 回路
114 セルアレイ
120 記憶回路
130 論理回路
131 回路
140 論理回路
201 配線
202 配線
203 配線
301 トランジスタ
302 トランジスタ
303 回路
304 インバータ
305 インバータ
311 トランジスタ
312 トランジスタ
313 回路
314 インバータ
315 インバータ
321 トランジスタ
322 トランジスタ
323 トランジスタ
324 抵抗素子
331 トランジスタ
332 トランジスタ
333 トランジスタ
334 トランジスタ
341 トランジスタ
342 容量素子
411 トランジスタ
412 トランジスタ
413 抵抗素子
421 トランジスタ
422 トランジスタ
423 トランジスタ
424 抵抗素子
425 抵抗素子
431 トランジスタ
432 トランジスタ
433 トランジスタ
434 抵抗素子
435 抵抗素子
500 半導体基板
501 絶縁物
502 ウェル
503 ゲート絶縁膜
504 ゲート電極
505 不純物領域
506 層間絶縁層
507 酸化物半導体層
508 配線
509 ゲート絶縁膜
510 ゲート電極
511 層間絶縁層
512 配線
520 トランジスタ
530 トランジスタ
801 半導体基板
810 素子分離領域
811 絶縁膜
812 絶縁膜
813 絶縁膜
825 導電膜
826 導電膜
827 導電膜
834 導電膜
835 導電膜
836 導電膜
837 導電膜
844 導電膜
851 導電膜
852 導電膜
853 導電膜
861 絶縁膜
901 半導体膜
910 領域
911 領域
921 導電膜
922 導電膜
931 ゲート電極
962 ゲート絶縁膜
963 絶縁膜
1000 基板
1001 素子分離領域
1002 不純物領域
1003 不純物領域
1004 チャネル形成領域
1005 絶縁膜
1006 ゲート電極
1011 絶縁膜
1012 導電膜
1013 導電膜
1014 導電膜
1016 導電膜
1017 導電膜
1018 導電膜
1020 絶縁膜
1021 絶縁膜
1022 絶縁膜
1030 半導体膜
1030a 酸化物半導体膜
1030b 酸化物半導体膜
1030c 酸化物半導体膜
1031 ゲート絶縁膜
1032 導電膜
1033 導電膜
1034 ゲート電極
2010 電子銃室
2012 光学系
2014 試料室
2016 光学系
2018 カメラ
2020 観察室
2022 フィルム室
2024 電子
2028 物質
2032 蛍光板
5001 筐体
5002 筐体
5003 表示部
5004 表示部
5005 マイクロホン
5006 スピーカー
5007 操作キー
5008 スタイラス
5101 車体
5102 車輪
5103 ダッシュボード
5104 ライト
5301 筐体
5302 冷蔵室用扉
5303 冷凍室用扉
5401 筐体
5402 表示部
5403 キーボード
5404 ポインティングデバイス
5601 筐体
5602 筐体
5603 表示部
5604 表示部
5605 接続部
5606 操作キー
5801 筐体
5802 筐体
5803 表示部
5804 操作キー
5805 レンズ
5806 接続部
Claims (5)
- セルアレイを有し、
前記セルアレイは、第1の回路と、絶縁層を介して前記第1の回路上に設けられた第2の回路と、を有し、
前記第1の回路は、記憶回路を有し、
前記第2の回路は、論理回路を有し、
前記論理回路は、前記記憶回路と電気的に接続され、
前記論理回路は、前記記憶回路に記憶されたデータを入力信号として、論理演算を行う機能を有し、
前記第2の回路は、前記第1の回路と重なる領域を有する半導体装置。 - 請求項1において、
前記記憶回路に記憶されたデータと、前記論理演算の結果と、を中央処理装置に出力する機能を有する半導体装置。 - 請求項1又は2において、
前記記憶回路は、第1のトランジスタを有し、
前記論理回路は、第2のトランジスタを有し、
前記第1のトランジスタは、チャネル形成領域に単結晶半導体を含み、
前記第2のトランジスタは、チャネル形成領域に酸化物半導体を含む半導体装置。 - 請求項3において、
前記第1のトランジスタのソース又はドレインの一方は、前記第2のトランジスタのゲートと電気的に接続されている半導体装置。 - 請求項1乃至4のいずれか一項において、
記憶回路は、SRAMセルを有し、
前記論理回路は、AND回路、OR回路、NAND回路、NOR回路のいずれか、またはこれらを組み合わせた回路を有する半導体装置。
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JP2020074365A (ja) | 2020-05-14 |
US20150325285A1 (en) | 2015-11-12 |
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