JP2013517624A5 - - Google Patents
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- Publication number
- JP2013517624A5 JP2013517624A5 JP2012548940A JP2012548940A JP2013517624A5 JP 2013517624 A5 JP2013517624 A5 JP 2013517624A5 JP 2012548940 A JP2012548940 A JP 2012548940A JP 2012548940 A JP2012548940 A JP 2012548940A JP 2013517624 A5 JP2013517624 A5 JP 2013517624A5
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- leads
- dies
- lower lead
- die
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 claims 20
- 230000008878 coupling Effects 0.000 claims 11
- 238000010168 coupling process Methods 0.000 claims 11
- 238000005859 coupling reaction Methods 0.000 claims 11
- 229910000679 solder Inorganic materials 0.000 claims 8
- 239000004065 semiconductor Substances 0.000 claims 5
- 238000007789 sealing Methods 0.000 claims 3
- 239000003566 sealing material Substances 0.000 claims 3
- 238000004806 packaging method and process Methods 0.000 claims 2
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US29647110P | 2010-01-19 | 2010-01-19 | |
| US61/296,471 | 2010-01-19 | ||
| US12/730,230 | 2010-03-24 | ||
| US12/730,230 US8586419B2 (en) | 2010-01-19 | 2010-03-24 | Semiconductor packages including die and L-shaped lead and method of manufacture |
| PCT/US2010/059326 WO2011090574A2 (en) | 2010-01-19 | 2010-12-07 | Semiconductor package and method |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2014173498A Division JP2015057823A (ja) | 2010-01-19 | 2014-08-28 | 半導体パッケージおよび方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2013517624A JP2013517624A (ja) | 2013-05-16 |
| JP2013517624A5 true JP2013517624A5 (enExample) | 2013-11-21 |
| JP5607758B2 JP5607758B2 (ja) | 2014-10-15 |
Family
ID=44276982
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2012548940A Active JP5607758B2 (ja) | 2010-01-19 | 2010-12-07 | 半導体をパッケージングする方法 |
| JP2014173498A Pending JP2015057823A (ja) | 2010-01-19 | 2014-08-28 | 半導体パッケージおよび方法 |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2014173498A Pending JP2015057823A (ja) | 2010-01-19 | 2014-08-28 | 半導体パッケージおよび方法 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US8586419B2 (enExample) |
| EP (1) | EP2526565B1 (enExample) |
| JP (2) | JP5607758B2 (enExample) |
| KR (1) | KR101534463B1 (enExample) |
| CN (1) | CN102714201B (enExample) |
| WO (1) | WO2011090574A2 (enExample) |
Families Citing this family (23)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI453831B (zh) | 2010-09-09 | 2014-09-21 | 台灣捷康綜合有限公司 | 半導體封裝結構及其製造方法 |
| JP5333402B2 (ja) * | 2010-10-06 | 2013-11-06 | 三菱電機株式会社 | 半導体装置の製造方法 |
| CN102394232A (zh) * | 2011-11-29 | 2012-03-28 | 杭州矽力杰半导体技术有限公司 | 一种引线框架及应用其的芯片倒装封装装置 |
| US9589929B2 (en) | 2013-03-14 | 2017-03-07 | Vishay-Siliconix | Method for fabricating stack die package |
| US9966330B2 (en) | 2013-03-14 | 2018-05-08 | Vishay-Siliconix | Stack die package |
| KR101742896B1 (ko) * | 2013-03-14 | 2017-06-01 | 비쉐이-실리코닉스 | 스택 다이 패키지의 제조 방법 |
| CN103395735B (zh) * | 2013-08-05 | 2015-12-02 | 天津大学 | 微机电系统器件的封装结构 |
| CN103646937B (zh) * | 2013-12-05 | 2016-02-24 | 江苏长电科技股份有限公司 | 二次先蚀后镀金属框减法埋芯片倒装凸点结构及工艺方法 |
| CN103646938B (zh) * | 2013-12-05 | 2016-02-24 | 江苏长电科技股份有限公司 | 一次先镀后蚀金属框减法埋芯片倒装凸点结构及工艺方法 |
| CN103681582B (zh) * | 2013-12-05 | 2016-03-30 | 江苏长电科技股份有限公司 | 一次先蚀后镀金属框减法埋芯片正装凸点结构及工艺方法 |
| CN103646931B (zh) * | 2013-12-05 | 2016-06-29 | 江苏长电科技股份有限公司 | 一次先镀后蚀金属框减法埋芯片倒装平脚结构及工艺方法 |
| CN103646930B (zh) * | 2013-12-05 | 2016-02-24 | 江苏长电科技股份有限公司 | 二次先蚀后镀金属框减法埋芯片倒装平脚结构及工艺方法 |
| JP2015176871A (ja) * | 2014-03-12 | 2015-10-05 | 株式会社東芝 | 半導体装置及びその製造方法 |
| US9425304B2 (en) | 2014-08-21 | 2016-08-23 | Vishay-Siliconix | Transistor structure with improved unclamped inductive switching immunity |
| CN104952737B (zh) * | 2015-06-30 | 2017-12-26 | 通富微电子股份有限公司 | 一种具有铝带或l脚或凸起的封装框架结构及生产方法 |
| KR101734712B1 (ko) * | 2015-12-09 | 2017-05-11 | 현대자동차주식회사 | 파워모듈 |
| US9870985B1 (en) * | 2016-07-11 | 2018-01-16 | Amkor Technology, Inc. | Semiconductor package with clip alignment notch |
| JP6892796B2 (ja) * | 2017-07-07 | 2021-06-23 | 新光電気工業株式会社 | 電子部品装置及びその製造方法 |
| DE102019103281B4 (de) * | 2019-02-11 | 2023-03-16 | Infineon Technologies Ag | Verfahren zum bilden eines die-gehäuses |
| CN111725173A (zh) * | 2020-06-05 | 2020-09-29 | 杰群电子科技(东莞)有限公司 | 一种堆叠封装结构及堆叠封装结构的制造方法 |
| DE112021005639T5 (de) * | 2020-12-23 | 2023-08-03 | Rohm Co., Ltd. | Verfahren zur herstellung eines halbleiterbauteils und halbleiterbauteils |
| US12142548B2 (en) * | 2021-12-30 | 2024-11-12 | Alpha And Omega Semiconductor International Lp | Semiconductor package having mold locking feature |
| CN219123228U (zh) * | 2023-01-06 | 2023-06-02 | 上海凯虹科技电子有限公司 | 引线框架及封装结构 |
Family Cites Families (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH11177007A (ja) * | 1997-12-15 | 1999-07-02 | Hitachi Ltd | トランジスタパッケージ |
| JP4450800B2 (ja) * | 1999-02-17 | 2010-04-14 | 株式会社ルネサステクノロジ | 半導体装置の製造方法 |
| JP3314768B2 (ja) * | 1999-10-26 | 2002-08-12 | サンケン電気株式会社 | 半導体装置及びその製造方法 |
| US6734536B2 (en) | 2001-01-12 | 2004-05-11 | Rohm Co., Ltd. | Surface-mounting semiconductor device and method of making the same |
| JP2002222890A (ja) * | 2001-01-25 | 2002-08-09 | Rohm Co Ltd | 半導体装置およびその製造方法 |
| US6777800B2 (en) * | 2002-09-30 | 2004-08-17 | Fairchild Semiconductor Corporation | Semiconductor die package including drain clip |
| US7132734B2 (en) * | 2003-01-06 | 2006-11-07 | Micron Technology, Inc. | Microelectronic component assemblies and microelectronic component lead frame structures |
| JP4294405B2 (ja) * | 2003-07-31 | 2009-07-15 | 株式会社ルネサステクノロジ | 半導体装置 |
| US7238551B2 (en) * | 2004-11-23 | 2007-07-03 | Siliconix Incorporated | Method of fabricating semiconductor package including die interposed between cup-shaped lead frame having mesas and valleys |
| US7394150B2 (en) * | 2004-11-23 | 2008-07-01 | Siliconix Incorporated | Semiconductor package including die interposed between cup-shaped lead frame and lead frame having mesas and valleys |
| US20060108635A1 (en) | 2004-11-23 | 2006-05-25 | Alpha Omega Semiconductor Limited | Trenched MOSFETS with part of the device formed on a (110) crystal plane |
| JP4575955B2 (ja) * | 2004-11-23 | 2010-11-04 | シリコニックス インコーポレーテッド | 半導体パッケージ及びその製造方法 |
| US7394151B2 (en) * | 2005-02-15 | 2008-07-01 | Alpha & Omega Semiconductor Limited | Semiconductor package with plated connection |
| US20070132073A1 (en) * | 2005-12-09 | 2007-06-14 | Tiong Toong T | Device and method for assembling a top and bottom exposed packaged semiconductor |
| CN101326636A (zh) * | 2005-12-09 | 2008-12-17 | 飞兆半导体公司 | 用于组装顶部与底部暴露的封装半导体的装置和方法 |
| US7271470B1 (en) * | 2006-05-31 | 2007-09-18 | Infineon Technologies Ag | Electronic component having at least two semiconductor power devices |
| US20080036078A1 (en) | 2006-08-14 | 2008-02-14 | Ciclon Semiconductor Device Corp. | Wirebond-less semiconductor package |
| JP4365856B2 (ja) * | 2006-12-21 | 2009-11-18 | 株式会社オティックス | カムシャフトの支持構造及び支持部材 |
| US8035221B2 (en) * | 2007-11-08 | 2011-10-11 | Intersil Americas, Inc. | Clip mount for integrated circuit leadframes |
-
2010
- 2010-03-24 US US12/730,230 patent/US8586419B2/en active Active
- 2010-12-07 EP EP10844172.6A patent/EP2526565B1/en active Active
- 2010-12-07 WO PCT/US2010/059326 patent/WO2011090574A2/en not_active Ceased
- 2010-12-07 KR KR1020127017726A patent/KR101534463B1/ko active Active
- 2010-12-07 JP JP2012548940A patent/JP5607758B2/ja active Active
- 2010-12-07 CN CN201080061500.6A patent/CN102714201B/zh active Active
-
2014
- 2014-08-28 JP JP2014173498A patent/JP2015057823A/ja active Pending
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