JP2013077711A - 半導体装置および半導体装置の製造方法 - Google Patents

半導体装置および半導体装置の製造方法 Download PDF

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Publication number
JP2013077711A
JP2013077711A JP2011216930A JP2011216930A JP2013077711A JP 2013077711 A JP2013077711 A JP 2013077711A JP 2011216930 A JP2011216930 A JP 2011216930A JP 2011216930 A JP2011216930 A JP 2011216930A JP 2013077711 A JP2013077711 A JP 2013077711A
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JP
Japan
Prior art keywords
wiring
electrode
wafer
semiconductor device
aluminum
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Pending
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JP2011216930A
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English (en)
Japanese (ja)
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JP2013077711A5 (https=
Inventor
Kan Shimizu
完 清水
Keiji Inoue
啓司 井上
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Sony Corp
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Sony Corp
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Application filed by Sony Corp filed Critical Sony Corp
Priority to JP2011216930A priority Critical patent/JP2013077711A/ja
Priority to US13/587,317 priority patent/US9287311B2/en
Priority to EP12184812.1A priority patent/EP2575174A3/en
Priority to CN201810048763.1A priority patent/CN108110023B/zh
Priority to CN201210355337.5A priority patent/CN103035660B/zh
Publication of JP2013077711A publication Critical patent/JP2013077711A/ja
Publication of JP2013077711A5 publication Critical patent/JP2013077711A5/ja
Priority to US15/057,375 priority patent/US9865639B2/en
Priority to US15/862,366 priority patent/US10586823B2/en
Priority to US16/750,810 priority patent/US11139331B2/en
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/80—Constructional details of image sensors
    • H10F39/811—Interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H10W20/0234—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias comprising etching via holes that stop on pads or on electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H10W20/0242—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias comprising etching via holes from the back sides of the chips, wafers or substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/0198—Manufacture or treatment batch processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W99/00—Subject matter not provided for in other groups of this subclass

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Solid State Image Pick-Up Elements (AREA)
JP2011216930A 2011-09-30 2011-09-30 半導体装置および半導体装置の製造方法 Pending JP2013077711A (ja)

Priority Applications (8)

Application Number Priority Date Filing Date Title
JP2011216930A JP2013077711A (ja) 2011-09-30 2011-09-30 半導体装置および半導体装置の製造方法
US13/587,317 US9287311B2 (en) 2011-09-30 2012-08-16 Semiconductor device and semiconductor-device manufacturing method
EP12184812.1A EP2575174A3 (en) 2011-09-30 2012-09-18 Semiconductor device and semiconductor-device manufacturing method
CN201810048763.1A CN108110023B (zh) 2011-09-30 2012-09-21 半导体器件和电子器件
CN201210355337.5A CN103035660B (zh) 2011-09-30 2012-09-21 半导体器件和半导体器件制造方法
US15/057,375 US9865639B2 (en) 2011-09-30 2016-03-01 Semiconductor device and semiconductor-device manufacturing method
US15/862,366 US10586823B2 (en) 2011-09-30 2018-01-04 Semiconductor device and semiconductor-device manufacturing method
US16/750,810 US11139331B2 (en) 2011-09-30 2020-01-23 Semiconductor device and semiconductor-device manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2011216930A JP2013077711A (ja) 2011-09-30 2011-09-30 半導体装置および半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JP2013077711A true JP2013077711A (ja) 2013-04-25
JP2013077711A5 JP2013077711A5 (https=) 2014-11-06

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JP2011216930A Pending JP2013077711A (ja) 2011-09-30 2011-09-30 半導体装置および半導体装置の製造方法

Country Status (4)

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US (4) US9287311B2 (https=)
EP (1) EP2575174A3 (https=)
JP (1) JP2013077711A (https=)
CN (2) CN108110023B (https=)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016072612A (ja) * 2014-09-26 2016-05-09 信越化学工業株式会社 ウエハ加工体、ウエハ加工用仮接着材、及び薄型ウエハの製造方法
WO2017150146A1 (ja) * 2016-02-29 2017-09-08 パナソニック・タワージャズセミコンダクター株式会社 半導体装置及びその製造方法
JP2021535613A (ja) * 2018-09-04 2021-12-16 中芯集成電路（寧波）有限公司 ウェハレベルパッケージ方法及びパッケージ構造

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8736069B2 (en) * 2012-08-23 2014-05-27 Macronix International Co., Ltd. Multi-level vertical plug formation with stop layers of increasing thicknesses
JP6041607B2 (ja) 2012-09-28 2016-12-14 キヤノン株式会社 半導体装置の製造方法
JP6128787B2 (ja) * 2012-09-28 2017-05-17 キヤノン株式会社 半導体装置
US8987914B2 (en) 2013-02-07 2015-03-24 Macronix International Co., Ltd. Conductor structure and method
US20140252561A1 (en) * 2013-03-08 2014-09-11 Qualcomm Incorporated Via-enabled package-on-package
US8993429B2 (en) 2013-03-12 2015-03-31 Macronix International Co., Ltd. Interlayer conductor structure and method
US9214351B2 (en) 2013-03-12 2015-12-15 Macronix International Co., Ltd. Memory architecture of thin film 3D array
US9117526B2 (en) 2013-07-08 2015-08-25 Macronix International Co., Ltd. Substrate connection of three dimensional NAND for improving erase performance
US9070447B2 (en) 2013-09-26 2015-06-30 Macronix International Co., Ltd. Contact structure and forming method
US8970040B1 (en) 2013-09-26 2015-03-03 Macronix International Co., Ltd. Contact structure and forming method
US9343322B2 (en) 2014-01-17 2016-05-17 Macronix International Co., Ltd. Three dimensional stacking memory film structure
US9405089B2 (en) * 2014-05-22 2016-08-02 Texas Instruments Incorporated High-temperature isotropic plasma etching process to prevent electrical shorts
US9721964B2 (en) 2014-06-05 2017-08-01 Macronix International Co., Ltd. Low dielectric constant insulating material in 3D memory
US9356040B2 (en) 2014-06-27 2016-05-31 Macronix International Co., Ltd. Junction formation for vertical gate 3D NAND memory
CN104332464B (zh) * 2014-08-28 2017-06-06 武汉新芯集成电路制造有限公司 一种功率器件与控制器件的集成工艺
US9379129B1 (en) 2015-04-13 2016-06-28 Macronix International Co., Ltd. Assist gate structures for three-dimensional (3D) vertical gate array memory structure
US9478259B1 (en) 2015-05-05 2016-10-25 Macronix International Co., Ltd. 3D voltage switching transistors for 3D vertical gate memory array
KR102290020B1 (ko) * 2015-06-05 2021-08-19 삼성전자주식회사 스택드 칩 구조에서 소프트 데이터 페일 분석 및 구제 기능을 제공하는 반도체 메모리 장치
US9425209B1 (en) 2015-09-04 2016-08-23 Macronix International Co., Ltd. Multilayer 3-D structure with mirror image landing regions
CN106505030B (zh) * 2015-09-06 2019-07-26 中芯国际集成电路制造(上海)有限公司 硅通孔结构的制备方法
WO2017126319A1 (ja) * 2016-01-18 2017-07-27 ソニー株式会社 固体撮像素子及び電子機器
US10296698B2 (en) * 2016-12-14 2019-05-21 Globalfoundries Inc. Forming multi-sized through-silicon-via (TSV) structures
US11488840B2 (en) * 2021-01-11 2022-11-01 Nanya Technology Corporation Wafer-to-wafer interconnection structure and method of manufacturing the same

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06244186A (ja) * 1993-02-16 1994-09-02 Kawasaki Steel Corp 多層配線構造の半導体装置及びその製造方法
JP2000021892A (ja) * 1998-06-26 2000-01-21 Nec Corp 半導体装置の製造方法
JP2000353703A (ja) * 1999-06-11 2000-12-19 Sony Corp 半導体装置の製造方法
JP2001093976A (ja) * 1999-09-21 2001-04-06 Nec Corp 半導体装置およびその製造方法
JP2010514177A (ja) * 2006-12-20 2010-04-30 ウードゥヴェ セミコンダクターズ 高集積密度画像センサの製造プロセス
JP2011077085A (ja) * 2009-09-29 2011-04-14 Fujitsu Semiconductor Ltd 半導体装置の製造方法
JP2011096851A (ja) * 2009-10-29 2011-05-12 Sony Corp 半導体装置とその製造方法、及び電子機器
JP2011138841A (ja) * 2009-12-26 2011-07-14 Canon Inc 固体撮像装置および撮像システム

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2947818B2 (ja) * 1988-07-27 1999-09-13 株式会社日立製作所 微細孔への金属穴埋め方法
US5262354A (en) 1992-02-26 1993-11-16 International Business Machines Corporation Refractory metal capped low resistivity metal conductor lines and vias
US6285082B1 (en) 1995-01-03 2001-09-04 International Business Machines Corporation Soft metal conductor
US6565729B2 (en) * 1998-03-20 2003-05-20 Semitool, Inc. Method for electrochemically depositing metal on a semiconductor workpiece
JP4083921B2 (ja) * 1998-05-29 2008-04-30 株式会社東芝 半導体装置の製造方法
US6727593B2 (en) * 2001-03-01 2004-04-27 Kabushiki Kaisha Toshiba Semiconductor device with improved bonding
JP4123415B2 (ja) * 2002-05-20 2008-07-23 ソニー株式会社 固体撮像装置
JP2004273523A (ja) * 2003-03-05 2004-09-30 Renesas Technology Corp 配線接続構造
US20060246699A1 (en) * 2005-03-18 2006-11-02 Weidman Timothy W Process for electroless copper deposition on a ruthenium seed
US20060244138A1 (en) * 2005-04-27 2006-11-02 International Business Machines Corporation Techniques for improving bond pad performance
JP4280277B2 (ja) * 2006-09-28 2009-06-17 株式会社神戸製鋼所 表示デバイスの製法
US7791198B2 (en) * 2007-02-20 2010-09-07 Nec Electronics Corporation Semiconductor device including a coupling region which includes layers of aluminum and copper alloys
JP4600576B2 (ja) * 2008-05-08 2010-12-15 株式会社デンソー 半導体装置およびその製造方法
JP2009295676A (ja) * 2008-06-03 2009-12-17 Oki Semiconductor Co Ltd 半導体装置及びその製造方法
JP2010080897A (ja) * 2008-09-29 2010-04-08 Panasonic Corp 半導体装置及びその製造方法
JP5985136B2 (ja) 2009-03-19 2016-09-06 ソニー株式会社 半導体装置とその製造方法、及び電子機器
JP5853351B2 (ja) 2010-03-25 2016-02-09 ソニー株式会社 半導体装置、半導体装置の製造方法、及び電子機器
US20120001336A1 (en) * 2010-07-02 2012-01-05 Texas Instruments Incorporated Corrosion-resistant copper-to-aluminum bonds
JP5640630B2 (ja) 2010-10-12 2014-12-17 ソニー株式会社 固体撮像装置、固体撮像装置の製造方法、及び電子機器

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06244186A (ja) * 1993-02-16 1994-09-02 Kawasaki Steel Corp 多層配線構造の半導体装置及びその製造方法
JP2000021892A (ja) * 1998-06-26 2000-01-21 Nec Corp 半導体装置の製造方法
JP2000353703A (ja) * 1999-06-11 2000-12-19 Sony Corp 半導体装置の製造方法
JP2001093976A (ja) * 1999-09-21 2001-04-06 Nec Corp 半導体装置およびその製造方法
JP2010514177A (ja) * 2006-12-20 2010-04-30 ウードゥヴェ セミコンダクターズ 高集積密度画像センサの製造プロセス
JP2011077085A (ja) * 2009-09-29 2011-04-14 Fujitsu Semiconductor Ltd 半導体装置の製造方法
JP2011096851A (ja) * 2009-10-29 2011-05-12 Sony Corp 半導体装置とその製造方法、及び電子機器
JP2011138841A (ja) * 2009-12-26 2011-07-14 Canon Inc 固体撮像装置および撮像システム

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016072612A (ja) * 2014-09-26 2016-05-09 信越化学工業株式会社 ウエハ加工体、ウエハ加工用仮接着材、及び薄型ウエハの製造方法
WO2017150146A1 (ja) * 2016-02-29 2017-09-08 パナソニック・タワージャズセミコンダクター株式会社 半導体装置及びその製造方法
KR20180110011A (ko) * 2016-02-29 2018-10-08 타워재즈 파나소닉 세미컨덕터 컴퍼니 리미티드 반도체 장치 및 그 제조방법
CN108701614A (zh) * 2016-02-29 2018-10-23 Towerjazz松下半导体有限公司 半导体装置及其制造方法
JPWO2017150146A1 (ja) * 2016-02-29 2018-12-20 パナソニック・タワージャズセミコンダクター株式会社 半導体装置及びその製造方法
US10483125B2 (en) 2016-02-29 2019-11-19 Towerjazz Panasonic Semiconductor Co., Ltd. Semiconductor device and method for manufacturing same
KR102116060B1 (ko) 2016-02-29 2020-05-27 타워재즈 파나소닉 세미컨덕터 컴퍼니 리미티드 반도체 장치 및 그 제조방법
JP2021535613A (ja) * 2018-09-04 2021-12-16 中芯集成電路（寧波）有限公司 ウェハレベルパッケージ方法及びパッケージ構造
US11450582B2 (en) 2018-09-04 2022-09-20 Ningbo Semiconductor International Corporation Wafer-level package structure

Also Published As

Publication number Publication date
EP2575174A3 (en) 2013-08-21
US20180130842A1 (en) 2018-05-10
CN108110023B (zh) 2019-08-09
CN103035660B (zh) 2018-04-17
US10586823B2 (en) 2020-03-10
US20160181303A1 (en) 2016-06-23
CN108110023A (zh) 2018-06-01
US11139331B2 (en) 2021-10-05
CN103035660A (zh) 2013-04-10
EP2575174A2 (en) 2013-04-03
US9287311B2 (en) 2016-03-15
US20130082341A1 (en) 2013-04-04
US9865639B2 (en) 2018-01-09
US20200161362A1 (en) 2020-05-21

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