JP2013008715A - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP2013008715A JP2013008715A JP2011138448A JP2011138448A JP2013008715A JP 2013008715 A JP2013008715 A JP 2013008715A JP 2011138448 A JP2011138448 A JP 2011138448A JP 2011138448 A JP2011138448 A JP 2011138448A JP 2013008715 A JP2013008715 A JP 2013008715A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- type
- source
- contact
- drain
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
- 239000004065 semiconductor Substances 0.000 title claims description 39
- 239000010410 layer Substances 0.000 claims abstract description 337
- 239000011229 interlayer Substances 0.000 claims abstract description 24
- 229910052751 metal Inorganic materials 0.000 claims abstract description 9
- 239000002184 metal Substances 0.000 claims abstract description 9
- 229910021332 silicide Inorganic materials 0.000 claims abstract description 9
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims abstract description 9
- 238000002955 isolation Methods 0.000 claims description 16
- 239000000758 substrate Substances 0.000 claims description 6
- 230000003071 parasitic effect Effects 0.000 abstract description 21
- 238000009413 insulation Methods 0.000 abstract 1
- 229910021341 titanium silicide Inorganic materials 0.000 description 36
- 230000005611 electricity Effects 0.000 description 23
- 230000003068 static effect Effects 0.000 description 23
- 230000000052 comparative effect Effects 0.000 description 13
- 230000015556 catabolic process Effects 0.000 description 10
- 230000002093 peripheral effect Effects 0.000 description 7
- 239000008186 active pharmaceutical agent Substances 0.000 description 6
- 230000001681 protective effect Effects 0.000 description 5
- 229910052782 aluminium Inorganic materials 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 3
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical group [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- 230000003111 delayed effect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000002784 hot electron Substances 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 125000006850 spacer group Chemical group 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- 229910052719 titanium Inorganic materials 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- UGACIEPFGXRWCH-UHFFFAOYSA-N [Si].[Ti] Chemical compound [Si].[Ti] UGACIEPFGXRWCH-UHFFFAOYSA-N 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 238000009751 slip forming Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0266—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements
- H01L27/027—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements specially adapted to provide an electrical current path other than the field effect induced current path
- H01L27/0277—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements specially adapted to provide an electrical current path other than the field effect induced current path involving a parasitic bipolar transistor triggered by the local electrical biasing of the layer acting as base of said parasitic bipolar transistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0207—Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
- H01L29/0692—Surface layout
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1025—Channel region of field-effect devices
- H01L29/1029—Channel region of field-effect devices of field-effect transistors
- H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
- H01L29/1041—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a non-uniform doping structure in the channel region surface
- H01L29/1045—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a non-uniform doping structure in the channel region surface the doping structure being parallel to the channel length, e.g. DMOS like
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/107—Substrate region of field-effect devices
- H01L29/1075—Substrate region of field-effect devices of field-effect transistors
- H01L29/1079—Substrate region of field-effect devices of field-effect transistors with insulated gate
- H01L29/1087—Substrate region of field-effect devices of field-effect transistors with insulated gate characterised by the contact structure of the substrate region, e.g. for controlling or preventing bipolar effect
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823418—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
- H01L21/823425—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures manufacturing common source or drain regions between a plurality of conductor-insulator-semiconductor structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
- H01L29/41758—Source or drain electrodes for field effect devices for lateral devices with structured layout for source or drain region, i.e. the source or drain region having cellular, interdigitated or ring structure or being curved or angular
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42372—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
- H01L29/4238—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out characterised by the surface lay-out
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4916—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen
- H01L29/4925—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement
- H01L29/4933—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement with a silicide layer contacting the silicon layer, e.g. Polycide gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/665—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using self aligned silicidation, i.e. salicide
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- General Engineering & Computer Science (AREA)
- Semiconductor Integrated Circuits (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
【解決手段】互いに平行に延在する複数のN+型ソース層9、N+型ドレイン層8を取り囲むようにP+型コンタクト層10を形成する。N+型ソース層9上、N+型ドレイン層8上及びN+型ソース層9が延在する方向と垂直方向に延在するP+型コンタクト層10上にそれぞれ金属シリサイド層9a、8a、10aを形成する。金属シリサイド層9a、8a、10a上に堆積された層間絶縁膜13に形成されたコンタクトホール14を介して、該各金属シリサイド層と接続するFinger形状のソース電極15、ドレイン電極16及び該Finger形状の各電極を取り囲むP+型コンタクト電極17を形成する。
【選択図】 図1
Description
きるコンタクトホール14も形成されない。
4 P+型分離層 5 素子分離絶縁膜 6 P型ウエル層 7 P型ボディ層
8 N+型ドレイン層 9 N+型ソース層 10 P+型コンタクト層
8a,9a,10a チタンシリサイド層 11 ゲート絶縁膜
12 ゲート電極 12a ドープドポリシリコン層 12b チタンポリサイド層 13 層間絶縁膜 14 コンタクトホール 15 ソース電極
16 ドレイン電極 17 P+型コンタクト電極 18 N+型放電層
20 LDD層 21 サイドスペーサ
30,31 パワーNLDMOSトランジスタ 32,33 ESD保護素子
34 電源 35 出力端子 36 電源 50 入出力端子
51 電源ライン 52,54,55 保護ダイオード 56 内部回路
Claims (6)
- 素子分離絶縁膜で分離された第1導電型の半導体層の表面に形成された第2導電型のウエル層と、
前記ウエル層の表面に互いに平行方向に延在する複数の第2導電型のボディ層と、
前記複数のボデイ層の表面に交互に形成された第1導電型のソース層及び第1導電型のドレイン層と、
前記素子分離絶縁膜に隣接する領域の前記ウエル層及び前記ボディ層の表面に、前記ソース層、前記ドレイン層を取り囲むように形成された第2導電型のコンタクト層と、
前記ソース層と前記ドレイン層の間の前記ボディ層上及び前記ウエル層上に跨ってゲート絶縁膜を介して形成されたゲート電極と、
前記ソース層上、前記ドレイン層上、及び前記コンタクト層のうち前記ソース層の延在する方向に垂直方向に延在する領域の該コンタクト層上のそれぞれの表面に形成された金属シリサイド層と、
前記金属シリサイド層上に堆積された層間絶縁膜に形成されたコンタクトホールを介し、前記各金属シリサイド層のそれぞれと接続される、Finger形状のソース電極、ドレイン電極、及び該ソース電極、ドレイン電極を取り囲んで形成されたコンタクト電極と、を具備することを特徴とする半導体装置。 - 前記ソース層の延在する方向と平行方向に延在する前記コンタクト層上の前記層間絶縁膜にも前記コンタクトホールが形成され、該コンタクト層が該コンタクトホールを介して前記コンタクト電極と接続されることを特徴とする請求項1に記載の半導体装置。
- 前記ソース層の延在する方向と平行方向に延在する前記コンタクト層が前記層間絶縁膜に形成された前記コンタクトホールに露出する領域及びその近傍の前記ボディ層または前記ウエル層の表面にのみ形成されることを特徴とする請求項2に記載の半導体装置。
- 前記素子分離絶縁膜に隣接する領域の前記コンタクトホール及びその近傍以外の領域の前記ボディ層または前記ウエル層に前記コンタクト層及び前記コンタクト電極と接続される第1導電型の放電層が前記ソース層と平行方向に延在して形成されたことを特徴とする請求項3に記載の半導体装置。
- 前記ソース層の延在する方向と平行方向の2辺を延在する前記コンタクト層に隣接して形成されるのが前記ソース層であることを特徴とする請求項1乃至請求項4のいずれかに記載の半導体装置。
- 前記半導体層が第2導電型の半導体基板上に形成された第1導電型のエピタキシャル層であり、前記素子分離絶縁膜の下方で第2導電型の分離層で複数の領域に分離されていることを特徴とする請求項1乃至請求項5のいずれかに記載の半導体装置。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2011138448A JP2013008715A (ja) | 2011-06-22 | 2011-06-22 | 半導体装置 |
TW101119284A TW201308565A (zh) | 2011-06-22 | 2012-05-30 | 半導體裝置 |
CN201210201462.0A CN102842576B (zh) | 2011-06-22 | 2012-06-15 | 半导体装置 |
US13/529,774 US8692330B2 (en) | 2011-06-22 | 2012-06-21 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2011138448A JP2013008715A (ja) | 2011-06-22 | 2011-06-22 | 半導体装置 |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2013008715A true JP2013008715A (ja) | 2013-01-10 |
Family
ID=47361050
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2011138448A Ceased JP2013008715A (ja) | 2011-06-22 | 2011-06-22 | 半導体装置 |
Country Status (4)
Country | Link |
---|---|
US (1) | US8692330B2 (ja) |
JP (1) | JP2013008715A (ja) |
CN (1) | CN102842576B (ja) |
TW (1) | TW201308565A (ja) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2014112294A1 (ja) * | 2013-01-18 | 2014-07-24 | セイコーインスツル株式会社 | 半導体装置 |
WO2014112293A1 (ja) * | 2013-01-18 | 2014-07-24 | セイコーインスツル株式会社 | 半導体装置 |
WO2014136548A1 (ja) * | 2013-03-06 | 2014-09-12 | セイコーインスツル株式会社 | 半導体装置 |
WO2020261692A1 (ja) * | 2019-06-26 | 2020-12-30 | ソニーセミコンダクタソリューションズ株式会社 | 半導体装置 |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9105477B2 (en) * | 2013-03-28 | 2015-08-11 | Semiconductor Manufacturing International (Shanghai) Corporation | ESD protection structure and ESD protection circuit |
JP6338832B2 (ja) * | 2013-07-31 | 2018-06-06 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP6600491B2 (ja) * | 2014-07-31 | 2019-10-30 | エイブリック株式会社 | Esd素子を有する半導体装置 |
US9543430B2 (en) * | 2014-11-03 | 2017-01-10 | Texas Instruments Incorporated | Segmented power transistor |
CN104485361B (zh) * | 2014-12-25 | 2018-03-30 | 上海华虹宏力半导体制造有限公司 | 绝缘体上硅射频开关器件结构 |
US9748232B2 (en) * | 2014-12-31 | 2017-08-29 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor device structure and method for forming the same |
EP3163618A1 (en) | 2015-10-27 | 2017-05-03 | Nexperia B.V. | Electrostatic discharge protection device |
US9680011B2 (en) * | 2015-10-29 | 2017-06-13 | Nxp Usa, Inc. | Self-adjusted isolation bias in semiconductor devices |
US10410957B2 (en) * | 2016-03-31 | 2019-09-10 | Skyworks Solutions, Inc. | Body contacts for field-effect transistors |
JP6640049B2 (ja) | 2016-08-02 | 2020-02-05 | 日立オートモティブシステムズ株式会社 | 電子装置 |
CN106501340B (zh) * | 2016-09-23 | 2019-07-09 | 上海小海龟科技有限公司 | 电极、离子敏感传感器、电容和离子活度的检测方法 |
JP6610508B2 (ja) * | 2016-11-09 | 2019-11-27 | 株式会社デンソー | 半導体装置 |
CN108878402B (zh) * | 2017-05-09 | 2020-09-29 | 中芯国际集成电路制造(上海)有限公司 | 半导体测试结构及晶体管漏电的测试方法 |
CN107527906B (zh) * | 2017-08-31 | 2020-02-07 | 上海华虹宏力半导体制造有限公司 | 半导体器件 |
CN112331646A (zh) * | 2020-10-19 | 2021-02-05 | 海光信息技术股份有限公司 | 用于降低电容的电路结构、静电保护电路和电子设备 |
EP4002445A1 (en) * | 2020-11-18 | 2022-05-25 | Infineon Technologies Austria AG | Device package having a lateral power transistor with segmented chip pad |
CN113345964B (zh) * | 2021-05-17 | 2022-05-10 | 杰华特微电子股份有限公司 | 一种横向双扩散晶体管 |
US11955956B2 (en) | 2022-06-08 | 2024-04-09 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor devices and circuits with increased breakdown voltage |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63160276A (ja) * | 1986-12-24 | 1988-07-04 | Hitachi Ltd | 半導体集積回路装置の製造方法 |
JP2003179226A (ja) * | 2001-12-13 | 2003-06-27 | Rohm Co Ltd | 半導体集積回路装置 |
JP2005354014A (ja) * | 2004-06-14 | 2005-12-22 | Nec Electronics Corp | 静電気放電保護素子 |
JP2007116049A (ja) * | 2005-10-24 | 2007-05-10 | Toshiba Corp | 半導体装置 |
JP2009277877A (ja) * | 2008-05-14 | 2009-11-26 | Toyota Motor Corp | 半導体装置 |
JP2010192693A (ja) * | 2009-02-18 | 2010-09-02 | Sanyo Electric Co Ltd | 半導体装置及びその製造方法 |
JP2011210904A (ja) * | 2010-03-29 | 2011-10-20 | Seiko Instruments Inc | 半導体装置 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06177328A (ja) | 1992-12-03 | 1994-06-24 | Nec Corp | 入出力保護素子用misトランジスタ |
KR0164496B1 (ko) * | 1995-12-02 | 1998-12-15 | 김광호 | 정전기보호소자 |
KR100203054B1 (ko) * | 1995-12-02 | 1999-06-15 | 윤종용 | 개선된 정전기 방전 능력을 갖는 집적 회로 |
US5939753A (en) * | 1997-04-02 | 1999-08-17 | Motorola, Inc. | Monolithic RF mixed signal IC with power amplification |
JP3237110B2 (ja) * | 1998-03-24 | 2001-12-10 | 日本電気株式会社 | 半導体装置 |
US6815775B2 (en) * | 2001-02-02 | 2004-11-09 | Industrial Technology Research Institute | ESD protection design with turn-on restraining method and structures |
US6611025B2 (en) * | 2001-09-05 | 2003-08-26 | Winbond Electronics Corp. | Apparatus and method for improved power bus ESD protection |
TW519748B (en) * | 2001-12-26 | 2003-02-01 | Faraday Tech Corp | Semiconductor device with substrate-triggered ESD protection |
JP4154578B2 (ja) * | 2002-12-06 | 2008-09-24 | 日本電気株式会社 | 半導体装置及びその製造方法 |
-
2011
- 2011-06-22 JP JP2011138448A patent/JP2013008715A/ja not_active Ceased
-
2012
- 2012-05-30 TW TW101119284A patent/TW201308565A/zh unknown
- 2012-06-15 CN CN201210201462.0A patent/CN102842576B/zh active Active
- 2012-06-21 US US13/529,774 patent/US8692330B2/en active Active
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63160276A (ja) * | 1986-12-24 | 1988-07-04 | Hitachi Ltd | 半導体集積回路装置の製造方法 |
JP2003179226A (ja) * | 2001-12-13 | 2003-06-27 | Rohm Co Ltd | 半導体集積回路装置 |
JP2005354014A (ja) * | 2004-06-14 | 2005-12-22 | Nec Electronics Corp | 静電気放電保護素子 |
JP2007116049A (ja) * | 2005-10-24 | 2007-05-10 | Toshiba Corp | 半導体装置 |
JP2009277877A (ja) * | 2008-05-14 | 2009-11-26 | Toyota Motor Corp | 半導体装置 |
JP2010192693A (ja) * | 2009-02-18 | 2010-09-02 | Sanyo Electric Co Ltd | 半導体装置及びその製造方法 |
JP2011210904A (ja) * | 2010-03-29 | 2011-10-20 | Seiko Instruments Inc | 半導体装置 |
Cited By (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2014112294A1 (ja) * | 2013-01-18 | 2014-07-24 | セイコーインスツル株式会社 | 半導体装置 |
WO2014112293A1 (ja) * | 2013-01-18 | 2014-07-24 | セイコーインスツル株式会社 | 半導体装置 |
JP2014138145A (ja) * | 2013-01-18 | 2014-07-28 | Seiko Instruments Inc | 半導体装置 |
JP2014138146A (ja) * | 2013-01-18 | 2014-07-28 | Seiko Instruments Inc | 半導体装置 |
KR20150109360A (ko) * | 2013-01-18 | 2015-10-01 | 세이코 인스트루 가부시키가이샤 | 반도체 장치 |
KR102082643B1 (ko) * | 2013-01-18 | 2020-02-28 | 에이블릭 가부시키가이샤 | 반도체 장치 |
WO2014136548A1 (ja) * | 2013-03-06 | 2014-09-12 | セイコーインスツル株式会社 | 半導体装置 |
JP2014175344A (ja) * | 2013-03-06 | 2014-09-22 | Seiko Instruments Inc | 半導体装置 |
KR20150125944A (ko) * | 2013-03-06 | 2015-11-10 | 세이코 인스트루 가부시키가이샤 | 반도체 장치 |
KR102158458B1 (ko) * | 2013-03-06 | 2020-09-22 | 에이블릭 가부시키가이샤 | 반도체 장치 |
WO2020261692A1 (ja) * | 2019-06-26 | 2020-12-30 | ソニーセミコンダクタソリューションズ株式会社 | 半導体装置 |
Also Published As
Publication number | Publication date |
---|---|
US20120326235A1 (en) | 2012-12-27 |
US8692330B2 (en) | 2014-04-08 |
CN102842576A (zh) | 2012-12-26 |
CN102842576B (zh) | 2015-05-13 |
TW201308565A (zh) | 2013-02-16 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP2013008715A (ja) | 半導体装置 | |
US10964686B2 (en) | Semiconductor device and method of manufacturing semiconductor device | |
US9673309B2 (en) | Semiconductor device and method for fabricating semiconductor device | |
JP5525736B2 (ja) | 半導体装置及びその製造方法 | |
JP6218462B2 (ja) | ワイドギャップ半導体装置 | |
US9721939B2 (en) | Semiconductor device | |
US8324688B2 (en) | Electrostatic discharge protection device for high voltage operation | |
JP5713611B2 (ja) | 半導体装置 | |
US11373996B2 (en) | Silicon-controlled-rectifier electrostatic protection structure and fabrication method thereof | |
TWI703702B (zh) | 場效電晶體及半導體裝置 | |
JP2005311134A (ja) | 静電気放電保護素子 | |
JP2012094797A (ja) | 半導体装置及びその製造方法 | |
JP4897029B2 (ja) | 半導体装置 | |
JP2004273647A (ja) | 半導体素子及びその製造方法 | |
JP4245644B1 (ja) | 静電気放電保護装置及びこれを備えた半導体集積回路 | |
JP2013191597A (ja) | 半導体装置 | |
JP2014123632A (ja) | 半導体装置 | |
JP2012028380A (ja) | 半導体装置 | |
TWI473268B (zh) | 高壓半導體元件及其操作方法 | |
JP4694123B2 (ja) | 静電気放電保護素子 | |
JP2011171662A (ja) | 保護トランジスタおよび半導体集積回路 | |
TWI585936B (zh) | 靜電放電保護結構 | |
JP2010141007A (ja) | 半導体装置、半導体装置の製造方法、静電放電保護素子 | |
JP2000049336A (ja) | 半導体装置 | |
JP2010010230A (ja) | Esd保護素子および該esd保護素子を設けた半導体装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20140612 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20150416 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20150428 |
|
A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20150603 |
|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20151104 |
|
A045 | Written measure of dismissal of application [lapsed due to lack of payment] |
Free format text: JAPANESE INTERMEDIATE CODE: A045 Effective date: 20160317 |