JP2013004576A - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP2013004576A JP2013004576A JP2011131251A JP2011131251A JP2013004576A JP 2013004576 A JP2013004576 A JP 2013004576A JP 2011131251 A JP2011131251 A JP 2011131251A JP 2011131251 A JP2011131251 A JP 2011131251A JP 2013004576 A JP2013004576 A JP 2013004576A
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- Prior art keywords
- metal film
- semiconductor device
- core substrate
- semiconductor element
- insulating layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
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- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
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- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/19—Manufacturing methods of high density interconnect preforms
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- H01L24/96—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
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- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
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- H01L2924/19101—Disposition of discrete passive components
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2011131251A JP2013004576A (ja) | 2011-06-13 | 2011-06-13 | 半導体装置 |
| US13/493,123 US8664764B2 (en) | 2011-06-13 | 2012-06-11 | Semiconductor device including a core substrate and a semiconductor element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2011131251A JP2013004576A (ja) | 2011-06-13 | 2011-06-13 | 半導体装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2013004576A true JP2013004576A (ja) | 2013-01-07 |
| JP2013004576A5 JP2013004576A5 (enExample) | 2014-07-03 |
Family
ID=47292477
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2011131251A Pending JP2013004576A (ja) | 2011-06-13 | 2011-06-13 | 半導体装置 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US8664764B2 (enExample) |
| JP (1) | JP2013004576A (enExample) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2014082447A (ja) * | 2012-09-26 | 2014-05-08 | Fujifilm Corp | 多層基板および半導体パッケージ |
| WO2014156025A1 (ja) * | 2013-03-26 | 2014-10-02 | 田中貴金属工業株式会社 | 半導体装置及び放熱機構 |
| JPWO2013073082A1 (ja) * | 2011-11-16 | 2015-04-02 | パナソニック株式会社 | 拡張型半導体チップ及び半導体装置 |
| JP2016195238A (ja) * | 2015-03-31 | 2016-11-17 | 新光電気工業株式会社 | 配線基板及び半導体パッケージ |
| JP2021502706A (ja) * | 2017-11-10 | 2021-01-28 | エルペーカーエフ レーザー ウント エレクトロニクス アーゲー | 半導体ウェハの集積方法及び装置 |
| JP2024090149A (ja) * | 2022-12-22 | 2024-07-04 | 株式会社村田製作所 | 複合部品デバイスおよびその製造方法 |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012256675A (ja) * | 2011-06-08 | 2012-12-27 | Shinko Electric Ind Co Ltd | 配線基板、半導体装置及びその製造方法 |
| US9030017B2 (en) | 2012-11-13 | 2015-05-12 | Invensas Corporation | Z-connection using electroless plating |
| US20140151095A1 (en) * | 2012-12-05 | 2014-06-05 | Samsung Electro-Mechanics Co., Ltd. | Printed circuit board and method for manufacturing the same |
| CN104185365B (zh) * | 2013-05-23 | 2018-06-26 | 比亚迪股份有限公司 | 一种线路板及其制备方法 |
| JP6031060B2 (ja) * | 2014-03-31 | 2016-11-24 | 信越化学工業株式会社 | 半導体装置、積層型半導体装置、封止後積層型半導体装置、及びこれらの製造方法 |
| CN105118815B (zh) * | 2015-08-13 | 2017-09-29 | 上海航天电子通讯设备研究所 | 一种基于铝基板的三维封装用垂直互连结构及其制备方法 |
| KR102561987B1 (ko) * | 2017-01-11 | 2023-07-31 | 삼성전기주식회사 | 반도체 패키지와 그 제조 방법 |
Citations (6)
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| JPH0433396A (ja) * | 1990-05-30 | 1992-02-04 | Fujitsu Ltd | 空気層を有するセラミック多層プリント板 |
| JP2004153084A (ja) * | 2002-10-31 | 2004-05-27 | Denso Corp | 多層配線基板の製造方法及び多層配線基板 |
| JP2006019342A (ja) * | 2004-06-30 | 2006-01-19 | Tdk Corp | 半導体ic内蔵基板 |
| WO2007069789A1 (ja) * | 2005-12-16 | 2007-06-21 | Ibiden Co., Ltd. | 多層プリント配線板およびその製造方法 |
| JP2008091471A (ja) * | 2006-09-29 | 2008-04-17 | Tdk Corp | 半導体内蔵基板及びその製造方法 |
| JP2011023626A (ja) * | 2009-07-17 | 2011-02-03 | Shinko Electric Ind Co Ltd | 半導体装置及びその製造方法 |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW472330B (en) * | 1999-08-26 | 2002-01-11 | Toshiba Corp | Semiconductor device and the manufacturing method thereof |
| US6392301B1 (en) * | 1999-10-22 | 2002-05-21 | Intel Corporation | Chip package and method |
| US8193092B2 (en) * | 2007-07-31 | 2012-06-05 | Micron Technology, Inc. | Semiconductor devices including a through-substrate conductive member with an exposed end and methods of manufacturing such semiconductor devices |
| TWI328423B (en) * | 2007-09-14 | 2010-08-01 | Unimicron Technology Corp | Circuit board structure having heat-dissipating structure |
| US8129828B2 (en) * | 2008-09-29 | 2012-03-06 | Ngk Spark Plug Co., Ltd. | Wiring substrate with reinforcement |
| JP5249132B2 (ja) * | 2009-06-03 | 2013-07-31 | 新光電気工業株式会社 | 配線基板 |
| JP5280945B2 (ja) * | 2009-06-19 | 2013-09-04 | 新光電気工業株式会社 | 半導体装置及びその製造方法 |
| CN102472457A (zh) * | 2009-09-04 | 2012-05-23 | 夏普株式会社 | 电子组件、照明装置、显示装置 |
-
2011
- 2011-06-13 JP JP2011131251A patent/JP2013004576A/ja active Pending
-
2012
- 2012-06-11 US US13/493,123 patent/US8664764B2/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0433396A (ja) * | 1990-05-30 | 1992-02-04 | Fujitsu Ltd | 空気層を有するセラミック多層プリント板 |
| JP2004153084A (ja) * | 2002-10-31 | 2004-05-27 | Denso Corp | 多層配線基板の製造方法及び多層配線基板 |
| JP2006019342A (ja) * | 2004-06-30 | 2006-01-19 | Tdk Corp | 半導体ic内蔵基板 |
| WO2007069789A1 (ja) * | 2005-12-16 | 2007-06-21 | Ibiden Co., Ltd. | 多層プリント配線板およびその製造方法 |
| JP2008091471A (ja) * | 2006-09-29 | 2008-04-17 | Tdk Corp | 半導体内蔵基板及びその製造方法 |
| JP2011023626A (ja) * | 2009-07-17 | 2011-02-03 | Shinko Electric Ind Co Ltd | 半導体装置及びその製造方法 |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPWO2013073082A1 (ja) * | 2011-11-16 | 2015-04-02 | パナソニック株式会社 | 拡張型半導体チップ及び半導体装置 |
| JP2014082447A (ja) * | 2012-09-26 | 2014-05-08 | Fujifilm Corp | 多層基板および半導体パッケージ |
| WO2014156025A1 (ja) * | 2013-03-26 | 2014-10-02 | 田中貴金属工業株式会社 | 半導体装置及び放熱機構 |
| JP2014192209A (ja) * | 2013-03-26 | 2014-10-06 | Tanaka Kikinzoku Kogyo Kk | 半導体装置及び放熱機構 |
| US9607922B2 (en) | 2013-03-26 | 2017-03-28 | Tanaka Kikinzoku Kogyo K.K. | Semiconductor device and heat-dissipating mechanism |
| JP2016195238A (ja) * | 2015-03-31 | 2016-11-17 | 新光電気工業株式会社 | 配線基板及び半導体パッケージ |
| JP2021502706A (ja) * | 2017-11-10 | 2021-01-28 | エルペーカーエフ レーザー ウント エレクトロニクス アーゲー | 半導体ウェハの集積方法及び装置 |
| JP7090153B2 (ja) | 2017-11-10 | 2022-06-23 | エルペーカーエフ レーザー ウント エレクトロニクス アーゲー | 半導体ウェハの集積方法及び装置 |
| JP2024090149A (ja) * | 2022-12-22 | 2024-07-04 | 株式会社村田製作所 | 複合部品デバイスおよびその製造方法 |
| JP7715143B2 (ja) | 2022-12-22 | 2025-07-30 | 株式会社村田製作所 | 複合部品デバイスおよびその製造方法 |
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| US8664764B2 (en) | 2014-03-04 |
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