JP2012114148A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法 Download PDF

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Publication number
JP2012114148A
JP2012114148A JP2010260117A JP2010260117A JP2012114148A JP 2012114148 A JP2012114148 A JP 2012114148A JP 2010260117 A JP2010260117 A JP 2010260117A JP 2010260117 A JP2010260117 A JP 2010260117A JP 2012114148 A JP2012114148 A JP 2012114148A
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Japan
Prior art keywords
insulating layer
layer
barrier layer
forming
conductive portion
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JP2010260117A
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Japanese (ja)
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JP2012114148A5 (enExample
Inventor
Masamitsu Ikumo
雅光 生雲
Hiroyuki Yoda
博行 依田
Yasuhito Akutagawa
泰人 芥川
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Fujitsu Semiconductor Ltd
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Fujitsu Semiconductor Ltd
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Priority to JP2010260117A priority Critical patent/JP2012114148A/ja
Priority to US13/193,569 priority patent/US20120129335A1/en
Publication of JP2012114148A publication Critical patent/JP2012114148A/ja
Publication of JP2012114148A5 publication Critical patent/JP2012114148A5/ja
Pending legal-status Critical Current

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    • H10W74/147—
    • H10W70/05—
    • H10W70/60—
    • H10W70/65—
    • H10W70/66—
    • H10W72/012—
    • H10W72/01225—
    • H10W72/01235—
    • H10W72/01255—
    • H10W72/01257—
    • H10W72/019—
    • H10W72/01935—
    • H10W72/01953—
    • H10W72/221—
    • H10W72/242—
    • H10W72/252—
    • H10W72/29—
    • H10W72/923—
    • H10W72/9415—
    • H10W72/952—

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JP2010260117A 2010-11-22 2010-11-22 半導体装置の製造方法 Pending JP2012114148A (ja)

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JP2010260117A JP2012114148A (ja) 2010-11-22 2010-11-22 半導体装置の製造方法
US13/193,569 US20120129335A1 (en) 2010-11-22 2011-07-28 Method of manufacturing semiconductor device

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JP2010260117A JP2012114148A (ja) 2010-11-22 2010-11-22 半導体装置の製造方法

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JP2012114148A true JP2012114148A (ja) 2012-06-14
JP2012114148A5 JP2012114148A5 (enExample) 2013-09-19

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Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015050365A (ja) * 2013-09-03 2015-03-16 信越化学工業株式会社 半導体装置、積層型半導体装置、封止後積層型半導体装置、及びこれらの製造方法
JP2015173256A (ja) * 2014-03-11 2015-10-01 インテル コーポレイション 集積回路パッケージ
JP2018061018A (ja) * 2016-09-28 2018-04-12 ローム株式会社 半導体装置
JP2019102804A (ja) * 2017-12-06 2019-06-24 三星電子株式会社Ｓａｍｓｕｎｇ Ｅｌｅｃｔｒｏｎｉｃｓ Ｃｏ．，Ｌｔｄ． 再配線の形成方法及びこれを利用する半導体素子の製造方法
CN111354700A (zh) * 2018-12-24 2020-06-30 Nepes 株式会社 半导体封装件
KR20200079164A (ko) * 2018-12-24 2020-07-02 주식회사 네패스 반도체 패키지 및 그의 제조 방법
US11276632B2 (en) 2018-12-24 2022-03-15 Nepes Co., Ltd. Semiconductor package
US11545454B2 (en) 2016-09-28 2023-01-03 Rohm Co., Ltd. Semiconductor device
WO2025105367A1 (ja) * 2023-11-13 2025-05-22 富士フイルム株式会社 樹脂組成物、硬化物、積層体、硬化物の製造方法、積層体の製造方法、半導体デバイスの製造方法、半導体デバイス、及び、樹脂の製造方法

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8431478B2 (en) * 2011-09-16 2013-04-30 Chipmos Technologies, Inc. Solder cap bump in semiconductor package and method of manufacturing the same
CN104241148B (zh) * 2013-06-19 2017-08-25 中芯国际集成电路制造(上海)有限公司 一种在cpi测试中防止衬垫剥离的方法以及产生的器件
US20150179602A1 (en) * 2013-12-20 2015-06-25 Zigmund Ramirez Camacho Integrated circuit packaging system with conductive ink and method of manufacture thereof
US9691723B2 (en) * 2015-10-30 2017-06-27 Taiwan Semiconductor Manufacturing Company, Ltd. Connector formation methods and packaged semiconductor devices
US9624094B1 (en) * 2015-11-13 2017-04-18 Cypress Semiconductor Corporation Hydrogen barriers in a copper interconnect process
ITUB20160027A1 (it) * 2016-02-01 2017-08-01 St Microelectronics Srl Procedimento per produrre dispositivi a semiconduttore e corrispondente dispositivo
US10103114B2 (en) * 2016-09-21 2018-10-16 Nanya Technology Corporation Semiconductor structure and manufacturing method thereof
KR102077455B1 (ko) 2017-07-04 2020-02-14 삼성전자주식회사 반도체 장치
IT201700087201A1 (it) 2017-07-28 2019-01-28 St Microelectronics Srl Dispositivo a semiconduttore e corrispondente metodo di fabbricazione di dispositivi a semiconduttore
IT201700087174A1 (it) 2017-07-28 2019-01-28 St Microelectronics Srl Dispositivo a semiconduttore e corrispondente metodo di fabbricazione di dispositivi a semiconduttore
IT201700087318A1 (it) 2017-07-28 2019-01-28 St Microelectronics Srl Dispositivo elettronico integrato con regione di redistribuzione e elevata resistenza agli stress meccanici e suo metodo di preparazione
KR102029535B1 (ko) * 2017-08-28 2019-10-07 삼성전기주식회사 팬-아웃 반도체 패키지
US11469194B2 (en) 2018-08-08 2022-10-11 Stmicroelectronics S.R.L. Method of manufacturing a redistribution layer, redistribution layer and integrated circuit including the redistribution layer
KR102877704B1 (ko) * 2020-09-09 2025-10-28 삼성전자주식회사 반도체 패키지 및 이의 제조 방법

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0410431A (ja) * 1990-04-25 1992-01-14 Fuji Electric Co Ltd 半導体装置の製造方法
JPH04208531A (ja) * 1990-08-10 1992-07-30 Seiko Instr Inc バンプ電極の製造法
JP2000164531A (ja) * 1998-11-30 2000-06-16 Toshiba Corp 微粒子膜形成装置・形成方法、ならびに半導体装置およびその製造方法
JP2006270031A (ja) * 2005-02-25 2006-10-05 Casio Comput Co Ltd 半導体装置およびその製造方法
JP2007266381A (ja) * 2006-03-29 2007-10-11 Citizen Holdings Co Ltd 半導体装置の製造方法
JP2008218884A (ja) * 2007-03-07 2008-09-18 Citizen Holdings Co Ltd 半導体装置およびその製造方法
JP2009503852A (ja) * 2005-07-29 2009-01-29 アドバンスト・マイクロ・ディバイシズ・インコーポレイテッド ドライエッチプロセスを使用してアンダーバンプメタル層を効率的にパターニングする技術
JP2010062175A (ja) * 2008-09-01 2010-03-18 Casio Comput Co Ltd 半導体装置の製造方法

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR940010510B1 (ko) * 1988-11-21 1994-10-24 세이꼬 엡슨 가부시끼가이샤 반도체 장치 제조 방법
JPH06177127A (ja) * 1991-05-30 1994-06-24 Sony Corp 配線形成方法
US5470787A (en) * 1994-05-02 1995-11-28 Motorola, Inc. Semiconductor device solder bump having intrinsic potential for forming an extended eutectic region and method for making and using the same
CN1096110C (zh) * 1995-03-20 2002-12-11 统一国际有限公司 含有钛阻挡层的焊料凸点结构及其形成方法
US6436300B2 (en) * 1998-07-30 2002-08-20 Motorola, Inc. Method of manufacturing electronic components
US6749760B2 (en) * 2001-10-26 2004-06-15 Intel Corporation Etchant formulation for selectively removing thin films in the presence of copper, tin, and lead
US6803323B2 (en) * 2002-05-30 2004-10-12 Freescale Semiconductor, Inc. Method of forming a component overlying a semiconductor substrate
US20050092611A1 (en) * 2003-11-03 2005-05-05 Semitool, Inc. Bath and method for high rate copper deposition
US7410833B2 (en) * 2004-03-31 2008-08-12 International Business Machines Corporation Interconnections for flip-chip using lead-free solders and having reaction barrier layers
WO2005101499A2 (en) * 2004-04-13 2005-10-27 Unitive International Limited Methods of forming solder bumps on exposed metal pads and related structures
JP2006222232A (ja) * 2005-02-09 2006-08-24 Fujitsu Ltd 半導体装置およびその製造方法
JP2006303379A (ja) * 2005-04-25 2006-11-02 Seiko Epson Corp 半導体装置の製造方法
JP4232044B2 (ja) * 2005-07-05 2009-03-04 セイコーエプソン株式会社 半導体装置の製造方法
US7449785B2 (en) * 2006-02-06 2008-11-11 Taiwan Semiconductor Manufacturing Co., Ltd. Solder bump on a semiconductor substrate
US7485564B2 (en) * 2007-02-12 2009-02-03 International Business Machines Corporation Undercut-free BLM process for Pb-free and Pb-reduced C4
JP5262045B2 (ja) * 2007-09-27 2013-08-14 富士通セミコンダクター株式会社 電極の形成方法及び半導体装置の製造方法
US8003512B2 (en) * 2009-02-03 2011-08-23 International Business Machines Corporation Structure of UBM and solder bumps and methods of fabrication

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0410431A (ja) * 1990-04-25 1992-01-14 Fuji Electric Co Ltd 半導体装置の製造方法
JPH04208531A (ja) * 1990-08-10 1992-07-30 Seiko Instr Inc バンプ電極の製造法
JP2000164531A (ja) * 1998-11-30 2000-06-16 Toshiba Corp 微粒子膜形成装置・形成方法、ならびに半導体装置およびその製造方法
JP2006270031A (ja) * 2005-02-25 2006-10-05 Casio Comput Co Ltd 半導体装置およびその製造方法
JP2009503852A (ja) * 2005-07-29 2009-01-29 アドバンスト・マイクロ・ディバイシズ・インコーポレイテッド ドライエッチプロセスを使用してアンダーバンプメタル層を効率的にパターニングする技術
JP2007266381A (ja) * 2006-03-29 2007-10-11 Citizen Holdings Co Ltd 半導体装置の製造方法
JP2008218884A (ja) * 2007-03-07 2008-09-18 Citizen Holdings Co Ltd 半導体装置およびその製造方法
JP2010062175A (ja) * 2008-09-01 2010-03-18 Casio Comput Co Ltd 半導体装置の製造方法

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015050365A (ja) * 2013-09-03 2015-03-16 信越化学工業株式会社 半導体装置、積層型半導体装置、封止後積層型半導体装置、及びこれらの製造方法
JP2015173256A (ja) * 2014-03-11 2015-10-01 インテル コーポレイション 集積回路パッケージ
JP2018061018A (ja) * 2016-09-28 2018-04-12 ローム株式会社 半導体装置
US11545454B2 (en) 2016-09-28 2023-01-03 Rohm Co., Ltd. Semiconductor device
US11810881B2 (en) 2016-09-28 2023-11-07 Rohm Co., Ltd. Semiconductor device
US12183701B2 (en) 2016-09-28 2024-12-31 Rohm Co., Ltd. Semiconductor device
JP2019102804A (ja) * 2017-12-06 2019-06-24 三星電子株式会社Ｓａｍｓｕｎｇ Ｅｌｅｃｔｒｏｎｉｃｓ Ｃｏ．，Ｌｔｄ． 再配線の形成方法及びこれを利用する半導体素子の製造方法
CN111354700A (zh) * 2018-12-24 2020-06-30 Nepes 株式会社 半导体封装件
KR20200079164A (ko) * 2018-12-24 2020-07-02 주식회사 네패스 반도체 패키지 및 그의 제조 방법
KR102317208B1 (ko) * 2018-12-24 2021-10-25 주식회사 네패스 반도체 패키지 및 그의 제조 방법
US11276632B2 (en) 2018-12-24 2022-03-15 Nepes Co., Ltd. Semiconductor package
WO2025105367A1 (ja) * 2023-11-13 2025-05-22 富士フイルム株式会社 樹脂組成物、硬化物、積層体、硬化物の製造方法、積層体の製造方法、半導体デバイスの製造方法、半導体デバイス、及び、樹脂の製造方法

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