JP2012033588A - 半導体装置および半導体装置の製造方法 - Google Patents
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Abstract
【解決手段】基板上に形成された、SiO2骨格を含む第1の多孔質層6と、第1の多孔質層6の直上に形成された、SiO2骨格を含む第2の多孔質層7と、第1の多孔質層6に埋め込まれたビア10と、第2の多孔質層7に埋め込まれた配線11と、を有し、第1の多孔質層6の孔密度x1は40%以下であり、第2の多孔質層7の孔密度x2は、(x1+5)%以上である半導体装置を提供する。
【選択図】図7
Description
一般的に低誘電率多孔質層に使用される原料(シルセスキオキサン樹脂(SiOC)等)の場合、「−Si−O−Si−」のネットワークがCにより終端され、結果、機械的強度が弱くなってしまう。また、Cがネットワークに組み込まれる場合には、「−O−Si−C−Si−」などの形となり、結果、半導体である「SiC」に近づくこととなるので、リークが増加するという問題がある。
一般的に、ビア層間絶縁層および配線層間絶縁層は、層間絶縁層と金属層とを含み、各層において層間絶縁層がその層を占める割合は、ビア層間絶縁層の方が大きい。例えば、ビア層間絶縁層における層間絶縁層の体積比率は、配線層間絶縁層における層間絶縁層の体積比率の10〜1000倍大きくなる場合がある。各層の破壊に至るまでの機械的強度は、層間絶縁層、配線およびビアそれぞれの機械的強度や、各層における体積率、層間絶縁層と配線またはビアとの密着強度の関連などにおいて決まるが、破壊箇所は機械的強度が配線およびビアの数分の1程度しかない層間絶縁層で発生する場合が多い。このため層間絶縁層が占める割合が大きいビア層間絶縁層にはより高い機械的強度が要求される。このような状況があるにも関わらず、ビア層間絶縁層および配線層間絶縁層の設計を同じにしてしまうと、設計の幅は狭められ、十分な誘電率、機械的強度を得ることができない。
下地配線が形成された半導体基板上に、メチルシロキサンオリゴマーと、熱分解温度が150℃以下の界面活性剤を含む溶液(アルバック社製ULKSタイプ塗布液)を塗布し、窒素中で150℃の加熱を行い膜中に細孔を形成した。結果、シリコンダイオキサイド(SiO2)やシラノール(SiOH)を主成分とする骨格を持つ第1の多孔質層が形成された。
2 バリア膜
3 配線
4 第1の溶液
4A 第1の多孔質層
4B 第1の多孔質層
4C 第1の多孔質層(ビア層間絶縁層)
5 第1の溶液
5A 第2の多孔質層(配線層間絶縁層)
6 ビア層間絶縁層
7 配線層間絶縁層
8 開口
9 開口
10 ビア
11 配線
12 バリア膜
Claims (7)
- 基板上に形成された、SiO2骨格を含む第1の多孔質層と、
前記第1の多孔質層の直上に形成された、SiO2骨格を含む第2の多孔質層と、
前記第1の多孔質層に埋め込まれたビアと、
前記第2の多孔質層に埋め込まれた配線と、
を有し、
前記第1の多孔質層の孔密度x1は40%以下であり、前記第2の多孔質層の孔密度x2は(x1+5)%以上である半導体装置。 - 基板上に、界面活性剤を含む第1の溶液を塗布後、加熱することで、第1の多孔質層を形成する第1の多孔質層形成工程と、
前記第1の多孔質層の上に、前記第1の溶液を塗布後、加熱することで、第2の多孔質層を形成する第2の多孔質層形成工程と、
前記第2の多孔質層形成工程の後、前記第1の多孔質層にビアを埋め込み、前記第2の多孔質層に配線を埋め込むビア配線形成工程と、
を有する半導体装置の製造方法。 - 請求項2に記載の半導体装置の製造方法において、
前記第2の多孔質層形成工程では、前記第1の溶液を塗布後、前記第1の溶液が前記第1の多孔質層に浸透した後、加熱する、半導体装置の製造方法。 - 請求項2または3に記載の半導体装置の製造方法において、
前記第1の多孔質層形成工程後かつ前記第2の多孔質層形成工程前の前記第1の多孔質層の孔密度をx1、0%、前記第2の多孔質層形成工程後の前記第1の多孔質層の孔密度をx1、1%とした場合、
x1、1は40%以下であり、x1、0は(x1、1+5)%以上である半導体装置の製造方法。 - 請求項2から4のいずれか1項に記載の半導体装置の製造方法において、
前記第1の多孔質層形成工程および前記第2の多孔質層形成工程における前記加熱は、前記界面活性剤の熱分解温度以上の温度で行われる半導体装置の製造方法。 - 請求項2から5のいずれか1項に記載の半導体装置の製造方法において、
前記第2の多孔質層形成工程の後、かつ、前記ビア配線形成工程の前に、
加熱しながら、紫外線、電子ビームおよびマイクロ波のいずれか1つ以上を前記第1の多孔質層および前記第2の多孔質層に照射する多孔質層収縮工程を、さらに有する半導体装置の製造方法。 - 請求項2から6のいずれか1項に記載の半導体装置の製造方法において、
前記第2の多孔質層形成工程の後、かつ、前記ビア配線形成工程の前に、
有機シリコンをガス分子中に含む雰囲気下で加熱するガス処理工程を、さらに有する半導体装置の製造方法。
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US9842804B2 (en) | 2016-01-04 | 2017-12-12 | Taiwan Semiconductor Manufacturing Company, Ltd. | Methods for reducing dual damascene distortion |
JP2018142697A (ja) * | 2017-02-28 | 2018-09-13 | 株式会社東芝 | 半導体装置及びその製造方法 |
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US9406615B2 (en) * | 2013-12-24 | 2016-08-02 | Intel Corporation | Techniques for forming interconnects in porous dielectric materials |
KR20210018650A (ko) | 2019-08-07 | 2021-02-18 | 삼성전자주식회사 | 반도체 장치 |
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