JP2011501410A5 - - Google Patents

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Publication number
JP2011501410A5
JP2011501410A5 JP2010528888A JP2010528888A JP2011501410A5 JP 2011501410 A5 JP2011501410 A5 JP 2011501410A5 JP 2010528888 A JP2010528888 A JP 2010528888A JP 2010528888 A JP2010528888 A JP 2010528888A JP 2011501410 A5 JP2011501410 A5 JP 2011501410A5
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Japan
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metal layer
solid metal
layer
metal
post
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Pending
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JP2010528888A
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Japanese (ja)
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JP2011501410A (ja
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Priority claimed from PCT/US2008/011632 external-priority patent/WO2009048604A2/en
Publication of JP2011501410A publication Critical patent/JP2011501410A/ja
Publication of JP2011501410A5 publication Critical patent/JP2011501410A5/ja
Pending legal-status Critical Current

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JP2010528888A 2007-10-10 2008-10-08 頑健な多層配線要素および埋設された超小型電子素子とのアセンブリ Pending JP2011501410A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US99856407P 2007-10-10 2007-10-10
PCT/US2008/011632 WO2009048604A2 (en) 2007-10-10 2008-10-08 Robust multi-layer wiring elements and assemblies with embedded microelectronic elements

Publications (2)

Publication Number Publication Date
JP2011501410A JP2011501410A (ja) 2011-01-06
JP2011501410A5 true JP2011501410A5 (enExample) 2011-11-17

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Application Number Title Priority Date Filing Date
JP2010528888A Pending JP2011501410A (ja) 2007-10-10 2008-10-08 頑健な多層配線要素および埋設された超小型電子素子とのアセンブリ

Country Status (5)

Country Link
US (2) US20090115047A1 (enExample)
EP (1) EP2213148A4 (enExample)
JP (1) JP2011501410A (enExample)
KR (1) KR101572600B1 (enExample)
WO (1) WO2009048604A2 (enExample)

Families Citing this family (73)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8641913B2 (en) 2003-10-06 2014-02-04 Tessera, Inc. Fine pitch microcontacts and method for forming thereof
US7709968B2 (en) 2003-12-30 2010-05-04 Tessera, Inc. Micro pin grid array with pin motion isolation
EP2637202A3 (en) 2007-09-28 2014-03-12 Tessera, Inc. Flip chip interconnection with etched posts on a microelectronic element joined to etched posts on a substrate by a fusible metal and corresponding manufacturing method
JP2011501410A (ja) 2007-10-10 2011-01-06 テッセラ，インコーポレイテッド 頑健な多層配線要素および埋設された超小型電子素子とのアセンブリ
CN102017133B (zh) 2008-05-09 2012-10-10 国立大学法人九州工业大学 芯片尺寸两面连接封装件及其制造方法
WO2010109746A1 (ja) * 2009-03-27 2010-09-30 パナソニック株式会社 半導体装置及びその製造方法
US8847375B2 (en) * 2010-01-28 2014-09-30 Qualcomm Incorporated Microelectromechanical systems embedded in a substrate
US8330272B2 (en) 2010-07-08 2012-12-11 Tessera, Inc. Microelectronic packages with dual or multiple-etched flip-chip connectors
US8482111B2 (en) 2010-07-19 2013-07-09 Tessera, Inc. Stackable molded microelectronic packages
US8847376B2 (en) * 2010-07-23 2014-09-30 Tessera, Inc. Microelectronic elements with post-assembly planarization
US8580607B2 (en) * 2010-07-27 2013-11-12 Tessera, Inc. Microelectronic packages with nanoparticle joining
KR101128559B1 (ko) * 2010-09-13 2012-03-23 삼성전기주식회사 인쇄회로기판의 비아홀 형성방법
KR101167429B1 (ko) * 2010-10-11 2012-07-19 삼성전기주식회사 반도체 패키지의 제조방법
US8853558B2 (en) 2010-12-10 2014-10-07 Tessera, Inc. Interconnect structure
US11830845B2 (en) 2011-05-03 2023-11-28 Tessera Llc Package-on-package assembly with wire bonds to encapsulation surface
KR101128063B1 (ko) 2011-05-03 2012-04-23 테세라, 인코포레이티드 캡슐화 층의 표면에 와이어 본드를 구비하는 패키지 적층형 어셈블리
US8552518B2 (en) 2011-06-09 2013-10-08 Optiz, Inc. 3D integrated microelectronic assembly with stress reducing interconnects
US8546951B2 (en) 2011-06-09 2013-10-01 Optiz, Inc. 3D integration microelectronic assembly for integrated circuit devices
US8546900B2 (en) 2011-06-09 2013-10-01 Optiz, Inc. 3D integration microelectronic assembly for integrated circuit devices
US8604576B2 (en) 2011-07-19 2013-12-10 Opitz, Inc. Low stress cavity package for back side illuminated image sensor, and method of making same
US9018725B2 (en) 2011-09-02 2015-04-28 Optiz, Inc. Stepped package for image sensor and method of making same
US8404520B1 (en) 2011-10-17 2013-03-26 Invensas Corporation Package-on-package assembly with wire bond vias
US8796800B2 (en) 2011-11-21 2014-08-05 Optiz, Inc. Interposer package for CMOS image sensor and method of making same
US8432011B1 (en) 2011-12-06 2013-04-30 Optiz, Inc. Wire bond interposer package for CMOS image sensor and method of making same
KR20130076286A (ko) * 2011-12-28 2013-07-08 삼성전기주식회사 인쇄회로기판 및 그의 제조방법
US8570669B2 (en) 2012-01-23 2013-10-29 Optiz, Inc Multi-layer polymer lens and method of making same
US8692344B2 (en) 2012-03-16 2014-04-08 Optiz, Inc Back side illuminated image sensor architecture, and method of making same
US9233511B2 (en) 2012-05-10 2016-01-12 Optiz, Inc. Method of making stamped multi-layer polymer lens
US8921759B2 (en) 2012-07-26 2014-12-30 Optiz, Inc. Integrated image sensor package with liquid crystal lens
US9502390B2 (en) 2012-08-03 2016-11-22 Invensas Corporation BVA interposer
US8759930B2 (en) 2012-09-10 2014-06-24 Optiz, Inc. Low profile image sensor package
JP6143104B2 (ja) * 2012-12-05 2017-06-07 株式会社村田製作所 バンプ付き電子部品及びバンプ付き電子部品の製造方法
US9190443B2 (en) 2013-03-12 2015-11-17 Optiz Inc. Low profile image sensor
US9219091B2 (en) 2013-03-12 2015-12-22 Optiz, Inc. Low profile sensor module and method of making same
US9142695B2 (en) 2013-06-03 2015-09-22 Optiz, Inc. Sensor package with exposed sensor array and method of making same
US9398700B2 (en) 2013-06-21 2016-07-19 Invensas Corporation Method of forming a reliable microelectronic assembly
US9070568B2 (en) * 2013-07-26 2015-06-30 Infineon Technologies Ag Chip package with embedded passive component
US9190389B2 (en) 2013-07-26 2015-11-17 Infineon Technologies Ag Chip package with passives
US9167710B2 (en) 2013-08-07 2015-10-20 Invensas Corporation Embedded packaging with preformed vias
US9496247B2 (en) 2013-08-26 2016-11-15 Optiz, Inc. Integrated camera module and method of making same
US9461190B2 (en) 2013-09-24 2016-10-04 Optiz, Inc. Low profile sensor package with cooling feature and method of making same
US9496297B2 (en) 2013-12-05 2016-11-15 Optiz, Inc. Sensor package with cooling feature and method of making same
US9667900B2 (en) 2013-12-09 2017-05-30 Optiz, Inc. Three dimensional system-on-chip image sensor package
US9583411B2 (en) 2014-01-17 2017-02-28 Invensas Corporation Fine pitch BVA using reconstituted wafer with area array accessible for testing
US20150262902A1 (en) 2014-03-12 2015-09-17 Invensas Corporation Integrated circuits protected by substrates with cavities, and methods of manufacture
US9355997B2 (en) 2014-03-12 2016-05-31 Invensas Corporation Integrated circuit assemblies with reinforcement frames, and methods of manufacture
US9637375B2 (en) * 2014-04-15 2017-05-02 Taiwan Semiconductor Manufacturing Company Limited MEMS device having a getter structure and method of forming the same
US9985063B2 (en) 2014-04-22 2018-05-29 Optiz, Inc. Imaging device with photo detectors and color filters arranged by color transmission characteristics and absorption coefficients
US9524917B2 (en) 2014-04-23 2016-12-20 Optiz, Inc. Chip level heat dissipation using silicon
US9165793B1 (en) 2014-05-02 2015-10-20 Invensas Corporation Making electrical components in handle wafers of integrated circuit packages
US9741649B2 (en) 2014-06-04 2017-08-22 Invensas Corporation Integrated interposer solutions for 2D and 3D IC packaging
US9412806B2 (en) 2014-06-13 2016-08-09 Invensas Corporation Making multilayer 3D capacitors using arrays of upstanding rods or ridges
US9252127B1 (en) 2014-07-10 2016-02-02 Invensas Corporation Microelectronic assemblies with integrated circuits and interposers with cavities, and methods of manufacture
US9681558B2 (en) 2014-08-12 2017-06-13 Infineon Technologies Ag Module with integrated power electronic circuitry and logic circuitry
US9666730B2 (en) 2014-08-18 2017-05-30 Optiz, Inc. Wire bond sensor package
US10211158B2 (en) 2014-10-31 2019-02-19 Infineon Technologies Ag Power semiconductor module having a direct copper bonded substrate and an integrated passive component, and an integrated power module
US9543347B2 (en) 2015-02-24 2017-01-10 Optiz, Inc. Stress released image sensor package structure and method
US9478504B1 (en) 2015-06-19 2016-10-25 Invensas Corporation Microelectronic assemblies with cavities, and methods of fabrication
KR101672640B1 (ko) * 2015-06-23 2016-11-03 앰코 테크놀로지 코리아 주식회사 반도체 디바이스
US10276541B2 (en) 2015-06-30 2019-04-30 Taiwan Semiconductor Manufacturing Company, Ltd. 3D package structure and methods of forming same
US10886250B2 (en) 2015-07-10 2021-01-05 Invensas Corporation Structures and methods for low temperature bonding using nanoparticles
US9633971B2 (en) 2015-07-10 2017-04-25 Invensas Corporation Structures and methods for low temperature bonding using nanoparticles
DE112015007213B4 (de) * 2015-12-22 2021-08-19 Intel Corporation Halbleiter-package mit durchgangsbrücken-die-verbindungen und verfahren zum herstellen eines halbleiter-package
TWI822659B (zh) 2016-10-27 2023-11-21 美商艾德亞半導體科技有限責任公司 用於低溫接合的結構和方法
US9996725B2 (en) 2016-11-03 2018-06-12 Optiz, Inc. Under screen sensor assembly
FR3060846B1 (fr) * 2016-12-19 2019-05-24 Institut Vedecom Procede d’integration de puces de puissance et de bus barres formant dissipateurs thermiques
US10181447B2 (en) 2017-04-21 2019-01-15 Invensas Corporation 3D-interconnect
EP4531102A3 (en) 2017-10-25 2025-07-02 AT & S Austria Technologie & Systemtechnik Aktiengesellschaft Embedding component with pre-connected pillar in component carrier
US10340180B1 (en) * 2018-01-16 2019-07-02 Globalfoundries Inc. Merge mandrel features
US11408589B2 (en) 2019-12-05 2022-08-09 Optiz, Inc. Monolithic multi-focus light source device
KR102789025B1 (ko) * 2019-12-16 2025-04-01 삼성전기주식회사 전자부품 내장기판
US12211809B2 (en) 2020-12-30 2025-01-28 Adeia Semiconductor Bonding Technologies Inc. Structure with conductive feature and method of forming same
US12040284B2 (en) 2021-11-12 2024-07-16 Invensas Llc 3D-interconnect with electromagnetic interference (“EMI”) shield and/or antenna

Family Cites Families (68)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3679941A (en) * 1969-09-22 1972-07-25 Gen Electric Composite integrated circuits including semiconductor chips mounted on a common substrate with connections made through a dielectric encapsulator
US5250843A (en) * 1991-03-27 1993-10-05 Integrated System Assemblies Corp. Multichip integrated circuit modules
US5091769A (en) * 1991-03-27 1992-02-25 Eichelberger Charles W Configuration for testing and burn-in of integrated circuit chips
US5111278A (en) * 1991-03-27 1992-05-05 Eichelberger Charles W Three-dimensional multichip module systems
US5353498A (en) * 1993-02-08 1994-10-11 General Electric Company Method for fabricating an integrated circuit module
DE59407670D1 (de) 1993-04-16 1999-03-04 Heinze Dyconex Patente Kern für elektrische Verbindungssubstrate und elektrische Verbindungssubstrate mit Kern, sowie Verfahren zu deren Herstellung
JP2736042B2 (ja) * 1995-12-12 1998-04-02 山一電機株式会社 回路基板
US5841193A (en) * 1996-05-20 1998-11-24 Epic Technologies, Inc. Single chip modules, repairable multichip modules, and methods of fabrication thereof
US6083837A (en) * 1996-12-13 2000-07-04 Tessera, Inc. Fabrication of components by coining
US6081988A (en) * 1998-04-30 2000-07-04 Lockheed Martin Corp. Fabrication of a circuit module with a coaxial transmission line
US6081989A (en) * 1998-04-30 2000-07-04 Lockheed Martin Corporation Fabrication of circuit modules with a transmission line
TW512467B (en) 1999-10-12 2002-12-01 North Kk Wiring circuit substrate and manufacturing method therefor
US6251710B1 (en) * 2000-04-27 2001-06-26 International Business Machines Corporation Method of making a dual damascene anti-fuse with via before wire
US6660626B1 (en) * 2000-08-22 2003-12-09 Charles W. C. Lin Semiconductor chip assembly with simultaneously electrolessly plated contact terminal and connection joint
US6562709B1 (en) * 2000-08-22 2003-05-13 Charles W. C. Lin Semiconductor chip assembly with simultaneously electroplated contact terminal and connection joint
US6511865B1 (en) * 2000-09-20 2003-01-28 Charles W. C. Lin Method for forming a ball bond connection joint on a conductive trace and conductive pad in a semiconductor chip assembly
US6548393B1 (en) * 2000-10-13 2003-04-15 Charles W. C. Lin Semiconductor chip assembly with hardened connection joint
US20050097727A1 (en) * 2001-03-28 2005-05-12 Tomoo Iijima Multi-layer wiring board, method for producing multi-layer wiring board, polishing machine for multi-layer wiring board, and metal sheet for producing wiring board
US6930256B1 (en) * 2002-05-01 2005-08-16 Amkor Technology, Inc. Integrated circuit substrate having laser-embedded conductive patterns and method therefor
US7176506B2 (en) * 2001-08-28 2007-02-13 Tessera, Inc. High frequency chip packages with connecting elements
US6856007B2 (en) * 2001-08-28 2005-02-15 Tessera, Inc. High-frequency chip packages
US6762076B2 (en) * 2002-02-20 2004-07-13 Intel Corporation Process of vertically stacking multiple wafers supporting different active integrated circuit (IC) devices
US6593224B1 (en) * 2002-03-05 2003-07-15 Bridge Semiconductor Corporation Method of manufacturing a multilayer interconnect substrate
US7633765B1 (en) * 2004-03-23 2009-12-15 Amkor Technology, Inc. Semiconductor package including a top-surface metal layer for implementing circuit features
US7548430B1 (en) * 2002-05-01 2009-06-16 Amkor Technology, Inc. Buildup dielectric and metallization process and semiconductor package
US6759264B2 (en) * 2002-05-17 2004-07-06 Ligh Tuning Technology Inc. Pressure type fingerprint sensor fabrication method
DE10228593A1 (de) * 2002-06-26 2004-01-15 Infineon Technologies Ag Elektronisches Bauteil mit einer Gehäusepackung
US20040222518A1 (en) * 2003-02-25 2004-11-11 Tessera, Inc. Ball grid array with bumps
US6700195B1 (en) * 2003-03-26 2004-03-02 Delphi Technologies, Inc. Electronic assembly for removing heat from a flip chip
JP4016340B2 (ja) * 2003-06-13 2007-12-05 ソニー株式会社 半導体装置及びその実装構造、並びにその製造方法
US7495179B2 (en) * 2003-10-06 2009-02-24 Tessera, Inc. Components with posts and pads
US7462936B2 (en) * 2003-10-06 2008-12-09 Tessera, Inc. Formation of circuitry with modification of feature height
US8641913B2 (en) * 2003-10-06 2014-02-04 Tessera, Inc. Fine pitch microcontacts and method for forming thereof
TWI223103B (en) * 2003-10-23 2004-11-01 Ind Tech Res Inst Wire grid polarizer with double metal layers
JP4120562B2 (ja) * 2003-10-31 2008-07-16 沖電気工業株式会社 受動素子チップ、高集積モジュール、受動素子チップの製造方法、及び高集積モジュールの製造方法。
JP2005191100A (ja) * 2003-12-24 2005-07-14 Shinko Electric Ind Co Ltd 半導体基板及びその製造方法
US8207604B2 (en) * 2003-12-30 2012-06-26 Tessera, Inc. Microelectronic package comprising offset conductive posts on compliant layer
US7176043B2 (en) * 2003-12-30 2007-02-13 Tessera, Inc. Microelectronic packages and methods therefor
US7709968B2 (en) * 2003-12-30 2010-05-04 Tessera, Inc. Micro pin grid array with pin motion isolation
US7453157B2 (en) * 2004-06-25 2008-11-18 Tessera, Inc. Microelectronic packages and methods therefor
JP2006019361A (ja) * 2004-06-30 2006-01-19 Sanyo Electric Co Ltd 回路装置およびその製造方法
TWI229433B (en) * 2004-07-02 2005-03-11 Phoenix Prec Technology Corp Direct connection multi-chip semiconductor element structure
US7301239B2 (en) * 2004-07-26 2007-11-27 Taiwan Semiconductor Manufacturing Company, Ltd. Wiring structure to minimize stress induced void formation
WO2006020744A2 (en) * 2004-08-12 2006-02-23 Tessera, Inc. Structure and method of forming capped chips
TW200611612A (en) * 2004-09-29 2006-04-01 Unimicron Technology Corp Process of electrically interconnect structure
JP2006156669A (ja) 2004-11-29 2006-06-15 Dainippon Printing Co Ltd 部品内蔵配線板、部品内蔵配線板の製造方法
JP4761762B2 (ja) 2004-12-03 2011-08-31 ソニーケミカル＆インフォメーションデバイス株式会社 多層配線基板の製造方法
US7317249B2 (en) * 2004-12-23 2008-01-08 Tessera, Inc. Microelectronic package having stacked semiconductor devices and a process for its fabrication
JP4792749B2 (ja) 2005-01-14 2011-10-12 大日本印刷株式会社 電子部品内蔵プリント配線板の製造方法
US7939934B2 (en) * 2005-03-16 2011-05-10 Tessera, Inc. Microelectronic packages and methods therefor
JP4738895B2 (ja) 2005-05-31 2011-08-03 日本メクトロン株式会社 ビルドアップ型多層フレキシブル回路基板の製造方法
JP4826248B2 (ja) * 2005-12-19 2011-11-30 Ｔｄｋ株式会社 Ｉｃ内蔵基板の製造方法
US20080185705A1 (en) * 2005-12-23 2008-08-07 Tessera, Inc. Microelectronic packages and methods therefor
US8058101B2 (en) * 2005-12-23 2011-11-15 Tessera, Inc. Microelectronic packages and methods therefor
WO2007130471A2 (en) * 2006-05-01 2007-11-15 The Charles Stark Draper Laboratory, Inc. Systems and methods for high density multi-component modules
KR100751995B1 (ko) * 2006-06-30 2007-08-28 삼성전기주식회사 인쇄회로기판 및 그 제조방법
US7545029B2 (en) * 2006-08-18 2009-06-09 Tessera, Inc. Stack microelectronic assemblies
US7659631B2 (en) * 2006-10-12 2010-02-09 Hewlett-Packard Development Company, L.P. Interconnection between different circuit types
US7719121B2 (en) * 2006-10-17 2010-05-18 Tessera, Inc. Microelectronic packages and methods therefor
US7550857B1 (en) * 2006-11-16 2009-06-23 Amkor Technology, Inc. Stacked redistribution layer (RDL) die assembly package
US20080150101A1 (en) * 2006-12-20 2008-06-26 Tessera, Inc. Microelectronic packages having improved input/output connections and methods therefor
US7709297B2 (en) * 2006-12-29 2010-05-04 Tessera, Inc. Microelectronic package with thermal access
KR100751955B1 (ko) 2007-05-28 2007-08-27 오원록 배수로 뚜껑을 대량생산하는 이동식 대차구조
JP2011501410A (ja) 2007-10-10 2011-01-06 テッセラ，インコーポレイテッド 頑健な多層配線要素および埋設された超小型電子素子とのアセンブリ
US8330272B2 (en) * 2010-07-08 2012-12-11 Tessera, Inc. Microelectronic packages with dual or multiple-etched flip-chip connectors
US8580607B2 (en) * 2010-07-27 2013-11-12 Tessera, Inc. Microelectronic packages with nanoparticle joining
US8647796B2 (en) * 2011-07-27 2014-02-11 Taiwan Semiconductor Manufacturing Company, Ltd. Photoactive compound gradient photoresist
JP2014013810A (ja) * 2012-07-04 2014-01-23 Seiko Epson Corp 基板、基板の製造方法、半導体装置、及び電子機器

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