JP2011003715A5 - - Google Patents

Download PDF

Info

Publication number
JP2011003715A5
JP2011003715A5 JP2009145430A JP2009145430A JP2011003715A5 JP 2011003715 A5 JP2011003715 A5 JP 2011003715A5 JP 2009145430 A JP2009145430 A JP 2009145430A JP 2009145430 A JP2009145430 A JP 2009145430A JP 2011003715 A5 JP2011003715 A5 JP 2011003715A5
Authority
JP
Japan
Prior art keywords
semiconductor chips
conductive
semiconductor
wiring board
stacked
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2009145430A
Other languages
English (en)
Japanese (ja)
Other versions
JP2011003715A (ja
JP5215244B2 (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP2009145430A priority Critical patent/JP5215244B2/ja
Priority claimed from JP2009145430A external-priority patent/JP5215244B2/ja
Priority to US12/768,938 priority patent/US8058717B2/en
Publication of JP2011003715A publication Critical patent/JP2011003715A/ja
Publication of JP2011003715A5 publication Critical patent/JP2011003715A5/ja
Application granted granted Critical
Publication of JP5215244B2 publication Critical patent/JP5215244B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

JP2009145430A 2009-06-18 2009-06-18 半導体装置 Expired - Fee Related JP5215244B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2009145430A JP5215244B2 (ja) 2009-06-18 2009-06-18 半導体装置
US12/768,938 US8058717B2 (en) 2009-06-18 2010-04-28 Laminated body of semiconductor chips including pads mutually connected to conductive member

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009145430A JP5215244B2 (ja) 2009-06-18 2009-06-18 半導体装置

Publications (3)

Publication Number Publication Date
JP2011003715A JP2011003715A (ja) 2011-01-06
JP2011003715A5 true JP2011003715A5 (enExample) 2012-06-07
JP5215244B2 JP5215244B2 (ja) 2013-06-19

Family

ID=43353539

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009145430A Expired - Fee Related JP5215244B2 (ja) 2009-06-18 2009-06-18 半導体装置

Country Status (2)

Country Link
US (1) US8058717B2 (enExample)
JP (1) JP5215244B2 (enExample)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8680686B2 (en) * 2010-06-29 2014-03-25 Spansion Llc Method and system for thin multi chip stack package with film on wire and copper wire
US9530753B2 (en) * 2011-09-23 2016-12-27 STATS ChipPAC Pte. Ltd. Integrated circuit packaging system with chip stacking and method of manufacture thereof
US9190390B2 (en) 2012-08-22 2015-11-17 Freescale Semiconductor Inc. Stacked microelectronic packages having sidewall conductors and methods for the fabrication thereof
US9064977B2 (en) 2012-08-22 2015-06-23 Freescale Semiconductor Inc. Stacked microelectronic packages having sidewall conductors and methods for the fabrication thereof
US9093457B2 (en) 2012-08-22 2015-07-28 Freescale Semiconductor Inc. Stacked microelectronic packages having patterned sidewall conductors and methods for the fabrication thereof
US8860202B2 (en) * 2012-08-29 2014-10-14 Macronix International Co., Ltd. Chip stack structure and manufacturing method thereof
US9299670B2 (en) 2013-03-14 2016-03-29 Freescale Semiconductor, Inc. Stacked microelectronic packages having sidewall conductors and methods for the fabrication thereof
US9524950B2 (en) 2013-05-31 2016-12-20 Freescale Semiconductor, Inc. Stacked microelectronic packages having sidewall conductors and methods for the fabrication thereof
KR102099878B1 (ko) * 2013-07-11 2020-04-10 삼성전자 주식회사 반도체 패키지
US9036363B2 (en) 2013-09-30 2015-05-19 Freescale Semiconductor, Inc. Devices and stacked microelectronic packages with parallel conductors and intra-conductor isolator structures and methods of their fabrication
US9025340B2 (en) 2013-09-30 2015-05-05 Freescale Semiconductor, Inc. Devices and stacked microelectronic packages with in-trench package surface conductors and methods of their fabrication
US9263420B2 (en) 2013-12-05 2016-02-16 Freescale Semiconductor, Inc. Devices and stacked microelectronic packages with package surface conductors and methods of their fabrication
US9305911B2 (en) 2013-12-05 2016-04-05 Freescale Semiconductor, Inc. Devices and stacked microelectronic packages with package surface conductors and adjacent trenches and methods of their fabrication
US10388607B2 (en) 2014-12-17 2019-08-20 Nxp Usa, Inc. Microelectronic devices with multi-layer package surface conductors and methods of their fabrication
US11031341B2 (en) * 2017-03-29 2021-06-08 Intel Corporation Side mounted interconnect bridges
US20240387461A1 (en) * 2023-05-19 2024-11-21 Western Digital Technologies, Inc. Semiconductor Device Package with Die Stackup and Connection Platform

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5675180A (en) * 1994-06-23 1997-10-07 Cubic Memory, Inc. Vertical interconnect process for silicon segments
JP3476383B2 (ja) * 1999-05-27 2003-12-10 シャープ株式会社 半導体積層パッケージ
JP3681155B2 (ja) * 1999-12-22 2005-08-10 新光電気工業株式会社 電子部品の実装構造、電子部品装置、電子部品の実装方法及び電子部品装置の製造方法
JP3708399B2 (ja) * 2000-03-13 2005-10-19 株式会社東芝 半導体装置及びその製造方法
JP4361670B2 (ja) * 2000-08-02 2009-11-11 富士通マイクロエレクトロニクス株式会社 半導体素子積層体、半導体素子積層体の製造方法、及び半導体装置
JP2002184937A (ja) * 2000-12-18 2002-06-28 Shinko Electric Ind Co Ltd 半導体装置の実装構造
US7215018B2 (en) * 2004-04-13 2007-05-08 Vertical Circuits, Inc. Stacked die BGA or LGA component assembly
JP4424351B2 (ja) * 2004-09-08 2010-03-03 パナソニック株式会社 立体的電子回路装置の製造方法
JP4551321B2 (ja) * 2005-07-21 2010-09-29 新光電気工業株式会社 電子部品実装構造及びその製造方法
JP4566866B2 (ja) * 2005-09-07 2010-10-20 新光電気工業株式会社 半導体パッケージ、半導体パッケージの実装構造、半導体パッケージの製造方法
KR100794658B1 (ko) * 2006-07-07 2008-01-14 삼성전자주식회사 반도체 칩 제조 방법, 이에 의해 형성된 반도체 칩 및 이를포함하는 칩 스택 패키지
KR100813625B1 (ko) * 2006-11-15 2008-03-14 삼성전자주식회사 반도체 소자 패키지
SG146460A1 (en) * 2007-03-12 2008-10-30 Micron Technology Inc Apparatus for packaging semiconductor devices, packaged semiconductor components, methods of manufacturing apparatus for packaging semiconductor devices, and methods of manufacturing semiconductor components
KR100914977B1 (ko) * 2007-06-18 2009-09-02 주식회사 하이닉스반도체 스택 패키지의 제조 방법
JP5110995B2 (ja) * 2007-07-20 2012-12-26 新光電気工業株式会社 積層型半導体装置及びその製造方法
JP5049684B2 (ja) * 2007-07-20 2012-10-17 新光電気工業株式会社 積層型半導体装置及びその製造方法
JP5110996B2 (ja) * 2007-07-20 2012-12-26 新光電気工業株式会社 積層型半導体装置の製造方法
US7781877B2 (en) * 2007-08-07 2010-08-24 Micron Technology, Inc. Packaged integrated circuit devices with through-body conductive vias, and methods of making same
JP2009071095A (ja) * 2007-09-14 2009-04-02 Spansion Llc 半導体装置の製造方法
TWI355061B (en) * 2007-12-06 2011-12-21 Nanya Technology Corp Stacked-type chip package structure and fabricatio
KR101472900B1 (ko) * 2007-12-06 2014-12-15 페어차일드코리아반도체 주식회사 몰디드 리드리스 패키지 및 그 제조방법
TW200931634A (en) * 2008-01-10 2009-07-16 Abounion Technology Corp Multi-channel stacked semiconductor device and method for fabricating the same, and stacking substrate applied to the semiconductor device
JP5136449B2 (ja) * 2009-02-06 2013-02-06 富士通株式会社 半導体装置の製造方法

Similar Documents

Publication Publication Date Title
JP2011003715A5 (enExample)
KR102734944B1 (ko) 반도체 패키지
WO2011142581A3 (ko) 적층형 반도체 패키지
WO2010104610A8 (en) Stacked microelectronic assembly with microelectronic elements having vias extending through bond pads
JP2011119732A5 (ja) 発光ダイオードパッケージ、及び発光ダイオードパッケージモジュール
JP2010278318A5 (enExample)
TW200737482A (en) Stack package utilizing through vias and re-distribution lines
JP2010251662A5 (enExample)
JP2006093189A5 (enExample)
JP2011044654A5 (enExample)
WO2008153043A1 (ja) 半導体発光装置
IN2012DN03251A (enExample)
JP2009141169A5 (enExample)
WO2011162504A3 (ko) 적층형 반도체 패키지
CN101872757B (zh) 凹穴芯片封装结构及使用其的层叠封装结构
US20120248628A1 (en) Semiconductor device and method of fabricating the same
CN105723508B (zh) 半导体模块
JP2012099352A5 (enExample)
JP2014127706A5 (ja) 半導体装置の製造方法
JP2010147096A5 (enExample)
CN101728372A (zh) 包含安装在引线框上的半导体芯片的半导体装置
US20080237855A1 (en) Ball grid array package and its substrate
WO2009004870A1 (ja) 半導体パッケージ
US8736075B2 (en) Semiconductor chip module, semiconductor package having the same and package module
JP2017028155A5 (enExample)