JP2010157700A5 - - Google Patents

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Publication number
JP2010157700A5
JP2010157700A5 JP2009269279A JP2009269279A JP2010157700A5 JP 2010157700 A5 JP2010157700 A5 JP 2010157700A5 JP 2009269279 A JP2009269279 A JP 2009269279A JP 2009269279 A JP2009269279 A JP 2009269279A JP 2010157700 A5 JP2010157700 A5 JP 2010157700A5
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JP
Japan
Prior art keywords
chemical vapor
vapor deposition
nucleation layer
semiconductor
group
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2009269279A
Other languages
English (en)
Japanese (ja)
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JP2010157700A (ja
Filing date
Publication date
Priority claimed from US12/347,721 external-priority patent/US8236691B2/en
Application filed filed Critical
Publication of JP2010157700A publication Critical patent/JP2010157700A/ja
Publication of JP2010157700A5 publication Critical patent/JP2010157700A5/ja
Pending legal-status Critical Current

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JP2009269279A 2008-12-31 2009-11-05 高アスペクト比プラグの充填方法 Pending JP2010157700A (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US12/347,721 US8236691B2 (en) 2008-12-31 2008-12-31 Method of high aspect ratio plug fill

Publications (2)

Publication Number Publication Date
JP2010157700A JP2010157700A (ja) 2010-07-15
JP2010157700A5 true JP2010157700A5 (enExample) 2012-12-20

Family

ID=42221054

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009269279A Pending JP2010157700A (ja) 2008-12-31 2009-11-05 高アスペクト比プラグの充填方法

Country Status (5)

Country Link
US (1) US8236691B2 (enExample)
JP (1) JP2010157700A (enExample)
CN (1) CN101770978B (enExample)
DE (1) DE102009052393B8 (enExample)
TW (1) TWI415218B (enExample)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10256142B2 (en) 2009-08-04 2019-04-09 Novellus Systems, Inc. Tungsten feature fill with nucleation inhibition
US12444651B2 (en) 2009-08-04 2025-10-14 Novellus Systems, Inc. Tungsten feature fill with nucleation inhibition
JP6273257B2 (ja) * 2012-03-27 2018-01-31 ノベラス・システムズ・インコーポレーテッドNovellus Systems Incorporated タングステンによるフィーチャ充填
US11437269B2 (en) 2012-03-27 2022-09-06 Novellus Systems, Inc. Tungsten feature fill with nucleation inhibition
CN104157562A (zh) * 2014-08-26 2014-11-19 上海华虹宏力半导体制造有限公司 半导体结构的形成方法
US9997405B2 (en) 2014-09-30 2018-06-12 Lam Research Corporation Feature fill with nucleation inhibition
US9972504B2 (en) 2015-08-07 2018-05-15 Lam Research Corporation Atomic layer etching of tungsten for enhanced tungsten deposition fill
US9640482B1 (en) * 2016-04-13 2017-05-02 United Microelectronics Corp. Semiconductor device with a contact plug and method of fabricating the same
KR102441431B1 (ko) * 2016-06-06 2022-09-06 어플라이드 머티어리얼스, 인코포레이티드 표면을 갖는 기판을 프로세싱 챔버에 포지셔닝하는 단계를 포함하는 프로세싱 방법
US10573522B2 (en) 2016-08-16 2020-02-25 Lam Research Corporation Method for preventing line bending during metal fill process
WO2019036292A1 (en) 2017-08-14 2019-02-21 Lam Research Corporation METHOD FOR METAL CASTING FOR THREE-DIMENSIONAL NAND AND VERTICAL WORDS LINE
JP2021523292A (ja) 2018-05-03 2021-09-02 ラム リサーチ コーポレーションLam Research Corporation 3d nand構造内にタングステンおよび他の金属を堆積させる方法
KR102828798B1 (ko) 2018-12-05 2025-07-02 램 리써치 코포레이션 보이드 프리 (void free) 저응력 (low stress) 충진
CN113424300B (zh) 2018-12-14 2025-05-09 朗姆研究公司 在3d nand结构上的原子层沉积
SG11202108725XA (en) 2019-02-13 2021-09-29 Lam Res Corp Tungsten feature fill with inhibition control
WO2020210260A1 (en) 2019-04-11 2020-10-15 Lam Research Corporation High step coverage tungsten deposition
WO2020236749A1 (en) 2019-05-22 2020-11-26 Lam Research Corporation Nucleation-free tungsten deposition
KR20220047333A (ko) 2019-08-12 2022-04-15 램 리써치 코포레이션 텅스텐 증착

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Publication number Priority date Publication date Assignee Title
CA2061119C (en) * 1991-04-19 1998-02-03 Pei-Ing P. Lee Method of depositing conductors in high aspect ratio apertures
JP3149887B2 (ja) * 1991-11-08 2001-03-26 新日本製鐵株式会社 スパッタ成膜方法及びスパッタ成膜装置
JPH08191054A (ja) * 1995-01-10 1996-07-23 Kawasaki Steel Corp 半導体装置及びその製造方法
JPH08213610A (ja) * 1995-02-07 1996-08-20 Sony Corp 電界効果型半導体装置及びその製造方法
US5757879A (en) * 1995-06-07 1998-05-26 International Business Machines Corporation Tungsten absorber for x-ray mask
US6406998B1 (en) * 1996-02-05 2002-06-18 Micron Technology, Inc. Formation of silicided contact by ion implantation
JPH1064848A (ja) * 1996-08-13 1998-03-06 Toshiba Corp 半導体装置の製造装置および製造方法
US5918141A (en) * 1997-06-20 1999-06-29 National Semiconductor Corporation Method of masking silicide deposition utilizing a photoresist mask
US6696746B1 (en) * 1998-04-29 2004-02-24 Micron Technology, Inc. Buried conductors
KR100319681B1 (ko) * 1998-12-02 2002-01-09 가네꼬 히사시 전계 효과 트랜지스터 및 그 제조 방법
US6686278B2 (en) * 2001-06-19 2004-02-03 United Microelectronics Corp. Method for forming a plug metal layer
TWI270180B (en) * 2004-06-21 2007-01-01 Powerchip Semiconductor Corp Flash memory cell and manufacturing method thereof
ITMI20070446A1 (it) * 2007-03-06 2008-09-07 St Microelectronics Srl Processo perfabbricare circuiti integrati formati su un substrato seminconduttore e comprendenti strati di tungsteno
US8372744B2 (en) * 2007-04-20 2013-02-12 International Business Machines Corporation Fabricating a contact rhodium structure by electroplating and electroplating composition
KR20090074561A (ko) * 2008-01-02 2009-07-07 주식회사 하이닉스반도체 반도체소자의 컨택 형성방법
US20100065949A1 (en) * 2008-09-17 2010-03-18 Andreas Thies Stacked Semiconductor Chips with Through Substrate Vias

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