TWI415218B - 高縱橫比栓塞填充方法 - Google Patents

高縱橫比栓塞填充方法 Download PDF

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Publication number
TWI415218B
TWI415218B TW098140387A TW98140387A TWI415218B TW I415218 B TWI415218 B TW I415218B TW 098140387 A TW098140387 A TW 098140387A TW 98140387 A TW98140387 A TW 98140387A TW I415218 B TWI415218 B TW I415218B
Authority
TW
Taiwan
Prior art keywords
layer
nucleation
sidewalls
semiconductor
hole
Prior art date
Application number
TW098140387A
Other languages
English (en)
Chinese (zh)
Other versions
TW201029112A (en
Inventor
Yakov Shor
Semeon Altshuler
Maor Rotlain
Yigal Alon
Dror Horvitz
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Publication of TW201029112A publication Critical patent/TW201029112A/zh
Application granted granted Critical
Publication of TWI415218B publication Critical patent/TWI415218B/zh

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28568Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising transition metals
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28518Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H01L21/76879Filling of holes, grooves or trenches, e.g. vias, with conductive material by selective deposition of conductive material in the vias, e.g. selective C.V.D. on semiconductor material, plating

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
TW098140387A 2008-12-31 2009-11-26 高縱橫比栓塞填充方法 TWI415218B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US12/347,721 US8236691B2 (en) 2008-12-31 2008-12-31 Method of high aspect ratio plug fill

Publications (2)

Publication Number Publication Date
TW201029112A TW201029112A (en) 2010-08-01
TWI415218B true TWI415218B (zh) 2013-11-11

Family

ID=42221054

Family Applications (1)

Application Number Title Priority Date Filing Date
TW098140387A TWI415218B (zh) 2008-12-31 2009-11-26 高縱橫比栓塞填充方法

Country Status (5)

Country Link
US (1) US8236691B2 (enExample)
JP (1) JP2010157700A (enExample)
CN (1) CN101770978B (enExample)
DE (1) DE102009052393B8 (enExample)
TW (1) TWI415218B (enExample)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10256142B2 (en) 2009-08-04 2019-04-09 Novellus Systems, Inc. Tungsten feature fill with nucleation inhibition
US12444651B2 (en) 2009-08-04 2025-10-14 Novellus Systems, Inc. Tungsten feature fill with nucleation inhibition
JP6273257B2 (ja) * 2012-03-27 2018-01-31 ノベラス・システムズ・インコーポレーテッドNovellus Systems Incorporated タングステンによるフィーチャ充填
US11437269B2 (en) 2012-03-27 2022-09-06 Novellus Systems, Inc. Tungsten feature fill with nucleation inhibition
CN104157562A (zh) * 2014-08-26 2014-11-19 上海华虹宏力半导体制造有限公司 半导体结构的形成方法
US9997405B2 (en) 2014-09-30 2018-06-12 Lam Research Corporation Feature fill with nucleation inhibition
US9972504B2 (en) 2015-08-07 2018-05-15 Lam Research Corporation Atomic layer etching of tungsten for enhanced tungsten deposition fill
US9640482B1 (en) * 2016-04-13 2017-05-02 United Microelectronics Corp. Semiconductor device with a contact plug and method of fabricating the same
KR102441431B1 (ko) * 2016-06-06 2022-09-06 어플라이드 머티어리얼스, 인코포레이티드 표면을 갖는 기판을 프로세싱 챔버에 포지셔닝하는 단계를 포함하는 프로세싱 방법
US10573522B2 (en) 2016-08-16 2020-02-25 Lam Research Corporation Method for preventing line bending during metal fill process
WO2019036292A1 (en) 2017-08-14 2019-02-21 Lam Research Corporation METHOD FOR METAL CASTING FOR THREE-DIMENSIONAL NAND AND VERTICAL WORDS LINE
JP2021523292A (ja) 2018-05-03 2021-09-02 ラム リサーチ コーポレーションLam Research Corporation 3d nand構造内にタングステンおよび他の金属を堆積させる方法
KR102828798B1 (ko) 2018-12-05 2025-07-02 램 리써치 코포레이션 보이드 프리 (void free) 저응력 (low stress) 충진
CN113424300B (zh) 2018-12-14 2025-05-09 朗姆研究公司 在3d nand结构上的原子层沉积
SG11202108725XA (en) 2019-02-13 2021-09-29 Lam Res Corp Tungsten feature fill with inhibition control
WO2020210260A1 (en) 2019-04-11 2020-10-15 Lam Research Corporation High step coverage tungsten deposition
WO2020236749A1 (en) 2019-05-22 2020-11-26 Lam Research Corporation Nucleation-free tungsten deposition
KR20220047333A (ko) 2019-08-12 2022-04-15 램 리써치 코포레이션 텅스텐 증착

Citations (3)

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US5757879A (en) * 1995-06-07 1998-05-26 International Business Machines Corporation Tungsten absorber for x-ray mask
US6180513B1 (en) * 1996-08-13 2001-01-30 Kabushiki Kaisha Toshiba Apparatus and method for manufacturing a semiconductor device having a multi-wiring layer structure
US20060033181A1 (en) * 1998-04-29 2006-02-16 Micron Technology, Inc. Buried conductors

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CA2061119C (en) * 1991-04-19 1998-02-03 Pei-Ing P. Lee Method of depositing conductors in high aspect ratio apertures
JP3149887B2 (ja) * 1991-11-08 2001-03-26 新日本製鐵株式会社 スパッタ成膜方法及びスパッタ成膜装置
JPH08191054A (ja) * 1995-01-10 1996-07-23 Kawasaki Steel Corp 半導体装置及びその製造方法
JPH08213610A (ja) * 1995-02-07 1996-08-20 Sony Corp 電界効果型半導体装置及びその製造方法
US6406998B1 (en) * 1996-02-05 2002-06-18 Micron Technology, Inc. Formation of silicided contact by ion implantation
US5918141A (en) * 1997-06-20 1999-06-29 National Semiconductor Corporation Method of masking silicide deposition utilizing a photoresist mask
KR100319681B1 (ko) * 1998-12-02 2002-01-09 가네꼬 히사시 전계 효과 트랜지스터 및 그 제조 방법
US6686278B2 (en) * 2001-06-19 2004-02-03 United Microelectronics Corp. Method for forming a plug metal layer
TWI270180B (en) * 2004-06-21 2007-01-01 Powerchip Semiconductor Corp Flash memory cell and manufacturing method thereof
ITMI20070446A1 (it) * 2007-03-06 2008-09-07 St Microelectronics Srl Processo perfabbricare circuiti integrati formati su un substrato seminconduttore e comprendenti strati di tungsteno
US8372744B2 (en) * 2007-04-20 2013-02-12 International Business Machines Corporation Fabricating a contact rhodium structure by electroplating and electroplating composition
KR20090074561A (ko) * 2008-01-02 2009-07-07 주식회사 하이닉스반도체 반도체소자의 컨택 형성방법
US20100065949A1 (en) * 2008-09-17 2010-03-18 Andreas Thies Stacked Semiconductor Chips with Through Substrate Vias

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5757879A (en) * 1995-06-07 1998-05-26 International Business Machines Corporation Tungsten absorber for x-ray mask
US6180513B1 (en) * 1996-08-13 2001-01-30 Kabushiki Kaisha Toshiba Apparatus and method for manufacturing a semiconductor device having a multi-wiring layer structure
US20060033181A1 (en) * 1998-04-29 2006-02-16 Micron Technology, Inc. Buried conductors

Also Published As

Publication number Publication date
US8236691B2 (en) 2012-08-07
TW201029112A (en) 2010-08-01
DE102009052393B4 (de) 2017-11-16
CN101770978B (zh) 2014-04-16
DE102009052393A1 (de) 2010-07-01
JP2010157700A (ja) 2010-07-15
DE102009052393B8 (de) 2018-02-08
US20100167532A1 (en) 2010-07-01
CN101770978A (zh) 2010-07-07

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