CN109661481A - 使用MoOC14的CVD Mo沉积 - Google Patents

使用MoOC14的CVD Mo沉积 Download PDF

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CN109661481A
CN109661481A CN201780054079.8A CN201780054079A CN109661481A CN 109661481 A CN109661481 A CN 109661481A CN 201780054079 A CN201780054079 A CN 201780054079A CN 109661481 A CN109661481 A CN 109661481A
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molybdenum
substrate
moocl
diborane
deposition
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CN109661481B (zh
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T·H·鲍姆
P·S·H·陈
R·赖特
B·亨德里克斯
孟双
R·阿西翁
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Entegris Inc
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Abstract

本发明描述一种在衬底上形成含钼材料的方法,其中在气相沉积条件下将所述衬底与四氯氧化钼(MoOCl4)蒸气接触以在所述衬底上沉积所述含钼材料。在各种实施方案中,可采用所述衬底的二硼烷接触以建立用于(例如)通过例如脉冲化学气相沉积CVD的CVD技术的钼的后续块状沉积的有利成核条件。

Description

使用MoOCl4的CVD Mo沉积
技术领域
本发明涉及含钼材料的气相沉积。特定来说(但非排他性地),本发明涉及使用四氯氧化钼(MoOCl4)作为用于此沉积的前驱体。
背景技术
由于其极高熔点、低热膨胀系数、低电阻率及高导热性的特性,钼越来越多地用于制造半导体装置,包含用于扩散屏障、电极、光掩模、电力电子衬底、低电阻率栅极及互连件中。
此利用已激发用以实现用于特性在于经沉积膜的高保形性及高沉积速率的此类应用的钼膜的沉积以适应有效高体积制造操作的努力。此又已通知用以开发可用于气相沉积操作中的经改进钼源试剂以及利用此类试剂的经改进工艺流程的努力。
五氯化钼最常用作用于含钼材料的化学气相沉积的钼源。然而,仍需要实现具有更高沉积速率的含钼材料的沉积来适应高效高体积制造操作。
发明内容
本发明涉及含钼材料的气相沉积,且更具体来说,涉及使用四氯氧化钼(MoOCl4)作为用于此气相沉积的源试剂,以及采用四氯氧化钼(MoOCl4)作为源试剂的过程及装置。
在一个方面中,本发明涉及一种在衬底上形成含钼材料的方法,其包括在气相沉积条件下将所述衬底与四氯氧化钼(MoOCl4)蒸气接触以在所述衬底上沉积所述含钼材料。
在各种实施利中,本发明涉及一种在衬底上形成含钼材料的方法,其包括:在接触条件下将所述衬底与二硼烷接触,从而在所述衬底上建立成核表面;及通过利用四氯氧化钼(MoOCl4)前驱体的气相沉积工艺而在所述成核表面上沉积钼以在所述衬底上产生所述含钼材料。
从后续描述及所附权利要求书将更完全明白本发明的其它方面、特征及实施例。
附图说明
图1是四氯氧化钼的热重量分析(TGA)的图表。
图2是包括根据本发明的实施例沉积的含钼材料的半导体装置结构的示意性横截面正视图。
图3展示说明来自实例1的结果的四氯氧化钼(MoOCl4)/氢(H2)沉积曲线。
图4是针对根据实例1的通过MoOCl4/H2过程的钼的沉积的依据厚度而变化的电阻率的图表。
图5及图6是根据实例2形成的经沉积钼膜的扫描电子显微照片(SEM)图像。
图7是针对根据实例3的通过MoOCl4/H2过程的钼的沉积的依据沉积时间而变化的钼厚度的图表。
图8是针对根据实例4的通过MoOCl4/H2过程进行的钼沉积的依据钼厚度而变化的膜电阻率的图表。
图9是针对根据实例5的钼沉积的比较依据运行数目而变化的沉积速率的图表。
图10是根据实例6比较依据钼膜厚度而变化的经沉积钼膜的膜电阻率的图表。
图11是说明来自实例7的结果的依据二硼烷浸泡时间而变化的钼膜厚度的图表。
图12及13是实例8中形成的膜沉积的SEM显微照片。
图14及15是在实例9中形成的通孔中的经沉积膜的SEM图像。
图16是针对根据实例10的沉积工艺的依据二硼烷浸泡时间而变化的钼厚度及电阻率的图表。
图17是针对根据实例11的沉积工艺的依据MoOCl4/H2曝露时间而变化的钼厚度及电阻率的图表。
图18是根据实例12沉积的钼膜的SEM图像。
图19是根据实例12沉积的钼膜的SEM横截面图像。
图20是根据实例13的依据阶段温度而变化的钼厚度及电阻率的图表,其展示针对不使用二硼烷成核的MoOCl4/H2过程的反应速率限制体系。
图21是根据实例13的依据阶段温度而变化的钼厚度及电阻率的图表,其展示针对使用二硼烷成核的MoOCl4/H2过程的反应速率限制体系。
图22是针对如不使用成核(Δ)进行及如使用成核(○)进行的MoOCl4/H2反应的活化能的阿瑞尼氏(Arrhenius)图(K=A e-Ea/RT)。
图23及24展示通过如在实例15中进行的成核及CVD块状钼沉积MoOCl4/H2过程的通孔结构上的阶梯覆盖率。
图25、26及27展示根据实例16的使用钼沉积的相应通孔结构。
图28、29及30展示根据实例17的使用钼沉积的相应通孔结构。
图31、32及33展示根据实例18的使用钼沉积的相应通孔结构。
图34、35及36是根据实例19的使用钼沉积的通孔结构的SEM图像。
图37及38是根据实例20的使用钼沉积的通孔结构的SEM图像。
图39及40是根据实例21的使用钼沉积的通孔结构的SEM图像。
具体实施方式
本发明涉及钼的气相沉积,且涉及(例如)在其中期望具有优越保形性及性能性质的钼膜的半导体装置的制造中使用四氯氧化钼(MoOCl4)用于此沉积。
根据本发明,已发现四氯氧化钼(MoOCl4)在例如化学气相沉积的气相沉积工艺中提供具有高保形特性的低电阻率、高沉积速率膜。
一方面,本发明涉及在衬底上形成含钼材料的方法,其包括在气相沉积条件下将衬底与四氯氧化钼(MoOCl4)蒸气接触以在衬底上沉积含钼材料。
已发现,在本发明的各种实施例中,使用四氯氧化钼(MoOCl4)作为用于含钼材料在衬底上的气相沉积的前驱体可提供如由横截面扫描电子显微成像技术确定的惊人的高程度的保形性,接近100%的保形性。有利地,(MoOCl4)、四氯氧化钼(MoOCl4)的沉积可按高于五氯化钼(MoCl5)的沉积的速率进行。此外,惊人地,尽管在四氯氧化钼(MoOCl4)的结构中存在氧,但含钼材料可具有低电阻率及氧含量。
在各种实施例中,方法包括在衬底上建立成核表面且衬底与四氯氧化钼(MoOCl4)蒸气的所述接触包括将衬底的成核表面与四氯氧化钼(MoOCl4)蒸气接触以在衬底上沉积含钼材料。
成核表面可有利地促成低电阻率含钼材料在较低温度下在衬底上的沉积。
在衬底上建立成核表面可适合地包括将衬底与二硼烷蒸气且任选地分开地与四氯氧化钼(MoOCl4)蒸气接触。有利地,建立成核表面可包括将衬底与二硼烷蒸气且分开地与四氯氧化钼(MoOCl4)蒸气接触的多个循环。在各种实施例中,氮化钛层与二硼烷蒸气的接触在从300℃到450℃的范围中的温度下进行。
有利地,可脉冲化气相沉积条件。已发现,此可改进沉积的阶梯覆盖率。适合地,经脉冲沉积的“脉冲”及“清除”时间可各自独立地在从1秒到20秒的范围中。
在各种实施例中,蒸气条件经选择使得经沉积含钼材料具有最多20μΩ·cm,任选地最多15μΩ·cm的电阻率。
适合地,可在从400℃到750℃的范围中、或在从400℃到600℃的范围中或在从400℃到575℃的围中的阶段)温度下沉积含钼材料。适合地,可在从450℃到750℃的范围中、或在从450℃到600℃的范围中或在从450℃到575℃的范围中的(阶段)温度下沉积含钼材料。适合地,可在从500℃到750℃的范围中、或在从500℃到600℃的范围中或在从500℃到575℃的范围中的(阶段)温度下沉积含钼材料。
在各种实施例中,气相沉积条件包括惰性氛围,除了存在任选还原剂(例如氢)的情况之外。适合地,可在实质上它金属蒸气的情况下沉积四氯氧化钼(MoOCl4)蒸气。
方法可包括使四氯氧化钼(MoOCl4)挥发以形成用于气相沉积操作的四氯氧化钼(MoOCl4)蒸气。气相沉积条件可具有任何适合类型,且可(例如)包括还原环境,使得含钼材料包括元素钼材料。含钼材料可包括元素钼或氧化钼或其它含钼材料,或替代地由或基本上由元素钼或氧化钼或其它含钼材料组成。
本发明的方法中利用的衬底可具有任何适合类型,且可(例如)包括半导体装置衬底,例如,硅衬底、二氧化硅衬底或其它硅基衬底。在各种实施例中,衬底可包括TiN、Mo、MoC、B、SiO2、W及WCN中的一或多者。
有利地,(例如)在例如二氧化硅的氧化物衬底或替代地硅或多晶硅衬底的情况中,衬底可经处理或制造以在其上包含用于随后经沉积材料的屏障层(例如,氮化钛)。举例来说,衬底可包括氮化钛层上的成核层,其中含钼材料在附属工艺流程序列中沉积于成核层上。
此成核层或表面可(例如)通过脉冲化CVD或ALD或其它气相沉积技术形成,且此成核层的形成可通过将氮化钛层与二硼烷蒸气且分开地与四氯氧化钼(MoOCl4)蒸气接触而实行。可交替地且重复地实行相应硼烷蒸气及四氯氧化钼(MoOCl4)蒸气接触步骤达如用以形成具有所要厚度的成核层所期望的数目个循环。用于此成核层形成的工艺条件可包括任何适合所要温度、压力、流率及其它工艺条件。在各种实施例中,在从300℃到450℃的范围中的温度下进行氮化钛层与二硼烷蒸气的接触。在各种实施例中,在从400℃到575℃的范围或如上文针对(MoOCl4)气相沉积定义的另一范围中的温度下进行氮化钛层与四氯氧化钼(MoOCl4)蒸气的接触。
在通过将衬底与二硼烷蒸气且分开地与四氯氧化钼(MoOCl4)蒸气接触而形成成核层之后,可将含钼材料沉积于成核层上以形成元素钼或氧化钼或其它含钼化合物或组合物的块状沉积。
在各种实施例中,在从400℃到575℃的范围或如上文针对(MoOCl4)气相沉积定义的另一范围中的温度下将含钼材料沉积于成核层或表面上。工艺可经实行以使得气相沉积条件产生元素钼的沉积作为在衬底的成核层上的含钼材料。气相沉积条件可具有任何适合特性,且可(例如)包括存在氢或其它还原气体,以在成核层上形成元素钼的块状层。
更一般来说,根据本发明的在衬底上形成含钼材料的广泛方法可包括包含氢或其它还原气体的存在的气相沉积条件。可在存在或缺乏氢的情况下将含钼材料沉积于屏障层或成核层或表面上。举例来说,屏障层可由氮化钛构成,且氮化钛层可在存在氢的情况下与四氯氧化钼(MoOCl4)蒸气接触。
应了解,可以许多替代方式且在多种工艺条件下实行本发明的方法。可(例如)在用于在衬底上制造半导体装置的工艺中实行本发明的方法。半导体装置可具有任何适合类型,且可(例如)包括DRAM装置、3-D NAND装置或其它装置或装置前驱体结构。在各种实施例中,衬底可包括其中沉积含钼材料的通孔。通孔可(例如)具有在从20:1到30:1的范围中的深度对横向尺寸的纵横比。
根据本发明的用于沉积含钼材料的工艺化学过程可包含元素钼Mo(0)通过反应MoOCl4+3H2→Mo+4HCl+H2O的沉积。如上文描述那样通过将衬底与二硼烷及MoOCl4连续接触以形成成核层而形成的成核层或表面可涉及2MoOCl4+B2H6→2Mo+2BOCl+6HCl的形成反应。
根据本发明的方法沉积的含钼材料可以任何适当评估度量及参数表征,例如含钼材料的沉积速率、经沉积含钼材料的膜电阻率、经沉积含钼材料的膜形态、经沉积含钼材料的膜应力、材料的阶梯覆盖率及适当工艺条件的工艺窗或工艺包络。可采用任何适当评估度量及参数来表征经沉积材料且将经沉积材料与特定工艺条件相关以实现对应半导体产品的大量生产。
在各种实施例中,本发明涉及一种在衬底上形成含钼材料的方法,其包括:在接触条件下将衬底与二硼烷接触,从而在衬底上建立成核表面;及通过利用四氯氧化钼(MoOCl4)前驱体的气相沉积工艺而将钼沉积于成核表面上以在衬底上产生含钼材料。
可如本文中不同地描述那样以任何适合方式实行此方法。在特定实施例中,可使用包括化学气相沉积(例如,经脉冲化化学气相沉积)的气相沉积工艺进行此方法。可实行所述方法使得所得含钼材料基本上由元素钼构成,且在各种实施例中,可在存在氢或其它适合还原气体的情况下将钼沉积于成核表面上。可在制造半导体产品(例如DRAM装置或3-DNAND装置)时实行所述方法。
一般来说,可实行用于在衬底上形成含钼材料的本发明的方法以实现按高水平的阶梯覆盖率(例如,从90%到110%的阶梯覆盖率)沉积含钼材料。
从下文陈述的说明性实施例及说明性实例的后续描述将更完全明白本发明的方法的特征及优点。
首先参考图1,其中展示绘制为依据温度(以摄氏度为单位)而变化的重量百分比的四氯氧化钼的热重量分析(TGA)的图表,其展示四氯氧化钼的热行为的特性。显著地,四氯氧化钼(MoOCl4)的T50比五氯化钼(MoCl5)的T50低大约20℃。
参考图2,包括根据本发明的实施例沉积的含钼材料的半导体装置结构包含二氧化硅(SiO2)的基底层,氮化钛(TiN)的屏障层上覆于所述基底层,通过将衬底与四氯氧化钼(MoOCl4)及二硼烷接触而在所述屏障层上方形成成核层,其中在存在氢(H2)的情况下在来自四氯氧化钼(MoOCl4)的成核层上作为上层沉积元素钼(Mo)层。
可通过以下过程步骤序列在包括二氧化硅基底层上的氮化钛屏障层的衬底上制造图2的半导体装置。
步骤1:(例如)在从300℃到450℃的范围中的温度下,将衬底的屏障层(TiN层)与二硼烷(B2H6)脉冲接触;
步骤2:泵抽/清除沉积腔室;
步骤3:(例如)在大约500℃的温度下,在存在氢(H2)或氩(Ar)的情况下,将衬底的屏障层(TiN层)与五氯化钼(MoCl5)或四氯氧化钼(MoOCl4)蒸气脉冲接触;
步骤4:泵抽/清除沉积腔室;
步骤5:重复步骤1到4(任选)以形成具有所要特性的成核层;及
步骤6:通过(例如)在大约500℃的温度下,在存在氢(H2)的情况下,将衬底与四氯氧化钼(MoOCl4)蒸气接触而在成核层上沉积块状钼。
步骤1到5是任选的且如果不需要成核层,就可省去。
实例1-沉积速率研究
利用以下工艺条件实行使用四氯氧化钼(MoOCl4)/氢(H2)的化学气相沉积(CVD)钼沉积:其中维持衬底的700℃阶段;从其施配四氯氧化钼(MoOCl4)前驱体用于气相沉积操作的70℃安瓿;气相沉积操作中的60托压力;每分钟50标准立方厘米(sccm)氩载气流;及每分钟2000标准立方英尺(sccm)的氢(H2)。
在图3及图4中展示沉积的结果。数据展示在700℃下的化学气相沉积(CVD)四氯氧化钼(MoOCl4)/氢(H2)沉积工艺在安瓿设置为70℃的温度的情况下展现大约 的高沉积速率。
实例2-SEM研究
图5及图6是通过涉及以下工艺条件的CVD四氯氧化钼(MoOCl4)/氢(H2)沉积工艺形成的经沉积钼膜的扫描电子显微照片(SEM)图像:安瓿温度=70℃;阶段温度=700℃;压力=60托;氩载气流率=50sccm;氩清除气体流率=0sccm;氢气流率=2000sccm;沉积时间=300秒;在沉积之前的在沉积之后的及经沉积钼的电阻率=15.1μΩ·cm。图5及图6展示具有相对大晶粒大小的均匀沉积的钼膜。
实例3-温度及厚度研究
图7是依据沉积时间(以秒为单位)而变化的钼厚度(以埃为单位)的图表,其是针对如在550℃(底部曲线)、600℃(在600℃处的从底部的第二曲线)、650℃(在600℃处的从底部的第三曲线)及700℃(在600℃处的顶部曲线)的温度下的相应运行中实行的通过MoOCl4/H2过程、70℃的安瓿温度、60托的压力、50sccm的氩载气流率及2000sccm的氢气流率的钼的沉积。不使用成核层的通过MoOCl4/H2过程的钼的化学气相沉积展示550℃处的温度截止。从600℃到700℃(阶段温度)的沉积速率类似。
实例4-温度及电阻率研究
图8是依据钼厚度(以埃为单位)而变化的膜电阻率(以μΩ·cm为单位)的图表,其是针对通过MoOCl4/H2过程在70℃安瓿温度、60托压力、50sccm氩载气流率及2000sccm氢气流率的条件下进行的钼沉积,其中在600℃(顶部曲线)、650℃(中间曲线)及700℃(底部曲线)的温度下在单独运行中进行过程。数据展示相较于700℃的过程,在600℃及650℃下进行的过程展示稍微更高的电阻率。在700℃的阶段温度下,针对大约的钼膜厚度,膜电阻率下降到大约11μΩ·cm。
实例5-与MoCl5的比较-长期沉积研究
图9是依据运行数目而变化的沉积速率(以埃/分钟为单位)的图表,其是针对使用四氯氧化钼(MoOCl4)作为钼前驱体(○)的钼沉积及针对使用升华五氯化钼(MoCl5)作为钼前驱体(Δ)的钼沉积。两个情况中的工艺条件如下:安瓿温度=70℃;压力=60托;氩载气流率=50sccm;氢气流率=2000sccm。
图9中的结果展示使用四氯氧化钼(MoOCl4)作为钼前驱体的钼沉积展现稳定及高沉积速率,而升华五氯化钼(MoCl5)展示稳定及低沉积速率。
由MoOCl4形成的钼膜的二次离子质谱法(SIMS)分析验证块状钼中的氧浓度远低于1%,其使用针对块状钼的大约6.4x 1022cm-3的数密度。
实例6-与MoCl5的比较-电阻率研究
图10是依据钼膜厚度(以埃为单位)而变化的经沉积钼膜(以μΩ·cm为单位)的膜电阻率的图表,其是针对在700℃下进行的CVD沉积工艺、针对使用未纯化MoCl5前驱体(Δ)沉积的钼膜、使用升华MoCl5前驱体(□)沉积的钼膜及使用四氯氧化钼(MoOCl4)前驱体(◇)沉积的钼膜。工艺条件如下:安瓿温度=70℃;压力=60托;氩载气流率=50sccm;氢气流率=2000sccm。结果展示相较于使用未纯化MoCl5前驱体及升华MoCl5前驱体形成的膜,MoOCl4前驱体产生具有更高电阻率值的钼膜。
实例7-二硼烷浸泡研究
调查使用二硼烷预浸泡衬底的效果。图11是依据二硼烷浸泡时间(以秒为单位)而变化的钼膜厚度(以埃为单位)的图表,其是针对400℃下的二硼烷曝露及使用四氯氧化钼(MoOCl4)前驱体(○)的500℃块状钼沉积,及针对300℃下的二硼烷曝露及使用四氯氧化钼(MoOCl4)前驱体(Δ)的500℃块状钼沉积。
图11中的结果展示达30秒的300℃的二硼烷曝露条件及500℃下的四氯氧化钼(MoOCl4)前驱体曝露未导致钼沉积,且有必要增加二硼烷曝露温度或二硼烷浸泡时间以便获得实质钼生长。
实例8-SEM研究-使用二硼烷成核
图12及13是使用500℃二硼烷成核形成的膜沉积及在存在氢的情况下使用四氯氧化钼(MoOCl4)前驱体的500℃块状钼沉积的SEM显微照片。用于二硼烷浸泡的工艺条件如下:安瓿温度=70℃;压力=40托;二硼烷流率=35sccm;氩载气流率=500sccm;氢流率=0sccm;持续时间=30秒。用于MoOCl4/H2块状钼沉积的工艺条件如下:阶段温度=500℃;压力=60托;氩载气流率=50sccm;氢流率=2000sccm;持续时间=300秒。结果展示500℃的二硼烷成核导致钼沉积,但在钼下方形成过量硼层。
实例9-阶梯覆盖率-3循环二硼烷成核过程
图14及15是通孔中的经沉积膜的SEM图像,其展示3循环成核及使用MoOCl4/H2的钼块状沉积的阶梯覆盖率。二硼烷浸泡中的工艺条件如下:衬底=通孔TEG;安瓿温度=70℃;阶段温度=300℃;压力=40托;二硼烷流率=35sccm;氩载气流率=250sccm;氢流率=0sccm;持续时间=60秒。MoOCl4/H2钼沉积的工艺条件如下:阶段温度=550℃;压力=60托;氩载气流率=50sccm;氢流率=2000sccm;持续时间=60秒。SEM图像展示MoOCl4/B2H6成核过程(3个循环)展现通孔结构上的良好阶梯覆盖率。
相关联工艺化学过程包含以下反应:MoOCl4+3H2→Mo+4HCl+H2O;及2MoOCl4+B2H6→2Mo+2BCl3+2HCl+2H2O。
在根据本发明从MoOCl4沉积的代表性钼膜上进行X射线衍射测量,且XRT测量仅展示Mo金属峰值而不存在MoO2或MoO3峰值。
在根据本发明形成的代表性钼膜上的X射线反射率(XRR)测量展示在的X射线荧光(XRF)光谱测定法测量膜上的具有大约8.33g/cm3的密度的~13.4nm钼。
实例10-二硼烷浸泡时间-对厚度及电阻率的影响
图16是依据二硼烷浸泡时间(以秒为单位)而变化的钼厚度(Δ)(以埃为单位)及电阻率(条形图行标记)(以μΩ·cm为单位)的图表,其是针对包含在阶段温度=300℃;压力=44;二硼烷流率=35sccm;氩载气流率=250sccm的工艺条件下的成核及在阶段温度=550℃;安瓿温度=70℃;压力=60托;氩载气流率=50sccm;氢气流率2000sccm的工艺条件下达600秒的块状钼沉积的沉积工艺,所述图表展示二硼烷浸泡时间效果。数据展示使用60秒或更长的二硼烷预浸泡,在550℃的阶段温度下实现钼沉积。如展示,膜电阻率在较长二硼烷浸泡时间周期下增加。
实例11-厚度及电阻率研究-使用二硼烷成核
图17是依据MoOCl4/H2曝露时间(以秒为单位)而变化的钼厚度(Δ)(以埃为单位)及依据MoOCl4/H2曝露时间而变化的电阻率(○)(以μΩ·cm为单位)的图表,其是针对包含在阶段温度=300℃;压力=40托;二硼烷流率=35sccm;氩载气流率=250sccm;持续时间=60秒的工艺条件下的成核及在阶段温度=550℃;安瓿温度=70℃;压力=60托;氩载气流率=50sccm;及氢气流率=2000sccm的条件下的块状钼沉积的沉积工艺。如展示,使用60秒二硼烷预浸泡,钼沉积厚度在550℃下随着MoOCl4/H2曝露时间而生长。膜电阻率对于大于的厚度下降到低于20μΩ·cm。
实例12-SEM研究-使用二硼烷成核
图18是在550℃下沉积的钼膜的SEM图像,且图19是如在以下二硼烷浸泡工艺条件下沉积的此膜的SEM横截面图像:安瓿温度=70℃;阶段温度=300℃;压力=40托;二硼烷流率=35sccm;氩载气流率=250sccm;氢气流率=0sccm;及持续时间=90秒,接着为通过MoOCl4/H2过程在以下工艺条件下的块状钼沉积:阶段温度=550℃;压力=60托;氩载气流率=50sccm;氢气流率=2000sccm;及持续时间=600秒(一个循环)。膜的X RF厚度为且测得电阻率为21.6μΩ·cm。SEM图像对于在550℃下使用90秒二硼烷预浸泡沉积的钼展示大约40到70nm的晶粒大小。横截面SEM图像展示在经沉积钼下方的大约7.7nm的硼层。
实例13-阶段温度研究-使用及不使用二硼烷成核
图20是依据阶段温度(以摄氏度为单位)而变化的钼厚度(Δ)(以埃为单位)及依据阶段温度而变化的电阻率(○)(以μΩ·cm为单位)的图表,其展示针对如在阶段温度=300℃;压力=40托;二硼烷流率=35sccm;氩载气流率=250sccm;持续时间=60秒的二硼烷成核条件下及在安瓿温度=70℃;压力=60托;氩载气流率=50sccm;氢气流率=2000sccm;持续时间=5分钟的块状钼沉积工艺条件下进行的使用二硼烷成核的MoOCl4/H2过程的反应速率限制体系。数据展示使用二硼烷成核,随着在500℃与540℃之间的快速沉积速率下降,钼沉积截止温度下降到500℃。
图21是依据阶段温度(以摄氏度为单位)而变化的钼厚度(Δ)(以埃为单位)及依据阶段温度而变化的电阻率(○)(以μΩ·cm为单位)的图表,其展示针对如在安瓿温度=70℃;压力=60托;氩载气流率=50sccm;氢气流率=2000sccm;持续时间=5分钟的工艺条件下进行的不使用二硼烷成核的MoOCl4/H2过程的反应速率限制体系。数据展示针对不使用二硼烷成核的CVD过程的沉积速率随着在趋近560℃下的截止温度而快速下降到低于600℃。
实例14-阿瑞尼氏图-使用及不使用二硼烷成核
图22是针对如不使用成核(Δ)进行的及如使用成核(○)进行的MoOCl4/H2反应的活化能的阿瑞尼氏图(K=A e-Ea/RT)。数据展示针对MoOCl4/H2反应的经提取活化能针对不使用成核的块状钼过程沉积为大约233kJ/摩尔,且针对使用二硼烷成核的块状钼沉积工艺为大约251kJ/摩尔。
实例15-阶梯覆盖率
图23及24展示通过如在以下工艺条件下进行的成核及CVD块状钼沉积MoOCl4/H2过程的通孔结构上的阶梯覆盖率:衬底=通孔TEG;安瓿温度=70℃,其中二硼烷成核(浸泡)过程在阶段温度=300℃;压力=40托;二硼烷流率=35sccm;氩载气流率=250sccm;氢气流率=0sccm;持续时间=60秒的工艺条件下进行,且其中块状钼沉积CVD过程在阶段温度=520℃;压力=60托;氩载气流率=50sccm;氢气流率=2000sccm;及持续时间=600秒的条件下实行。图像展示使用一个二硼烷成核循环的520℃MoOCl4/H2过程展示通孔结构上的大约50%的阶梯覆盖率(底部/顶部)。
实例16-阶梯覆盖率-沉积时间的影响
图25、26及27展示使用钼通过二硼烷成核(浸泡)及520℃CVD块状钼沉积MoOCl4/H2过程分别在300秒、450秒及600秒的块状沉积工艺时间下沉积的相应通孔结构。工艺条件如下:衬底=通孔TEG;安瓿温度=70℃,其中二硼烷成核(浸泡)过程在阶段温度=300℃;压力=40托;二硼烷流率=35sccm;氩载气流率=250sccm;氢气流率=0sccm;持续时间=60秒的工艺条件下进行,且其中块状钼沉积CVD过程在阶段温度=520℃;压力=60托;氩载气流率=50sccm;氢气流率=2000sccm;及持续时间=300秒(图25)、450秒(图26)及600秒(图27)的条件下实行。图像展示归因于在结构的“颈部”处的约束,使用一个二硼烷成核循环的520℃MoOCl4/H2过程展现随着增加的沉积的通孔结构上的逐渐减少的阶梯覆盖率。
实例17-阶梯覆盖率-温度的影响
图28、29及30展示使用钼通过二硼烷成核(浸泡)及CVD块状钼沉积MoOCl4/H2过程分别在510℃、520℃及530℃的块状沉积温度下沉积的相应通孔结构。工艺条件如下:衬底=通孔TEG;安瓿温度=70℃,其中二硼烷成核(浸泡)过程在阶段温度=300℃;压力=40托;二硼烷流率=35sccm;氩载气流率=250sccm;氢气流率=0sccm;持续时间=60秒的工艺条件下进行,且其中块状钼沉积CVD过程在阶段温度=510℃(图28)、520℃(图29)及530℃(图30);压力=60托;氩载气流率=50sccm;氢气流率=2000sccm;及持续时间=600秒的条件下实行。图像展示归因于粗糙膜形态,510℃MoOCl4/H2过程展现差阶梯覆盖率,520℃过程展示通孔结构上的大约50%的阶梯覆盖率,且阶梯覆盖率针对530℃的过程降级到约30%。
实例18-阶梯覆盖率-二硼烷浸泡时间的影响
图31、32及33展示使用钼通过二硼烷成核(浸泡)及CVD块状钼沉积MoOCl4/H2过程分别在45秒(图31)、60秒(图32)及75秒(图33)的二硼烷剂量(浸泡)时间下沉积的相应通孔结构。工艺条件如下:衬底=通孔TEG;安瓿温度=70℃,其中二硼烷成核(浸泡)过程在阶段温度=300℃;压力=40托;二硼烷流率=35sccm;氩载气流率=250sccm;氢气流率=0sccm的工艺条件下进行,且其中块状钼沉积CVD过程在阶段温度=520℃;压力=60托;氩载气流率=50sccm;氢气流率=2000sccm;及持续时间=450秒的条件下实行。图像展示针对60秒及75秒二硼烷浸泡条件的经沉积钼下方清晰可见的硼层。
实例19-阶梯覆盖率-在60托下脉冲化
图34、35及36是使用钼通过二硼烷成核(浸泡)及CVD块状钼沉积MoOCl4/H2过程(其涉及在60托下针对120个循环进行的经脉冲CVD过程)沉积的通孔结构的SEM图像,其中图34展示具有具备的钼膜厚度的上部分及具备的钼膜厚度的下部分的通孔,图35展示在其中间部分处具有的钼膜厚度的通孔,且图36展示具有的钼膜厚度的通孔的下部分,其是在以下工艺条件下:衬底=通孔TEG;安瓿温度=70℃,其中二硼烷成核(浸泡)过程在阶段温度=300℃;压力=40托;二硼烷流率=35sccm;氩载气流率=250sccm;氢气流率=0sccm;及持续时间=45秒的工艺条件下进行,且其中经脉冲钼沉积CVD过程在阶段温度=520℃;压力=60托;氩载气流率=50sccm;氢气流率=2000sccm;脉冲持续时间=5秒;清除持续时间=10秒;且循环数目=120的条件下实行。具有在每一脉冲之间的10秒清除的脉冲CVD工艺展现在结构的颈部附近的减少积累。阶梯覆盖率针对大约厚度的块状钼沉积是大约75%。
实例20-阶梯覆盖率-在40托下脉冲化
图37及38是使用钼通过二硼烷成核(浸泡)及CVD块状钼沉积MoOCl4/H2过程(其涉及在40托下针对120个循环进行的脉冲CVD过程)沉积的通孔结构的SEM图像,其中图37展示具有具备的钼膜厚度的上部分,及具备的钼膜厚度的中间部分,及具备的钼膜厚度的下部分的通孔,且图38展示在其下部分处的通孔,其中过程是在以下工艺条件下进行:衬底=通孔TEG;安瓿温度=70℃,其中二硼烷成核(浸泡)过程在阶段温度=300℃;压力=40托;二硼烷流率=35sccm;氩载气流率=250sccm;氢气流率=0sccm;及持续时间=45秒的工艺条件下进行,且其中经脉冲钼沉积CVD过程在阶段温度=520℃;压力=40托;氩载气流率=50sccm;氢气流率=2000sccm;脉冲持续时间=5秒;清除持续时间=10秒;且循环数目=120的条件下实行。在40托下的脉冲CVD过程展示具有在顶部上的较薄沉积及在通孔内部的较厚沉积的极佳阶梯覆盖率。在此通孔结构上的标称阶梯覆盖率超过100%。
实例21-阶梯覆盖率-在40托下脉冲化-增加的循环数目
图39及40是使用钼通过二硼烷成核(浸泡)及CVD块状钼沉积MoOCl4/H2过程(其涉及在40托下针对240个循环进行的脉冲CVD过程)沉积的通孔结构的SEM图像,其中图39展示具有具备的钼膜厚度的中间部分,及具备的钼膜厚度的下部分的通孔,且图40展示在其下部分处的通孔,其中过程在以下工艺条件下进行:衬底=通孔TEG;安瓿温度=70℃,其中二硼烷成核(浸泡)过程在阶段温度=300℃;压力=40托;二硼烷流率=35sccm;氩载气流率=250sccm;氢气流率=0sccm;及持续时间=45秒的工艺条件下进行,且其中经脉冲钼沉积CVD过程在阶段温度=520℃;压力=40托;氩载气流率=50sccm;氢气流率=2000sccm;脉冲持续时间=5秒;清除持续时间=10秒;及循环数目=240的条件下实行。归因于在通孔颈部处的夹止,将40托压力的循环数目从120增加到240未导致无空隙填充。
实例22-蚀刻速率
探索硼成核表面(CVD B)上的MoOCl4/H2过程的蚀刻速率。在阶段温度=500℃;压力=20托;氩载气流率=50sccm;氢气流率=2000sccm的条件下实行过程。在表1中展示进一步条件及所得蚀刻速率:
表1:
蚀刻速率未由曝露到空气而影响。Mo衬底上的厚硼膜的蚀刻速率远高于TiN衬底上的硼膜上的蚀刻速率。此可归因于厚硼膜的表面粗糙度。
实例23-其它衬底
在一系列衬底上实行MoOCl4/H2过程。过程在以下条件下实行:阶段温度=500℃;压力=60托;氩载气流率=50sccm;氢气流率=2000sccm。在表2中展示进一步条件及衬底:
表2:
经沉积钼展现广范围的电阻率。电阻率不随着厚度而变化,其中衬底是PVD Mo。如从先前结果提及,电阻率非常取决于无硼成核层的TiN衬底的阶段温度。
论述
下文展示,使用MoOCl4前驱体沉积的CVD钼膜展示在的厚度下的小于15μΩ·cm的良好膜电阻率,且SIMS分析展示块状钼膜中的氧浓度针对使用MoOCl4前驱体沉积的膜远低于1原子百分比。在TiN衬底上,CVD MoOCl4/H2过程展现在大约560℃下的不使用二硼烷成核的过程温度截止及在大约500℃下的使用二硼烷成核的截止。从阿瑞尼氏图提取的活化能针对不使用成核的过程为大约223kJ/摩尔,且针对使用二硼烷成核的过程为大约251kJ/摩尔。使用二硼烷成核的CVD MoOCl4/H2过程展现通孔结构上的极佳阶梯覆盖率,且证实脉冲化CVD工艺在的膜厚度下实现且甚至超过100%的阶梯覆盖率。
虽然本文中已参考特定方面、特征及说明性实施例陈述本发明,但应了解,不因此限制本发明的利用,而延伸到且涵盖数个其它变化、修改及替代实施例,如将基于本文中的描述向本发明领域的一般技术人员建议其自身。对应地,如下文主张的本发明希望被广泛理解且解译为包含在其精神及范围内的所有此类变化、修改及替代实施例。
贯穿本说明书的描述及权利要求书,词组“包括”及“含有”及词组的变化(例如,“包括(comprising及comprises)”)意味着“包含(但不限于)”且不排除其它组件、整数或步骤。此外,单数涵盖复数,除非上下文另外要求:特定来说,在使用不定冠词的情况中,将说明书理解为预期复数以及单数,除非上下文另外要求。
本发明的每一方面的任选特征可如结合任何其它方面所描述那样。在本申请案的范围内,明确希望可独立或以任何组合获取在先前段落中、且在权利要求书及图式中,且特定来说,其个别特征陈述的各种方面、实施例、实例及替代例。即,可以任何方式及/或组合来组合任何实施例的全部实施例及/或特征,除非此类特征不兼容。

Claims (18)

1.一种在衬底上形成含钼材料的方法,其包括在气相沉积条件下使所述衬底与四氯氧化钼(MoOCl4)蒸气接触,以在所述衬底上沉积所述含钼材料。
2.根据权利要求1所述的方法,其包括在所述衬底上建立成核表面,且其中所述衬底与四氯氧化钼(MoOCl4)蒸气的所述接触包括使所述衬底的所述成核表面与四氯氧化钼(MoOCl4)蒸气接触以在所述衬底上沉积所述含钼材料。
3.根据权利要求2所述的方法,其中在所述衬底上建立所述成核表面包括使所述衬底与二硼烷蒸气接触且任选地分开地与四氯氧化钼(MoOCl4)蒸气接触。
4.根据权利要求2或权利要求3所述的方法,其中建立所述成核表面包括使所述衬底与二硼烷蒸气且分开地与四氯氧化钼(MoOCl4)蒸气接触的多个循环。
5.根据权利要求3或权利要求4所述的方法,其中氮化钛与二硼烷蒸气的接触在从300℃到450℃的范围内的温度下进行。
6.根据任一前述权利要求所述的方法,其中所述气相沉积条件是脉冲气相沉积条件。
7.根据任一前述权利要求所述的方法,其中所述气相沉积条件经选择使得所述经沉积含钼材料具有最多20μΩ·cm的电阻率。
8.根据任一前述权利要求所述的方法,其中所述含钼材料在从400℃到600℃的范围内、任选地400℃到575℃的温度下沉积。
9.根据任一前述权利要求所述的方法,其包括使四氯氧化钼(MoOCl4)挥发以形成所述四氯氧化钼(MoOCl4)蒸气。
10.根据任一前述权利要求所述的方法,其中所述气相沉积条件包括还原环境,任选地存在氢,使得所述含钼材料包括元素钼材料。
11.根据任一前述权利要求所述的方法,其中所述含钼材料包括氧化钼。
12.根据任一前述权利要求所述的方法,其中所述衬底包括TiN、Mo、MoC、B、SiO2、W及WCN中的一或多者。
13.根据任一前述权利要求所述的方法,其中:所述衬底包括包含其上具有氮化钛层的二氧化硅的半导体装置衬底;所述方法包括在所述氮化钛层上形成成核表面;且所述含钼材料沉积于所述成核层上。
14.根据权利要求13所述的方法,其中所述成核表面通过包括使所述氮化钛层与二硼烷蒸气且分开地与四氯氧化钼(MoOCl4)蒸气接触的脉冲CVD或ALD沉积形成。
15.根据任一前述权利要求所述的方法,其在用于在所述衬底上制作半导体装置的工艺中实施。
16.根据权利要求15所述的方法,其中所述半导体装置包括DRAM装置及3-D NAND装置中的至少一者。
17.根据任一前述权利要求所述的方法,其中所述衬底包括其中沉积所述含钼材料的通孔,所述通孔任选地具有在从20:1到30:1的范围中的深度对横向尺寸的纵横比。
18.根据任一前述权利要求所述的方法,其中所述含钼材料以从90%到110%的阶梯覆盖率沉积于所述衬底上。
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