JP2010103195A5 - - Google Patents

Download PDF

Info

Publication number
JP2010103195A5
JP2010103195A5 JP2008271360A JP2008271360A JP2010103195A5 JP 2010103195 A5 JP2010103195 A5 JP 2010103195A5 JP 2008271360 A JP2008271360 A JP 2008271360A JP 2008271360 A JP2008271360 A JP 2008271360A JP 2010103195 A5 JP2010103195 A5 JP 2010103195A5
Authority
JP
Japan
Prior art keywords
bump
semiconductor device
stacked
metal pattern
stacked semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2008271360A
Other languages
English (en)
Japanese (ja)
Other versions
JP5298762B2 (ja
JP2010103195A (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP2008271360A priority Critical patent/JP5298762B2/ja
Priority claimed from JP2008271360A external-priority patent/JP5298762B2/ja
Publication of JP2010103195A publication Critical patent/JP2010103195A/ja
Publication of JP2010103195A5 publication Critical patent/JP2010103195A5/ja
Application granted granted Critical
Publication of JP5298762B2 publication Critical patent/JP5298762B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

JP2008271360A 2008-10-21 2008-10-21 積層型半導体装置、積層型半導体装置の製造方法及び半導体基板 Active JP5298762B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2008271360A JP5298762B2 (ja) 2008-10-21 2008-10-21 積層型半導体装置、積層型半導体装置の製造方法及び半導体基板

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008271360A JP5298762B2 (ja) 2008-10-21 2008-10-21 積層型半導体装置、積層型半導体装置の製造方法及び半導体基板

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2013129644A Division JP2013179373A (ja) 2013-06-20 2013-06-20 積層型半導体装置

Publications (3)

Publication Number Publication Date
JP2010103195A JP2010103195A (ja) 2010-05-06
JP2010103195A5 true JP2010103195A5 (zh) 2012-06-28
JP5298762B2 JP5298762B2 (ja) 2013-09-25

Family

ID=42293615

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008271360A Active JP5298762B2 (ja) 2008-10-21 2008-10-21 積層型半導体装置、積層型半導体装置の製造方法及び半導体基板

Country Status (1)

Country Link
JP (1) JP5298762B2 (zh)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102299133B (zh) * 2010-06-22 2014-02-19 中国科学院微电子研究所 半导体结构及其制造方法
KR101690487B1 (ko) * 2010-11-08 2016-12-28 삼성전자주식회사 반도체 장치 및 제조 방법
JP5813495B2 (ja) 2011-04-15 2015-11-17 東京エレクトロン株式会社 液処理方法、液処理装置および記憶媒体
JP5600642B2 (ja) * 2011-06-16 2014-10-01 株式会社日立製作所 半導体装置の製造方法
US8552567B2 (en) 2011-07-27 2013-10-08 Micron Technology, Inc. Semiconductor die assemblies, semiconductor devices including same, and methods of fabrication
US8937309B2 (en) 2011-08-08 2015-01-20 Micron Technology, Inc. Semiconductor die assemblies, semiconductor devices including same, and methods of fabrication
JP5678840B2 (ja) * 2011-08-18 2015-03-04 富士通セミコンダクター株式会社 半導体装置
US9153520B2 (en) 2011-11-14 2015-10-06 Micron Technology, Inc. Stacked semiconductor die assemblies with multiple thermal paths and associated systems and methods
JP2013110151A (ja) * 2011-11-17 2013-06-06 Elpida Memory Inc 半導体チップ及び半導体装置
KR102032907B1 (ko) * 2013-04-22 2019-10-16 삼성전자주식회사 반도체 소자, 반도체 패키지 및 전자 시스템
JP6380946B2 (ja) * 2013-11-18 2018-08-29 ローム株式会社 半導体装置および半導体装置の製造方法
US10355039B2 (en) 2015-05-18 2019-07-16 Sony Corporation Semiconductor device and imaging device
WO2024101204A1 (ja) * 2022-11-10 2024-05-16 ソニーセミコンダクタソリューションズ株式会社 光検出装置及び積層基板

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4011695B2 (ja) * 1996-12-02 2007-11-21 株式会社東芝 マルチチップ半導体装置用チップおよびその形成方法
JP4205613B2 (ja) * 2004-03-01 2009-01-07 エルピーダメモリ株式会社 半導体装置
JP4688526B2 (ja) * 2005-03-03 2011-05-25 Ｏｋｉセミコンダクタ株式会社 半導体装置及びその製造方法
JPWO2008108334A1 (ja) * 2007-03-06 2010-06-17 株式会社ニコン 半導体装置及び該半導体装置の製造方法
JP4700642B2 (ja) * 2007-03-16 2011-06-15 Ｏｋｉセミコンダクタ株式会社 半導体装置及びその製造方法

Similar Documents

Publication Publication Date Title
JP2010103195A5 (zh)
US11652086B2 (en) Packages with stacked dies and methods of forming the same
TWI322448B (en) Semiconductor stacked multi-package module having inverted second package
US8803306B1 (en) Fan-out package structure and methods for forming the same
US8421193B2 (en) Integrated circuit device having through via and method for preparing the same
JP2013524486A5 (zh)
JP5298762B2 (ja) 積層型半導体装置、積層型半導体装置の製造方法及び半導体基板
KR102011175B1 (ko) 플립칩 적층을 위한 방법
TWI395317B (zh) 晶片堆疊封裝結構及其製作方法
US20150187679A1 (en) Lid Design for Heat Dissipation Enhancement of Die Package
TWI755632B (zh) 半導體封裝
KR20140130395A (ko) 반도체 디바이스 제조 방법
JP2008109046A (ja) 半導体パッケージおよび積層型半導体パッケージ
TWI269419B (en) Method for forming wafer-level heat spreader structure and packaging structure thereof
JP2009158764A5 (zh)
US9418876B2 (en) Method of three dimensional integrated circuit assembly
KR101111423B1 (ko) 열방출 수단을 갖는 적층 칩 반도체 패키지
TWI469310B (zh) 覆晶堆疊封裝結構及其封裝方法
TWI585932B (zh) 晶片封裝結構
KR101185457B1 (ko) 적층형 반도체 패키지 및 그 제조 방법
TWI525723B (zh) 晶片封裝體結構及其形成方法
TWI685944B (zh) 三維直通矽晶貫孔結構
CN101211792A (zh) 半导体封装件及其制法与堆叠结构
TWI490959B (zh) 半導體封裝結構及其製作方法
JP2013179373A5 (ja) 積層型半導体装置、積層型半導体装置の製造方法および半導体基板