TWI685944B - 三維直通矽晶貫孔結構 - Google Patents

三維直通矽晶貫孔結構 Download PDF

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TWI685944B
TWI685944B TW102142103A TW102142103A TWI685944B TW I685944 B TWI685944 B TW I685944B TW 102142103 A TW102142103 A TW 102142103A TW 102142103 A TW102142103 A TW 102142103A TW I685944 B TWI685944 B TW I685944B
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TW201431040A (zh
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姜澤圭
亞伯拉罕Ｆ 伊
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輝達公司
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Abstract

本發明的具體實施例包括具有一起封裝在相同封裝體中的多個晶粒之元件。該多個晶粒係配置在一中介層上，其接著配置在一封裝基板上。該中介層包括一半導體基板，例如矽，其具有從該中介層的一前表面延伸至該中介層的一後表面之貫孔。該中介層係一被動中介層或一主動中介層。一主動中介層包括一或多個晶粒的功能，且因此可減少配置在該主動中介層中的晶粒數量。

Description

三維直通矽晶貫孔結構
本發明之具體實施例一般是關於電子構件的封裝，且更特定的，是關於三維直通矽晶貫孔結構。
在積體電路中的晶粒是一種半導性材料的小塊體，在該小塊體上係製有一既定功能電路。該等晶粒係經封裝，例如藉由耦接至一封裝基板，並接著置放於一印刷電路板上以互連該等晶粒。然而，以此方式互連晶粒係限制了一元件的電氣性能，因為需要長的電氣路徑以供晶粒之間的通訊(例如電流必須從一第一晶粒行進通過該印刷電路板而至一第二晶粒)。此外，晶粒的個別封裝需要相對大的印刷電路板面積，以容納一電子元件中所使用的所有封裝元件。該相對大的印刷電路板面積限制了元件的最小實體尺寸。另外，個別封裝之晶粒係各組裝為不同的封裝類型，因而增加了形成組裝元件的成本與複雜度。
如前述說明，在本領域中需要一種新的元件封裝。
本發明的一個具體實施例包括一種電子元件，其具有一封裝基板、配置在該封裝基板上且電氣耦接至該封裝基板的一中介層、以及配置在該中介層上並電氣耦接至該中介層的複數個晶粒。
本發明的優點包括所製成之元件的一較小形狀因子。因為具有不同功能的多個晶粒被整合於一單一封裝體中，互連晶粒所需要的空間量會比個別封裝的晶粒降低。此外，因為該元件具有一較小形狀因子，元件的電氣性能會因晶粒之間較短的電氣路徑而提高。
100‧‧‧元件
102‧‧‧晶粒
104‧‧‧晶粒
106‧‧‧中介層
106A‧‧‧二氧化矽層
106B‧‧‧矽基板
108‧‧‧封裝基板
110‧‧‧印刷電路板
112‧‧‧重新分配層
114‧‧‧微凸塊
116‧‧‧貫孔
118‧‧‧焊錫凸塊
120‧‧‧封裝材料
122‧‧‧間隙填充材料
124‧‧‧導電區域
128‧‧‧凸塊
200A‧‧‧元件
200B‧‧‧元件
200C‧‧‧元件
202A‧‧‧晶粒
202B‧‧‧晶粒
202C‧‧‧晶粒
202D‧‧‧晶粒
202E‧‧‧晶粒
206‧‧‧中介層
214‧‧‧微凸塊
300A‧‧‧元件
300B‧‧‧元件
300C‧‧‧元件
302A‧‧‧晶粒
302B‧‧‧晶粒
302C‧‧‧晶粒
302D‧‧‧晶粒
306‧‧‧中介層
306A‧‧‧主動中介層
306B‧‧‧主動中介層
306C‧‧‧主動中介層
314‧‧‧微凸塊
所以，可以詳細瞭解本發明上述特徵之方式中，本發明的一 更為特定的說明簡述如上，其可藉由參照到具體實施例來進行，其中一些例示於所附圖式中。但應注意所附圖式僅例示本發明的典型具體實施例，因此其並非要做為本發明之範圍的限制，本發明自可包含其它同等有效的具體實施例。
第一圖說明了根據本發明一具體實施例之一元件的截面圖。
第二A圖至第二F圖說明了根據本發明具體實施例之置於被動中介層上的多個晶粒。
第三A圖至第三F圖說明了根據本發明具體實施例之置於主動中介層上的多個晶粒。
為幫助理解，係已盡可能使用相同元件符號來代表圖式之間的相同元件。應知在無特定載述下，一具體實施例中所揭之元件係可有利地使用於其他具體實施例。
第一圖說明了根據本發明一具體實施例之元件100的截面圖。元件100包括配置在一中介層106上的晶粒102、104。中介層106係配置於一封裝基板108上，例如一矽基板。該封裝基板108係接著配置在一印刷電路板110上。晶粒102和104係耦接至一重新分配層112，其係藉由微凸塊114而配置在中介層106的上表面上。微凸塊114包括，例如銅、銀及/或錫，而重新分配層112係一般包括銅或另一導電材料。微凸塊114係利於晶粒102和104與重新分配層112之間的電氣連接。雖然僅說明兩個晶粒102與104，但應理解該元件100可包括兩個以上的晶粒，例如四個、五個或更多晶粒。
一封裝材料120係包封晶粒102與104。封裝材料120係包括例如矽基樹脂、紫外線固化樹脂或環氧樹脂。晶粒102和104係一起封裝在中介層106上，因此比起分別將各晶粒102、104封裝在個別封裝基板108上，其一般係佔據較小的表面積。相較於將晶粒102與104獨立封裝在個別的封裝基板108上，中介層106的使用可使晶粒102與104在適當封裝時能更靠近地放置在一起。舉例而言，當晶粒被個別封裝時，在印刷電路板上需要有更多面積來放置及定位個別的封裝晶粒。因此，使用個別封 裝之晶粒的元件的尺寸與形狀因子係受到限制。此外，將晶粒102與104放置在中介層106上係可簡化印刷電路板110上的對準。不同於在印刷電路板110上分別地放置與對準每一個晶粒102、104，而是僅需要放置在中介層106上(例如中介層106的放置)。
中介層106包括一矽基板106B，其具有垂直配置貫穿其間的貫孔116、以及配置在該矽基板106B上的一二氧化矽層106A。貫孔116係鍍以、或填有一導電材料，例如銅、鋁或金，並增進配置在二氧化矽層106B內的重新分配層112與封裝基板108之間的電氣連接。注意中介層106可包括比圖中所示數量更多的重新分配層112與貫孔116。中介層106係利用焊錫凸塊118而耦接至封裝基板108，焊錫凸塊118係包括例如錫、金、銅及/或銀。一間隙填充材料122(例如一非傳導性樹脂)係於焊錫凸塊118周圍配置在中介層106和封裝基板108之間。間隙填充材料122係用以自中介層106與封裝基板108之間移除空氣間隙，否則其會使元件100的性能或壽命衰減。
封裝基板108包括藉由貫孔122而電氣耦接的導電區域124。導電區域124和貫孔122增進了焊錫凸塊118與凸塊128之間的電氣接觸。凸塊128係與印刷電路板110電氣接觸。凸塊128係由一導電材料所形成，例如錫、銅或金。
如第一圖所示，多個晶粒102與104係可以一實質共平面型態一起封裝在一單一封裝基板108上。因為晶粒102和104是一起封裝，因此比起個別封裝的晶粒，封裝相同晶粒數量所需的印刷電路板面積較少且封裝基板面積亦較少。因此，元件100具有小形狀因子，其可幫助整合至較小元件中，例如智慧型電話。中介層106有助於在一單一封裝基板上封裝多個晶粒。中介層106於封裝體中提供了晶粒之一固定表面。此外，中介層116的重新分配層112於封裝體內提供了晶粒間的電氣通訊。
第二A圖至第二F圖說明了根據本發明具體實施例之在被動中介層上的晶粒配置。被動中介層是一種不含任何電氣晶粒功能的中介層。因此，被動中介層為放置其上的晶粒提供支撐，並增進了晶粒與封裝基板(例如第一圖中所示之封裝基板108)之間的電氣連接。
第二A圖與第二B圖分別說明一元件200A的上視圖與側視圖。元件200A包括在一中介層206上配置為一長形圖樣之晶粒202A-202E。晶粒202A-202E係藉由微凸塊214而耦接至中介層206。晶粒202A-202E係分別包括一RF構件、一基頻構件、一應用處理器、一I/O控制器、以及一記憶體。晶粒202A-202E係一起封裝，其使用中介層206作為支撐與互連，且因此所需之封裝基板以及最終組裝所需之印刷電路板的面積較小。雖然所繪示的為五個晶粒202E-202E，應理解在中介層206上也可配置更多的晶粒。
第二C圖至第二F圖說明元件200B和200C的上視圖與側視圖。每一個元件200B和200C具有配置在一中介層206上的晶粒202A-202E。五個晶粒被封裝為一單一封裝體，且因此在配置在一印刷電路上時，係使用比個別封裝每一個晶粒202A-202E更少的面積。晶粒202A-202E係於中介層206上排列為二維圖樣。因此，顯然晶粒202A-202E可於一單一封裝體中排列為多種圖樣，進以得到所需形狀或形成該封裝體。
第三A圖至第三F圖說明根據本發明具體實施例之在主動中介層上的晶粒配置。元件300A-300C包括配置在主動中介層306A-306C上以封裝於一單一封裝體內的多個晶粒。主動中介層306A-306C具有一或多個晶粒的電氣功能，因此可藉由合併晶粒的功能而減少配置其上的晶粒數量。因為某些晶粒的功能係合併於中介層306中，因此元件300A-300C具有比使用被動中介層206(示於第二圖中)的元件以及使用個別封裝晶粒的元件更小的形狀因子。
第三A圖與第三B圖分別說明一元件300A的上視圖與側視圖，該元件300A具有配置在一主動中介層306A上的晶粒302A與302B。晶粒302A與302B係藉由微凸塊314而耦接至主動中介層306A。主動中介層306A中合併了一基頻構件、RF構件及一I/O控制器的功能。晶粒302A係一應用處理器，而晶粒302B係一記憶體構件。晶粒302A與302B係利用中介層306A而封裝於一單一封裝體中。因為晶粒302A與302B係封裝為一單一封裝體，且因為中介層306A中合併了晶粒功能，因此元件300A具有一相對小的形狀因子。
第三C圖與第三D圖分別說明一元件300B的上視圖與側視圖，該元件300B具有配置在一主動中介層306A上的晶粒302A、302B與302C。主動中介層306A中合併了一RF構件及一I/O控制器的功能。因此，配置在主動中介層306B的上表面上的晶粒數量會比具有相同功能之元件中配置在一被動中介層上之晶粒數量更少。因為在主動中介層306B中已經併入一RF構件與一I/O控制器之晶粒功能，且因為晶粒302A、302B與302C是一起封裝，因此比起具有相同功能之個別封裝晶粒的面積，在一印刷電路板上之元件300B的面積會減少。
第三E圖與第三F圖分別說明一元件300C的上視圖與側視圖，該元件300C具有配置在一主動中介層306C上的晶粒302A、302B、302C與302D。主動中介層306C中合併了一I/O控制器的功能。因此，配置在主動中介層306C的上表面上的晶粒數量會比具有相同功能之元件中配置在一被動中介層上之晶粒數量更少。因為在主動中介層306C中已經併入一I/O控制器之晶粒功能，且因為晶粒302A、302B、302C與302D是一起封裝，因此比起具有相同功能之個別封裝晶粒的面積，在一印刷電路板上之元件300C的面積會減少。
應注意在第三A圖至第三C圖中，主動中介層的功能與配置在其上的晶粒數量係可加以變化，以得到所需要的元件形狀因子。此外，晶粒在其上的排列也可依需要而加以變化，以進一步影響該形狀因子。第三A圖與第三C圖係僅為某些具體實施例的例示說明，且其他變化例係可被推知。
本發明之元件係使用了上方有多個晶粒互連的一TSV(Through-Silicon Via，直通矽晶貫孔)中介層。上方具有多個晶粒之TSV中介層係接著被配置在一封裝基板上，且其接著被置放在一印刷電路板上。多個晶粒係於中介層上一起封裝為一單一封裝體，而非於一個別封裝基板上分別封裝每一個晶粒。TSV中介層可為被動或主動。當TSV中介層是被動的時，TSV中介層並不具有任何電氣構件功能，且僅作為一基板之用，以支撐及互連晶粒。當該TSV中介層為主動，該TSV中介層係具有至少某些電氣構件功能，且因而減少了TSV中介層上的晶粒數量。
本發明的優點包括所製成之元件的一較小形狀因子。因為具有不同功能的多個晶粒被整合於一單一封裝體中，互連晶粒所需要的空間量會比個別封裝的晶粒降低。此外，因為該元件具有一較小形狀因子，元件的電氣性能會因晶粒之間較短的電氣路徑而提高。另外，因為多個晶粒被封裝於一單一封裝體中而非多個封裝體中，故需要的封裝材料較少。因此，可降低材料與組件的成本。行動裝置或其他小型應用都需要本發明之元件的相對較小的形狀因子。
前述說明係與本發明之具體實施例有關，然可推知本發明的其他與進一步之具體實施例，其皆不脫離本發明之基本範疇；本發明之範疇係由下述申請專利範圍所決定。
302A‧‧‧晶粒
302B‧‧‧晶粒
302C‧‧‧晶粒
306B‧‧‧主動中介層
314‧‧‧微凸塊

Claims (5)

  1. 一種電子元件，包括：一封裝基板；一中介層，其係配置在該封裝基板上並電氣耦接至該封裝基板，該中介層包括一矽基板，其具有配置於該矽基板上的一二氧化矽層，其中該二氧化矽層包括配置於該二氧化矽層內的至少一重新分配層；以及複數個晶粒，其係配置在該中介層上並電氣耦接至該中介層，其中該中介層為一主動中介層，該主動中介層包括一基頻構件、一RF構件及/或一I/O控制器的功能。
  2. 如申請專利範圍第1項之電子元件，其中該複數個晶粒係排列為一實質上共平面型態。
  3. 如申請專利範圍第1項之電子元件，進一步包含一重新分配層，其位於該中介層的一上表面上。
  4. 如申請專利範圍第3項之電子元件，其中該中介層包括複數個貫孔，其從該上表面延伸至一下表面。
  5. 如申請專利範圍第1項之電子元件，其中：該中介層包括複數個貫孔，其從該中介層的一上表面延伸至該中介層的一下表面；以及該封裝基板包括複數個貫孔，其係自該封裝基板的一上表面延伸至該封裝基板的一下表面。
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