JP2010080057A5 - - Google Patents
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- Publication number
- JP2010080057A5 JP2010080057A5 JP2010007240A JP2010007240A JP2010080057A5 JP 2010080057 A5 JP2010080057 A5 JP 2010080057A5 JP 2010007240 A JP2010007240 A JP 2010007240A JP 2010007240 A JP2010007240 A JP 2010007240A JP 2010080057 A5 JP2010080057 A5 JP 2010080057A5
- Authority
- JP
- Japan
- Prior art keywords
- redundant
- memory
- array
- main
- main memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000015654 memory Effects 0.000 claims 149
- 230000002950 deficient Effects 0.000 claims 16
- 239000011159 matrix material Substances 0.000 claims 3
- 230000004044 response Effects 0.000 claims 3
- 239000004065 semiconductor Substances 0.000 claims 1
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12804099P | 1999-04-06 | 1999-04-06 | |
US60/128040 | 1999-04-06 | ||
US09/356805 | 1999-07-20 | ||
US09/356,805 US6208569B1 (en) | 1999-04-06 | 1999-07-20 | Method of and apparatus for sharing redundancy circuits between memory arrays within a semiconductor memory device |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2000105027A Division JP4554755B2 (ja) | 1999-04-06 | 2000-04-06 | 半導体メモリデバイス内のメモリアレイ間で冗長回路を共有するための方法及び装置 |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2010080057A JP2010080057A (ja) | 2010-04-08 |
JP2010080057A5 true JP2010080057A5 (zh) | 2010-05-27 |
JP5033887B2 JP5033887B2 (ja) | 2012-09-26 |
Family
ID=26826211
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2000105027A Expired - Fee Related JP4554755B2 (ja) | 1999-04-06 | 2000-04-06 | 半導体メモリデバイス内のメモリアレイ間で冗長回路を共有するための方法及び装置 |
JP2010007240A Expired - Fee Related JP5033887B2 (ja) | 1999-04-06 | 2010-01-15 | 半導体メモリデバイス内のメモリアレイ間で冗長回路を共有するための方法及び装置 |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2000105027A Expired - Fee Related JP4554755B2 (ja) | 1999-04-06 | 2000-04-06 | 半導体メモリデバイス内のメモリアレイ間で冗長回路を共有するための方法及び装置 |
Country Status (2)
Country | Link |
---|---|
US (1) | US6208569B1 (zh) |
JP (2) | JP4554755B2 (zh) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6465828B2 (en) * | 1999-07-30 | 2002-10-15 | Micron Technology, Inc. | Semiconductor container structure with diffusion barrier |
US6417537B1 (en) | 2000-01-18 | 2002-07-09 | Micron Technology, Inc. | Metal oxynitride capacitor barrier layer |
JP2002008390A (ja) * | 2000-06-16 | 2002-01-11 | Fujitsu Ltd | 冗長セルを有するメモリデバイス |
US20020124203A1 (en) * | 2001-02-20 | 2002-09-05 | Henry Fang | Method for utilizing DRAM memory |
KR100425456B1 (ko) * | 2001-08-02 | 2004-03-30 | 삼성전자주식회사 | 메이크-링크를 구비하는 퓨즈 박스, 이를 구비하는 리던던트 어드레스 디코더 및 메모리 셀 대체방법 |
KR100587076B1 (ko) | 2004-04-28 | 2006-06-08 | 주식회사 하이닉스반도체 | 메모리 장치 |
US7385862B2 (en) * | 2005-07-29 | 2008-06-10 | Stmicroelectronics Pvt. Ltd. | Shared redundant memory architecture and memory system incorporating same |
JP2009087513A (ja) * | 2007-10-03 | 2009-04-23 | Nec Electronics Corp | 半導体記憶装置、及びメモリセルテスト方法 |
KR101196907B1 (ko) | 2010-10-27 | 2012-11-05 | 에스케이하이닉스 주식회사 | 반도체 메모리 장치 및 그의 동작 방법 |
JP5870017B2 (ja) * | 2012-12-14 | 2016-02-24 | 株式会社東芝 | 不揮発性半導体記憶装置 |
CN112365916A (zh) * | 2020-11-09 | 2021-02-12 | 深圳市芯天下技术有限公司 | 一种NAND Flash存储架构及存储方法 |
CN112837736A (zh) * | 2021-03-16 | 2021-05-25 | 江苏时代全芯存储科技股份有限公司 | 记忆体装置以及其修补方法 |
JP7392181B2 (ja) | 2021-03-24 | 2023-12-05 | 長江存儲科技有限責任公司 | 冗長バンクを使用した故障メインバンクの修理を伴うメモリデバイス |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0666394B2 (ja) * | 1983-12-16 | 1994-08-24 | 富士通株式会社 | 半導体記憶装置 |
JPS6150294A (ja) * | 1984-08-18 | 1986-03-12 | Mitsubishi Electric Corp | 半導体記憶装置の冗長回路 |
JPS62217498A (ja) * | 1986-03-06 | 1987-09-24 | Fujitsu Ltd | 半導体記憶装置 |
JPH02208897A (ja) * | 1989-02-08 | 1990-08-20 | Seiko Epson Corp | 半導体記憶装置 |
JPH03263697A (ja) * | 1990-03-13 | 1991-11-25 | Sharp Corp | 半導体記憶装置 |
KR960002777B1 (ko) * | 1992-07-13 | 1996-02-26 | 삼성전자주식회사 | 반도체 메모리 장치의 로우 리던던시 장치 |
JP3301047B2 (ja) * | 1993-09-16 | 2002-07-15 | 株式会社日立製作所 | 半導体メモリシステム |
JPH08153399A (ja) * | 1994-11-29 | 1996-06-11 | Nec Corp | 半導体記憶装置 |
JP3338755B2 (ja) * | 1996-10-24 | 2002-10-28 | シャープ株式会社 | 半導体記憶装置 |
JPH10334690A (ja) * | 1997-05-27 | 1998-12-18 | Nec Corp | 半導体記憶装置 |
US6046945A (en) * | 1997-07-11 | 2000-04-04 | Integrated Silicon Solution, Inc. | DRAM repair apparatus and method |
US5999463A (en) * | 1997-07-21 | 1999-12-07 | Samsung Electronics Co., Ltd. | Redundancy fuse box and semiconductor device including column redundancy fuse box shared by a plurality of memory blocks |
JP3841535B2 (ja) * | 1997-12-09 | 2006-11-01 | 富士通株式会社 | 半導体記憶装置 |
JPH11203890A (ja) | 1998-01-05 | 1999-07-30 | Mitsubishi Electric Corp | 半導体記憶装置 |
US5889727A (en) | 1998-05-11 | 1999-03-30 | Texas Instruments--Acer Incorporated | Circuit for reducing the transmission delay of the redundancy evaluation for synchronous DRAM |
JP4260247B2 (ja) * | 1998-09-02 | 2009-04-30 | 富士通マイクロエレクトロニクス株式会社 | 半導体記憶装置 |
US6018483A (en) * | 1998-12-10 | 2000-01-25 | Siemens Aktiengesellschaft | Distributed block redundancy for memory devices |
US6052318A (en) * | 1998-12-22 | 2000-04-18 | Siemens Aktiengesellschaft | Repairable semiconductor memory circuit having parrel redundancy replacement wherein redundancy elements replace failed elements |
-
1999
- 1999-07-20 US US09/356,805 patent/US6208569B1/en not_active Expired - Lifetime
-
2000
- 2000-04-06 JP JP2000105027A patent/JP4554755B2/ja not_active Expired - Fee Related
-
2010
- 2010-01-15 JP JP2010007240A patent/JP5033887B2/ja not_active Expired - Fee Related
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