JP2009545180A5 - - Google Patents
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- Publication number
- JP2009545180A5 JP2009545180A5 JP2009522071A JP2009522071A JP2009545180A5 JP 2009545180 A5 JP2009545180 A5 JP 2009545180A5 JP 2009522071 A JP2009522071 A JP 2009522071A JP 2009522071 A JP2009522071 A JP 2009522071A JP 2009545180 A5 JP2009545180 A5 JP 2009545180A5
- Authority
- JP
- Japan
- Prior art keywords
- patterned
- solder
- conductive circuit
- additional
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/496,111 | 2006-07-31 | ||
| US11/496,111 US7652374B2 (en) | 2006-07-31 | 2006-07-31 | Substrate and process for semiconductor flip chip package |
| PCT/CN2007/002228 WO2008017232A1 (en) | 2006-07-31 | 2007-07-23 | Substrate and process for semiconductor flip chip package |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2009545180A JP2009545180A (ja) | 2009-12-17 |
| JP2009545180A5 true JP2009545180A5 (enExample) | 2010-03-25 |
| JP4988843B2 JP4988843B2 (ja) | 2012-08-01 |
Family
ID=38985352
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2009522071A Active JP4988843B2 (ja) | 2006-07-31 | 2007-07-23 | 半導体フリップチップパッケージ用の基板およびプロセス |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US7652374B2 (enExample) |
| EP (1) | EP2054933A4 (enExample) |
| JP (1) | JP4988843B2 (enExample) |
| KR (1) | KR20090042777A (enExample) |
| CN (1) | CN101496168B (enExample) |
| MY (1) | MY151533A (enExample) |
| WO (1) | WO2008017232A1 (enExample) |
Families Citing this family (38)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7759137B2 (en) * | 2008-03-25 | 2010-07-20 | Stats Chippac, Ltd. | Flip chip interconnection structure with bump on partial pad and method thereof |
| US9345148B2 (en) | 2008-03-25 | 2016-05-17 | Stats Chippac, Ltd. | Semiconductor device and method of forming flipchip interconnection structure with bump on partial pad |
| JP5426124B2 (ja) * | 2008-08-28 | 2014-02-26 | 株式会社東芝 | 半導体発光装置の製造方法及び半導体発光装置 |
| KR101211724B1 (ko) * | 2009-04-30 | 2012-12-12 | 엘지이노텍 주식회사 | 반도체 패키지 및 그 제조방법 |
| US8424748B2 (en) | 2009-12-21 | 2013-04-23 | Intel Corporation | Solder in cavity interconnection technology |
| US8372692B2 (en) * | 2010-01-27 | 2013-02-12 | Marvell World Trade Ltd. | Method of stacking flip-chip on wire-bonded chip |
| US20110285013A1 (en) * | 2010-05-20 | 2011-11-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | Controlling Solder Bump Profiles by Increasing Heights of Solder Resists |
| US8922004B2 (en) * | 2010-06-11 | 2014-12-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | Copper bump structures having sidewall protection layers |
| DE102010041917B4 (de) | 2010-10-04 | 2014-01-23 | Smartrac Ip B.V. | Schaltungsanordnung und Verfahren zu deren Herstellung |
| FR2969374B1 (fr) * | 2010-12-16 | 2013-07-19 | St Microelectronics Crolles 2 | Procédé d'assemblage de deux circuits intégrés et structure correspondante |
| US8936967B2 (en) * | 2011-03-23 | 2015-01-20 | Intel Corporation | Solder in cavity interconnection structures |
| CN102368495A (zh) * | 2011-10-09 | 2012-03-07 | 常熟市华海电子有限公司 | 一种防静电芯片封装结构 |
| US8970035B2 (en) * | 2012-08-31 | 2015-03-03 | Taiwan Semiconductor Manufacturing Company, Ltd. | Bump structures for semiconductor package |
| JP2014060211A (ja) * | 2012-09-14 | 2014-04-03 | Omron Corp | 基板構造、半導体チップの実装方法及びソリッドステートリレー |
| US9627347B2 (en) * | 2012-09-24 | 2017-04-18 | National Institute Of Advanced Industrial Science And Technology | Method of manufacturing semiconductor device and semiconductor device manufacturing apparatus |
| JP6044258B2 (ja) * | 2012-10-19 | 2016-12-14 | コニカミノルタ株式会社 | インクジェットヘッド |
| US20140362550A1 (en) * | 2013-06-11 | 2014-12-11 | Nvidia Corporation | Selective wetting process to increase solder joint standoff |
| KR102111739B1 (ko) | 2013-07-23 | 2020-05-15 | 삼성전자주식회사 | 반도체 패키지 및 그 제조방법 |
| CN104425287A (zh) * | 2013-08-19 | 2015-03-18 | 讯芯电子科技(中山)有限公司 | 封装结构及制造方法 |
| CN103579012B (zh) * | 2013-10-24 | 2016-08-17 | 天水华天科技股份有限公司 | 带焊球面阵列四面扁平无引脚封装件生产方法 |
| US20150187681A1 (en) * | 2013-12-26 | 2015-07-02 | Ravi V. Mahajan | Flexible microelectronic assembly and method |
| KR101534705B1 (ko) * | 2013-12-30 | 2015-07-07 | 현대자동차 주식회사 | 반도체 기판의 접합 방법 |
| KR101542965B1 (ko) * | 2013-12-30 | 2015-08-07 | 현대자동차 주식회사 | 반도체 기판의 접합 방법 |
| CN106471612B (zh) * | 2014-06-27 | 2019-07-19 | 索尼公司 | 半导体器件及其制造方法 |
| KR101691099B1 (ko) * | 2015-04-30 | 2016-12-29 | 하나 마이크론(주) | 팬 아웃 패키지, 팬 아웃 pop 패키지 및 그 제조 방법 |
| US9935072B2 (en) * | 2015-11-04 | 2018-04-03 | Sfa Semicon Co., Ltd. | Semiconductor package and method for manufacturing the same |
| TWI606565B (zh) * | 2016-08-31 | 2017-11-21 | 金寶電子工業股份有限公司 | 封裝結構及其製作方法 |
| CN106816417B (zh) * | 2017-01-13 | 2019-02-12 | 南京大学 | 一种高密度封装及其制造方法 |
| KR20190117514A (ko) * | 2017-02-17 | 2019-10-16 | 소니 세미컨덕터 솔루션즈 가부시키가이샤 | 반도체 장치, 칩형상 반도체 소자, 반도체 장치를 구비한 전자 기기 및 반도체 장치의 제조 방법 |
| KR102432216B1 (ko) * | 2017-07-11 | 2022-08-12 | 쑤저우 레킨 세미컨덕터 컴퍼니 리미티드 | 발광소자 패키지 |
| US10269672B2 (en) * | 2017-08-24 | 2019-04-23 | Advanced Semiconductor Engineering, Inc. | Semiconductor package device and method of manufacturing the same |
| KR102393035B1 (ko) * | 2017-09-01 | 2022-05-02 | 쑤저우 레킨 세미컨덕터 컴퍼니 리미티드 | 발광소자 패키지 |
| WO2019054548A1 (ko) * | 2017-09-12 | 2019-03-21 | 엘지이노텍 주식회사 | 발광소자 패키지 |
| US10598874B2 (en) * | 2017-11-02 | 2020-03-24 | International Business Machines Corporation | Fabrication method of high aspect ratio solder bumping with stud bump and injection molded solder, and flip chip joining with the solder bump |
| DE102018104279B4 (de) | 2018-02-26 | 2025-02-06 | Tdk Corporation | Elektronische Vorrichtung |
| JP7214966B2 (ja) | 2018-03-16 | 2023-01-31 | 富士電機株式会社 | 半導体装置及び半導体装置の製造方法 |
| KR20230020129A (ko) | 2021-08-03 | 2023-02-10 | 삼성전자주식회사 | 반도체 패키지 및 반도체 패키지의 제조 방법 |
| US20230319971A1 (en) * | 2022-03-30 | 2023-10-05 | Applied Materials, Inc. | Methods of manufacturing plasma generating cells for a plasma source |
Family Cites Families (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CA2034703A1 (en) * | 1990-01-23 | 1991-07-24 | Masanori Nishiguchi | Substrate for packaging a semiconductor device |
| JP3215424B2 (ja) * | 1992-03-24 | 2001-10-09 | ユニシス・コーポレイション | 微細自己整合特性を有する集積回路モジュール |
| US5329423A (en) * | 1993-04-13 | 1994-07-12 | Scholz Kenneth D | Compressive bump-and-socket interconnection scheme for integrated circuits |
| JP3160175B2 (ja) * | 1995-02-13 | 2001-04-23 | 三菱電機株式会社 | 電子部品の実装方法 |
| US5795818A (en) * | 1996-12-06 | 1998-08-18 | Amkor Technology, Inc. | Integrated circuit chip to substrate interconnection and method |
| US6330967B1 (en) * | 1997-03-13 | 2001-12-18 | International Business Machines Corporation | Process to produce a high temperature interconnection |
| US6492600B1 (en) * | 1999-06-28 | 2002-12-10 | International Business Machines Corporation | Laminate having plated microvia interconnects and method for forming the same |
| JP2001257453A (ja) * | 2000-03-09 | 2001-09-21 | Shinko Electric Ind Co Ltd | 配線基板、半導体装置及びそれらの製造方法 |
| US6787918B1 (en) * | 2000-06-02 | 2004-09-07 | Siliconware Precision Industries Co., Ltd. | Substrate structure of flip chip package |
| US6573610B1 (en) * | 2000-06-02 | 2003-06-03 | Siliconware Precision Industries Co., Ltd. | Substrate of semiconductor package for flip chip package |
| DE10104574A1 (de) * | 2001-02-01 | 2002-08-08 | Epcos Ag | Substrat für ein elektrisches Bauelement und Verfahren zur Herstellung |
| JP2002033349A (ja) * | 2001-06-07 | 2002-01-31 | Matsushita Electric Ind Co Ltd | 半導体素子の実装方法、及び回路基板 |
| JP3829325B2 (ja) * | 2002-02-07 | 2006-10-04 | 日本電気株式会社 | 半導体素子およびその製造方法並びに半導体装置の製造方法 |
| US6975035B2 (en) * | 2002-03-04 | 2005-12-13 | Micron Technology, Inc. | Method and apparatus for dielectric filling of flip chip on interposer assembly |
| JP3897250B2 (ja) | 2002-08-28 | 2007-03-22 | 日本シイエムケイ株式会社 | 半導体パッケージ用基板とその製造方法 |
-
2006
- 2006-07-31 US US11/496,111 patent/US7652374B2/en active Active
-
2007
- 2007-07-23 KR KR20097001617A patent/KR20090042777A/ko not_active Ceased
- 2007-07-23 WO PCT/CN2007/002228 patent/WO2008017232A1/en not_active Ceased
- 2007-07-23 EP EP07764102A patent/EP2054933A4/en not_active Withdrawn
- 2007-07-23 MY MYPI20090319 patent/MY151533A/en unknown
- 2007-07-23 JP JP2009522071A patent/JP4988843B2/ja active Active
- 2007-07-23 CN CN2007800278123A patent/CN101496168B/zh active Active
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