JP2009135419A - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法 Download PDFInfo
- Publication number
- JP2009135419A JP2009135419A JP2008219523A JP2008219523A JP2009135419A JP 2009135419 A JP2009135419 A JP 2009135419A JP 2008219523 A JP2008219523 A JP 2008219523A JP 2008219523 A JP2008219523 A JP 2008219523A JP 2009135419 A JP2009135419 A JP 2009135419A
- Authority
- JP
- Japan
- Prior art keywords
- film
- silicon
- gate electrode
- metal
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/0172—Manufacturing their gate conductors
- H10D84/0177—Manufacturing their gate conductors the gate conductors having different materials or different implants
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/0212—Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/021—Manufacture or treatment using multiple gate spacer layers, e.g. bilayered sidewall spacers
Landscapes
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Electrodes Of Semiconductors (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2008219523A JP2009135419A (ja) | 2007-10-31 | 2008-08-28 | 半導体装置及びその製造方法 |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007282846 | 2007-10-31 | ||
| JP2008219523A JP2009135419A (ja) | 2007-10-31 | 2008-08-28 | 半導体装置及びその製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2009135419A true JP2009135419A (ja) | 2009-06-18 |
| JP2009135419A5 JP2009135419A5 (enExample) | 2011-05-26 |
Family
ID=40581740
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2008219523A Pending JP2009135419A (ja) | 2007-10-31 | 2008-08-28 | 半導体装置及びその製造方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US7964918B2 (enExample) |
| JP (1) | JP2009135419A (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011014782A (ja) * | 2009-07-03 | 2011-01-20 | Renesas Electronics Corp | 半導体装置の製造方法 |
Families Citing this family (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8680629B2 (en) * | 2009-06-03 | 2014-03-25 | International Business Machines Corporation | Control of flatband voltages and threshold voltages in high-k metal gate stacks and structures for CMOS devices |
| US8551855B2 (en) * | 2009-10-23 | 2013-10-08 | Sandisk 3D Llc | Memory cell that includes a carbon-based reversible resistance switching element compatible with a steering element, and methods of forming the same |
| US8481396B2 (en) * | 2009-10-23 | 2013-07-09 | Sandisk 3D Llc | Memory cell that includes a carbon-based reversible resistance switching element compatible with a steering element, and methods of forming the same |
| US8274116B2 (en) | 2009-11-16 | 2012-09-25 | International Business Machines Corporation | Control of threshold voltages in high-k metal gate stack and structures for CMOS devices |
| US8551850B2 (en) * | 2009-12-07 | 2013-10-08 | Sandisk 3D Llc | Methods of forming a reversible resistance-switching metal-insulator-metal structure |
| US20110210306A1 (en) * | 2010-02-26 | 2011-09-01 | Yubao Li | Memory cell that includes a carbon-based memory element and methods of forming the same |
| US8471360B2 (en) | 2010-04-14 | 2013-06-25 | Sandisk 3D Llc | Memory cell with carbon switching material having a reduced cross-sectional area and methods for forming the same |
| KR101194973B1 (ko) * | 2010-04-27 | 2012-10-25 | 에스케이하이닉스 주식회사 | 반도체 소자의 트랜지스터 및 그 형성방법 |
| US8343839B2 (en) * | 2010-05-27 | 2013-01-01 | International Business Machines Corporation | Scaled equivalent oxide thickness for field effect transistor devices |
| TWI565079B (zh) | 2010-10-20 | 2017-01-01 | 半導體能源研究所股份有限公司 | 半導體裝置及半導體裝置的製造方法 |
| US8569754B2 (en) | 2010-11-05 | 2013-10-29 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
| US8894825B2 (en) | 2010-12-17 | 2014-11-25 | Semiconductor Energy Laboratory Co., Ltd. | Sputtering target, method for manufacturing the same, manufacturing semiconductor device |
| CN102655168A (zh) * | 2011-03-04 | 2012-09-05 | 中国科学院微电子研究所 | 栅极结构及其制造方法 |
| CN102332397A (zh) * | 2011-10-25 | 2012-01-25 | 上海华力微电子有限公司 | 一种双高k栅介质/金属栅结构的制作方法 |
| KR101923946B1 (ko) | 2012-08-31 | 2018-11-30 | 삼성전자 주식회사 | 반도체 장치 및 그 제조 방법 |
| KR20140140194A (ko) * | 2013-05-28 | 2014-12-09 | 삼성전자주식회사 | 반도체 소자의 제조 방법 |
| US10229853B2 (en) * | 2013-09-27 | 2019-03-12 | Intel Corporation | Non-planar I/O and logic semiconductor devices having different workfunction on common substrate |
| TWI649875B (zh) * | 2015-08-28 | 2019-02-01 | 聯華電子股份有限公司 | 半導體元件及其製造方法 |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006518547A (ja) * | 2003-02-03 | 2006-08-10 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | 半導体装置の製造方法とそのような方法により得られる半導体装置 |
| JP2006339210A (ja) * | 2005-05-31 | 2006-12-14 | Sanyo Electric Co Ltd | 半導体装置の製造方法および半導体装置 |
| WO2007031930A2 (en) * | 2005-09-15 | 2007-03-22 | Nxp B.V. | Method of manufacturing semiconductor device with different metallic gates |
| JP2009509324A (ja) * | 2005-09-15 | 2009-03-05 | エヌエックスピー ビー ヴィ | 半導体デバイスおよびその製造方法 |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3395263B2 (ja) * | 1992-07-31 | 2003-04-07 | セイコーエプソン株式会社 | 半導体装置およびその製造方法 |
| JP3287403B2 (ja) * | 1999-02-19 | 2002-06-04 | 日本電気株式会社 | Mis型電界効果トランジスタ及びその製造方法 |
| KR100502426B1 (ko) * | 2003-09-18 | 2005-07-20 | 삼성전자주식회사 | 듀얼 게이트를 갖는 반도체 소자 및 그 형성 방법 |
| US7297588B2 (en) * | 2005-01-28 | 2007-11-20 | Freescale Semiconductor, Inc. | Electronic device comprising a gate electrode including a metal-containing layer having one or more impurities and a process for forming the same |
| US7074664B1 (en) * | 2005-03-29 | 2006-07-11 | Freescale Semiconductor, Inc. | Dual metal gate electrode semiconductor fabrication process and structure thereof |
| US7361538B2 (en) * | 2005-04-14 | 2008-04-22 | Infineon Technologies Ag | Transistors and methods of manufacture thereof |
| JP2007019396A (ja) * | 2005-07-11 | 2007-01-25 | Renesas Technology Corp | Mos構造を有する半導体装置およびその製造方法 |
| DE102005057073B4 (de) * | 2005-11-30 | 2011-02-03 | Advanced Micro Devices, Inc., Sunnyvale | Herstellungsverfahren zur Verbesserung der mechanischen Spannungsübertragung in Kanalgebieten von NMOS- und PMOS-Transistoren und entsprechendes Halbleiterbauelement |
| KR100663375B1 (ko) * | 2006-01-18 | 2007-01-02 | 삼성전자주식회사 | 금속질화막을 게이트전극으로 채택하는 반도체소자의제조방법 |
| US20070228480A1 (en) * | 2006-04-03 | 2007-10-04 | Taiwan Semiconductor Manufacturing Co., Ltd. | CMOS device having PMOS and NMOS transistors with different gate structures |
| KR100753558B1 (ko) * | 2006-08-21 | 2007-08-30 | 삼성전자주식회사 | 씨모스 트랜지스터 및 그 제조 방법 |
| US7435652B1 (en) * | 2007-03-30 | 2008-10-14 | International Business Machines Corporation | Integration schemes for fabricating polysilicon gate MOSFET and high-K dielectric metal gate MOSFET |
-
2008
- 2008-08-28 JP JP2008219523A patent/JP2009135419A/ja active Pending
- 2008-10-09 US US12/248,156 patent/US7964918B2/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006518547A (ja) * | 2003-02-03 | 2006-08-10 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | 半導体装置の製造方法とそのような方法により得られる半導体装置 |
| JP2006339210A (ja) * | 2005-05-31 | 2006-12-14 | Sanyo Electric Co Ltd | 半導体装置の製造方法および半導体装置 |
| WO2007031930A2 (en) * | 2005-09-15 | 2007-03-22 | Nxp B.V. | Method of manufacturing semiconductor device with different metallic gates |
| JP2009509324A (ja) * | 2005-09-15 | 2009-03-05 | エヌエックスピー ビー ヴィ | 半導体デバイスおよびその製造方法 |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011014782A (ja) * | 2009-07-03 | 2011-01-20 | Renesas Electronics Corp | 半導体装置の製造方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| US20090108368A1 (en) | 2009-04-30 |
| US7964918B2 (en) | 2011-06-21 |
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