JP2009094457A - 積層実装構造体及び積層実装構造体の製造方法 - Google Patents

積層実装構造体及び積層実装構造体の製造方法 Download PDF

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Publication number
JP2009094457A
JP2009094457A JP2008091636A JP2008091636A JP2009094457A JP 2009094457 A JP2009094457 A JP 2009094457A JP 2008091636 A JP2008091636 A JP 2008091636A JP 2008091636 A JP2008091636 A JP 2008091636A JP 2009094457 A JP2009094457 A JP 2009094457A
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JP
Japan
Prior art keywords
conductive member
mounting structure
substrate
stacked mounting
stacked
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2008091636A
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English (en)
Japanese (ja)
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JP2009094457A5 (enExample
Inventor
Mikio Nakamura
幹夫 中村
Takeshi Kondo
雄 近藤
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Olympus Corp
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Olympus Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Olympus Corp filed Critical Olympus Corp
Priority to JP2008091636A priority Critical patent/JP2009094457A/ja
Priority to CN2008801075629A priority patent/CN101803020B/zh
Priority to PCT/JP2008/066655 priority patent/WO2009038042A1/ja
Priority to EP08832607.9A priority patent/EP2194576B1/en
Priority to US12/678,855 priority patent/US20100202126A1/en
Publication of JP2009094457A publication Critical patent/JP2009094457A/ja
Publication of JP2009094457A5 publication Critical patent/JP2009094457A5/ja
Priority to US13/668,982 priority patent/US10244639B2/en
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/36—Assembling printed circuits with other printed circuits
    • H05K3/368—Assembling printed circuits with other printed circuits parallel to each other
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H05K1/144—Stacked arrangements of planar printed circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4046—Through-connections; Vertical interconnect access [VIA] connections using auxiliary conductive elements, e.g. metallic spheres, eyelets, pieces of wire
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4647—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits by applying an insulating layer around previously made via studs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/08—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers by depositing layers on the chip or wafer, e.g. "chip-first" RDLs
    • H10W70/09—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers by depositing layers on the chip or wafer, e.g. "chip-first" RDLs extending onto an encapsulation that laterally surrounds the chip or wafer, e.g. fan-out wafer level package [FOWLP] RDLs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/04—Assemblies of printed circuits
    • H05K2201/042—Stacked spaced PCBs; Planar parts of folded flexible circuits having mounted components in between or spaced from each other
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/10242—Metallic cylinders
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/1031—Surface mounted metallic connector elements
    • H05K2201/10318—Surface mounted metallic pins
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
    • H05K2203/025—Abrading, e.g. grinding or sand blasting
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/13—Moulding and encapsulation; Deposition techniques; Protective layers
    • H05K2203/1305—Moulding and encapsulation
    • H05K2203/1316—Moulded encapsulation of mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • H05K3/284—Applying non-metallic protective coatings for encapsulating mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3421—Leaded components
    • H05K3/3426—Leaded components characterised by the leads
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/013—Manufacture or treatment of die-attach connectors
    • H10W72/01331—Manufacture or treatment of die-attach connectors using blanket deposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241—Dispositions, e.g. layouts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/9413—Dispositions of bond pads on encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/114—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/20—Configurations of stacked chips
    • H10W90/297—Configurations of stacked chips characterised by the through-semiconductor vias [TSVs] in the stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/722—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between stacked chips
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49147—Assembling terminal to base

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Combinations Of Printed Boards (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Wire Bonding (AREA)
JP2008091636A 2007-09-18 2008-03-31 積層実装構造体及び積層実装構造体の製造方法 Pending JP2009094457A (ja)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP2008091636A JP2009094457A (ja) 2007-09-18 2008-03-31 積層実装構造体及び積層実装構造体の製造方法
CN2008801075629A CN101803020B (zh) 2007-09-18 2008-09-16 叠层安装结构体和叠层安装结构体的制造方法
PCT/JP2008/066655 WO2009038042A1 (ja) 2007-09-18 2008-09-16 積層実装構造体及び積層実装構造体の製造方法
EP08832607.9A EP2194576B1 (en) 2007-09-18 2008-09-16 Method for manufacturing a stacked mounting structure
US12/678,855 US20100202126A1 (en) 2007-09-18 2008-09-16 Stacked Mounting Structure and Method of Manufacturing Stacked Mounting Structure
US13/668,982 US10244639B2 (en) 2007-09-18 2012-11-05 Method of manufacturing stacked mounting structure

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007240785 2007-09-18
JP2008091636A JP2009094457A (ja) 2007-09-18 2008-03-31 積層実装構造体及び積層実装構造体の製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2013222092A Division JP5654109B2 (ja) 2007-09-18 2013-10-25 積層実装構造体の製造方法

Publications (2)

Publication Number Publication Date
JP2009094457A true JP2009094457A (ja) 2009-04-30
JP2009094457A5 JP2009094457A5 (enExample) 2011-03-24

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JP2008091636A Pending JP2009094457A (ja) 2007-09-18 2008-03-31 積層実装構造体及び積層実装構造体の製造方法

Country Status (5)

Country Link
US (2) US20100202126A1 (enExample)
EP (1) EP2194576B1 (enExample)
JP (1) JP2009094457A (enExample)
CN (1) CN101803020B (enExample)
WO (1) WO2009038042A1 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2017010216A1 (ja) * 2015-07-15 2017-01-19 株式会社村田製作所 電子部品

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5449237B2 (ja) * 2011-03-09 2014-03-19 古河電気工業株式会社 基板および基板の製造方法
JP2014123638A (ja) * 2012-12-21 2014-07-03 Murata Mfg Co Ltd 部品モジュール
JP6205228B2 (ja) * 2013-09-30 2017-09-27 オリンパス株式会社 撮像モジュールおよび内視鏡装置
DE102014101366B3 (de) * 2014-02-04 2015-05-13 Infineon Technologies Ag Chip-Montage an über Chip hinausstehender Adhäsions- bzw. Dielektrikumsschicht auf Substrat
KR20150092881A (ko) * 2014-02-06 2015-08-17 엘지이노텍 주식회사 인쇄회로기판, 패키지 기판 및 이의 제조 방법
JP6274135B2 (ja) * 2015-03-12 2018-02-07 株式会社村田製作所 コイルモジュール
US9825597B2 (en) 2015-12-30 2017-11-21 Skyworks Solutions, Inc. Impedance transformation circuit for amplifier
US10269769B2 (en) 2016-04-18 2019-04-23 Skyworks Solutions, Inc. System in package with vertically arranged radio frequency componentry
US10297576B2 (en) 2016-04-18 2019-05-21 Skyworks Solutions, Inc. Reduced form factor radio frequency system-in-package
US10062670B2 (en) 2016-04-18 2018-08-28 Skyworks Solutions, Inc. Radio frequency system-in-package with stacked clocking crystal
US9918386B2 (en) 2016-04-18 2018-03-13 Skyworks Solutions, Inc. Surface mount device stacking for reduced form factor
TWI907080B (zh) 2016-12-29 2025-12-01 美商天工方案公司 封裝模組、無線通信裝置及射頻信號傳輸方法
US10515924B2 (en) 2017-03-10 2019-12-24 Skyworks Solutions, Inc. Radio frequency modules
DE102017212739A1 (de) * 2017-07-25 2019-01-31 Siemens Aktiengesellschaft Halbleiterbauteil sowie Verfahren zu dessen Herstellung
CN109714910B (zh) * 2019-01-29 2020-08-14 维沃移动通信有限公司 一种多层电路板的制造方法、多层电路板和移动终端
JP7666878B2 (ja) * 2020-11-18 2025-04-22 株式会社ディスコ ウェーハの製造方法及び積層デバイスチップの製造方法
JP7612290B2 (ja) 2020-11-18 2025-01-14 株式会社ディスコ ウェーハの製造方法及び積層デバイスチップの製造方法
JP7693298B2 (ja) * 2020-11-18 2025-06-17 株式会社ディスコ ウェーハの製造方法及び積層デバイスチップの製造方法
JP7608018B2 (ja) * 2020-11-18 2025-01-06 株式会社ディスコ ウェーハの製造方法及び積層デバイスチップの製造方法
JP7612289B2 (ja) * 2020-11-18 2025-01-14 株式会社ディスコ ウェーハの製造方法及び積層デバイスチップの製造方法
JP7608019B2 (ja) 2020-11-18 2025-01-06 株式会社ディスコ ウェーハの製造方法及び積層デバイスチップの製造方法
JP7704544B2 (ja) 2021-03-09 2025-07-08 株式会社ディスコ ウェーハの製造方法及び積層デバイスチップの製造方法
CN117135829B (zh) * 2023-08-30 2024-05-14 西南石油大学 一种基板自动裁切打磨堆叠卸载一体化机

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001110829A (ja) * 1999-10-14 2001-04-20 Rohm Co Ltd 半導体装置およびその製造方法
JP2001168269A (ja) * 1999-12-08 2001-06-22 Denso Corp 半導体素子の実装構造および積層型回路モジュールならびに半導体素子の実装構造の製造方法
JP2001196498A (ja) * 1999-11-09 2001-07-19 Fujitsu Ltd ピン付きモジュール及びピン付きモジュールの製造方法
JP2002134653A (ja) * 2000-10-23 2002-05-10 Matsushita Electric Ind Co Ltd 半導体装置とその製造方法
JP2002359350A (ja) * 2001-05-31 2002-12-13 Denso Corp 積層回路モジュールの製造方法
JP2006165252A (ja) * 2004-12-07 2006-06-22 Shinko Electric Ind Co Ltd チップ内蔵基板の製造方法
JP2007027526A (ja) * 2005-07-20 2007-02-01 Kyushu Institute Of Technology 両面電極パッケージ及びその製造方法
JP2007189187A (ja) * 2006-07-31 2007-07-26 Epson Toyocom Corp プリント基板、プリント基板ユニット、表面実装型高安定圧電発振器、及びプリント基板の加工方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05102149A (ja) * 1991-10-04 1993-04-23 Sharp Corp 半導体装置の製造方法
US5334804A (en) * 1992-11-17 1994-08-02 Fujitsu Limited Wire interconnect structures for connecting an integrated circuit to a substrate
US5977640A (en) * 1998-06-26 1999-11-02 International Business Machines Corporation Highly integrated chip-on-chip packaging
KR100290784B1 (ko) * 1998-09-15 2001-07-12 박종섭 스택 패키지 및 그 제조방법
JP2000323806A (ja) * 1999-05-13 2000-11-24 Matsushita Electric Ind Co Ltd バンプ付セラミック回路基板及びその製造方法
KR100699649B1 (ko) * 1999-08-23 2007-03-23 로무 가부시키가이샤 반도체장치 및 그 제조방법
JP2001144399A (ja) * 1999-11-17 2001-05-25 Sony Corp 基板間接続部材、電子回路基板、電子回路装置及び電子回路装置の製造方法
KR100734264B1 (ko) * 2005-06-16 2007-07-02 삼성전자주식회사 집적회로 패키지와 집적회로 모듈
JP3960479B1 (ja) * 2006-07-07 2007-08-15 国立大学法人九州工業大学 両面電極構造の半導体装置の製造方法

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001110829A (ja) * 1999-10-14 2001-04-20 Rohm Co Ltd 半導体装置およびその製造方法
JP2001196498A (ja) * 1999-11-09 2001-07-19 Fujitsu Ltd ピン付きモジュール及びピン付きモジュールの製造方法
JP2001168269A (ja) * 1999-12-08 2001-06-22 Denso Corp 半導体素子の実装構造および積層型回路モジュールならびに半導体素子の実装構造の製造方法
JP2002134653A (ja) * 2000-10-23 2002-05-10 Matsushita Electric Ind Co Ltd 半導体装置とその製造方法
JP2002359350A (ja) * 2001-05-31 2002-12-13 Denso Corp 積層回路モジュールの製造方法
JP2006165252A (ja) * 2004-12-07 2006-06-22 Shinko Electric Ind Co Ltd チップ内蔵基板の製造方法
JP2007027526A (ja) * 2005-07-20 2007-02-01 Kyushu Institute Of Technology 両面電極パッケージ及びその製造方法
JP2007189187A (ja) * 2006-07-31 2007-07-26 Epson Toyocom Corp プリント基板、プリント基板ユニット、表面実装型高安定圧電発振器、及びプリント基板の加工方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2017010216A1 (ja) * 2015-07-15 2017-01-19 株式会社村田製作所 電子部品

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US20100202126A1 (en) 2010-08-12
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US20130133190A1 (en) 2013-05-30

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