JP2008118129A - フリップチップ接続用基板及びその製造方法 - Google Patents
フリップチップ接続用基板及びその製造方法 Download PDFInfo
- Publication number
- JP2008118129A JP2008118129A JP2007271069A JP2007271069A JP2008118129A JP 2008118129 A JP2008118129 A JP 2008118129A JP 2007271069 A JP2007271069 A JP 2007271069A JP 2007271069 A JP2007271069 A JP 2007271069A JP 2008118129 A JP2008118129 A JP 2008118129A
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- JP
- Japan
- Prior art keywords
- flip chip
- bump pad
- bump
- circuit pattern
- solder
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4007—Surface contacts, e.g. bumps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3114—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00013—Fully indexed content
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0364—Conductor shape
- H05K2201/0367—Metallic bump or raised conductor not used as solder bump
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09745—Recess in conductor, e.g. in pad or in metallic substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10674—Flip chip
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/107—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by filling grooves in the support with conductive material
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49147—Assembling terminal to base
Abstract
【解決手段】バンプパッドを備える基板を製造する方法において、回路パターンが陷沒された絶縁層を提供する段階と、バンプパッドが形成される部位の回路パターンをエッチングしてバンプパッドを形成する段階とを含むフリップチップ接続用基板の製造方法は、絶縁層に陷沒されている回路パターンの一部を溝形状で除去してバンプパッドを形成することを特徴とする。
【選択図】図2
Description
11 回路パターン
12 ソルダレジスト
13 エッチングレジスト
14 バンプパッド
15 ソルダバンプ
Claims (13)
- 回路パターンが陷沒された絶縁層を提供する段階と、
前記回路パターンの一部を除去して溝形状のバンプパッドを形成する段階と
を含むフリップチップ接続用基板製造方法。 - 前記絶縁層を提供する段階が、前記絶縁層に前記バンプパッドに対応する部分が露出するようにエッチングレジストを形成する段階と、
エッチング液を供給して前記回路パターンをエッチングすることで前記バンプパッドを形成する段階と、及び
前記エッチングレジストを除去する段階とを含むことを特徴とする請求項1に記載のフリップチップ接続用基板製造方法。 - 前記バンプパッドに金属層を積層する段階をさらに含む請求項1に記載のフリップチップ接続用基板製造方法。
- 前記金属層が錫(Sn)、チタン(Ti)、金(Au)の中の少なくとも一つを含むことからなることを特徴とする請求項3に記載のフリップチップ接続用基板製造方法。
- 前記バンプパッドが湾曲した溝形状であることを特徴とする請求項1に記載のフリップチップ接続用基板製造方法。
- 前記バンプパッドを形成する段階の以前に前記絶縁層の表面に前記バンプパッドに対応する部分が露出されるようにソルダレジストを形成する段階をさらに行うことを特徴とする請求項1に記載のフリップチップ接続用基板製造方法。
- 前記バンプパッドにソルダバンプを形成する段階をさらに含む請求項1に記載のフリップチップ接続用基板製造方法。
- 前記ソルダバンプを形成する段階が
前記バンプパッドにソルダペーストを提供する段階と、
前記ソルダペーストを溶融させる段階とを含むことを特徴とする請求項7に記載のフリップチップ接続用基板製造方法。 - 絶縁層と、
絶縁層に陷沒された回路パターンと、及び
前記回路パターンの一部が凹状の溝形状で除去されて形成されたバンプパッドを含むフリップチップ接続用基板。 - 前記バンプパッドが湾曲した溝形状でエッチングされたことを特徴とする請求項9に記載のフリップチップ接続用基板。
- 前記バンプパッドの表面に積層される金属層をさらに含む請求項9に記載のフリップチップ接続用基板。
- 前記金属層が錫(Sn)、チタン(Ti)、金(Au)の中の少なくとも一つを含むことを特徴とする請求項11に記載のフリップチップ接続用基板。
- 前記バンプパッドに形成されたソルダバンプをさらに含む請求項9に記載のフリップチップ接続用基板。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020060107907A KR100764668B1 (ko) | 2006-11-02 | 2006-11-02 | 플립칩 접속용 기판 및 그 제조방법 |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2008118129A true JP2008118129A (ja) | 2008-05-22 |
Family
ID=39265091
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2007271069A Pending JP2008118129A (ja) | 2006-11-02 | 2007-10-18 | フリップチップ接続用基板及びその製造方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US20080105458A1 (ja) |
JP (1) | JP2008118129A (ja) |
KR (1) | KR100764668B1 (ja) |
CN (1) | CN101174570A (ja) |
DE (1) | DE102007046329A1 (ja) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009289868A (ja) * | 2008-05-28 | 2009-12-10 | Kyocer Slc Technologies Corp | 配線基板およびその製造方法 |
JP2012015198A (ja) * | 2010-06-29 | 2012-01-19 | Kyocer Slc Technologies Corp | 配線基板およびその製造方法 |
JP2012212827A (ja) * | 2011-03-31 | 2012-11-01 | Hitachi Chem Co Ltd | 半導体素子搭載用パッケージ基板の製造方法 |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20090289360A1 (en) * | 2008-05-23 | 2009-11-26 | Texas Instruments Inc | Workpiece contact pads with elevated ring for restricting horizontal movement of terminals of ic during pressing |
JP5897637B2 (ja) | 2014-04-30 | 2016-03-30 | ファナック株式会社 | 耐食性を向上させたプリント基板およびその製造方法 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06152114A (ja) * | 1992-10-30 | 1994-05-31 | Sony Corp | 電気回路配線基板及びその製造方法並びに電気回路装置 |
JP2003133711A (ja) * | 2001-10-23 | 2003-05-09 | Matsushita Electric Ind Co Ltd | プリント配線板とその製造方法および電子部品の実装方法 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100216839B1 (ko) * | 1996-04-01 | 1999-09-01 | 김규현 | Bga 반도체 패키지의 솔더 볼 랜드 메탈 구조 |
KR19990034732A (ko) * | 1997-10-30 | 1999-05-15 | 윤종용 | 금속 입자를 이용한 플립칩 접속 방법 |
JP3420076B2 (ja) * | 1998-08-31 | 2003-06-23 | 新光電気工業株式会社 | フリップチップ実装基板の製造方法及びフリップチップ実装基板及びフリップチップ実装構造 |
TW437030B (en) * | 2000-02-03 | 2001-05-28 | Taiwan Semiconductor Mfg | Bonding pad structure and method for making the same |
JP2001284783A (ja) * | 2000-03-30 | 2001-10-12 | Shinko Electric Ind Co Ltd | 表面実装用基板及び表面実装構造 |
JP3581111B2 (ja) * | 2001-05-01 | 2004-10-27 | 新光電気工業株式会社 | 半導体素子の実装基板及び実装構造 |
KR100426897B1 (ko) * | 2001-08-21 | 2004-04-30 | 주식회사 네패스 | 솔더 터미널 및 그 제조방법 |
EP1387604A1 (en) * | 2002-07-31 | 2004-02-04 | United Test Center Inc. | Bonding pads of printed circuit board capable of holding solder balls securely |
US6825541B2 (en) * | 2002-10-09 | 2004-11-30 | Taiwan Semiconductor Manufacturing Co., Ltd | Bump pad design for flip chip bumping |
KR100585104B1 (ko) * | 2003-10-24 | 2006-05-30 | 삼성전자주식회사 | 초박형 플립칩 패키지의 제조방법 |
US7213329B2 (en) * | 2004-08-14 | 2007-05-08 | Samsung Electronics, Co., Ltd. | Method of forming a solder ball on a board and the board |
-
2006
- 2006-11-02 KR KR1020060107907A patent/KR100764668B1/ko not_active IP Right Cessation
-
2007
- 2007-09-27 DE DE102007046329A patent/DE102007046329A1/de not_active Withdrawn
- 2007-10-18 JP JP2007271069A patent/JP2008118129A/ja active Pending
- 2007-10-22 CN CNA2007101673028A patent/CN101174570A/zh active Pending
- 2007-10-26 US US11/976,762 patent/US20080105458A1/en not_active Abandoned
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06152114A (ja) * | 1992-10-30 | 1994-05-31 | Sony Corp | 電気回路配線基板及びその製造方法並びに電気回路装置 |
JP2003133711A (ja) * | 2001-10-23 | 2003-05-09 | Matsushita Electric Ind Co Ltd | プリント配線板とその製造方法および電子部品の実装方法 |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009289868A (ja) * | 2008-05-28 | 2009-12-10 | Kyocer Slc Technologies Corp | 配線基板およびその製造方法 |
JP2012015198A (ja) * | 2010-06-29 | 2012-01-19 | Kyocer Slc Technologies Corp | 配線基板およびその製造方法 |
JP2012212827A (ja) * | 2011-03-31 | 2012-11-01 | Hitachi Chem Co Ltd | 半導体素子搭載用パッケージ基板の製造方法 |
Also Published As
Publication number | Publication date |
---|---|
KR100764668B1 (ko) | 2007-10-08 |
DE102007046329A1 (de) | 2008-05-08 |
CN101174570A (zh) | 2008-05-07 |
US20080105458A1 (en) | 2008-05-08 |
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