JP2006510206A5 - - Google Patents

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Publication number
JP2006510206A5
JP2006510206A5 JP2004559410A JP2004559410A JP2006510206A5 JP 2006510206 A5 JP2006510206 A5 JP 2006510206A5 JP 2004559410 A JP2004559410 A JP 2004559410A JP 2004559410 A JP2004559410 A JP 2004559410A JP 2006510206 A5 JP2006510206 A5 JP 2006510206A5
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JP
Japan
Prior art keywords
region
semiconductor layer
conductivity type
source
gate structure
Prior art date
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Pending
Application number
JP2004559410A
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English (en)
Japanese (ja)
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JP2006510206A (ja
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Priority claimed from US10/315,517 external-priority patent/US6870218B2/en
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Publication of JP2006510206A publication Critical patent/JP2006510206A/ja
Publication of JP2006510206A5 publication Critical patent/JP2006510206A5/ja
Pending legal-status Critical Current

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JP2004559410A 2002-12-10 2003-12-09 集積回路構造体 Pending JP2006510206A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/315,517 US6870218B2 (en) 2002-12-10 2002-12-10 Integrated circuit structure with improved LDMOS design
PCT/US2003/038931 WO2004053939A2 (en) 2002-12-10 2003-12-09 Integrated circuit structure with improved ldmos design

Publications (2)

Publication Number Publication Date
JP2006510206A JP2006510206A (ja) 2006-03-23
JP2006510206A5 true JP2006510206A5 (enExample) 2011-09-29

Family

ID=32468724

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004559410A Pending JP2006510206A (ja) 2002-12-10 2003-12-09 集積回路構造体

Country Status (8)

Country Link
US (3) US6870218B2 (enExample)
JP (1) JP2006510206A (enExample)
KR (1) KR101030178B1 (enExample)
CN (1) CN100524812C (enExample)
AU (1) AU2003296321A1 (enExample)
DE (1) DE10393858T5 (enExample)
TW (1) TWI355074B (enExample)
WO (1) WO2004053939A2 (enExample)

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US6870218B2 (en) * 2002-12-10 2005-03-22 Fairchild Semiconductor Corporation Integrated circuit structure with improved LDMOS design
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US7736984B2 (en) * 2005-09-23 2010-06-15 Semiconductor Components Industries, Llc Method of forming a low resistance semiconductor contact and structure therefor
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KR100778861B1 (ko) * 2006-12-12 2007-11-22 동부일렉트로닉스 주식회사 Ldmos 반도체 소자의 제조 방법
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US8063443B2 (en) 2007-10-30 2011-11-22 Fairchild Semiconductor Corporation Hybrid-mode LDMOS
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US8138558B2 (en) * 2010-08-20 2012-03-20 Great Wall Semiconductor Corporation Semiconductor device and method of forming low voltage MOSFET for portable electronic devices and data processing centers
JP5700649B2 (ja) * 2011-01-24 2015-04-15 旭化成エレクトロニクス株式会社 半導体装置の製造方法
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CN103456734B (zh) * 2012-05-28 2016-04-13 上海华虹宏力半导体制造有限公司 一种非对称ldmos工艺偏差的监控结构及其制造方法
US9337284B2 (en) 2014-04-07 2016-05-10 Alpha And Omega Semiconductor Incorporated Closed cell lateral MOSFET using silicide source and body regions
US10038063B2 (en) 2014-06-10 2018-07-31 International Business Machines Corporation Tunable breakdown voltage RF FET devices
US9397090B1 (en) * 2015-04-10 2016-07-19 Macronix International Co., Ltd. Semiconductor device
CN108493113A (zh) * 2018-03-30 2018-09-04 北京时代民芯科技有限公司 一种低电阻抗辐照vdmos芯片的制造方法
TWI666681B (zh) * 2018-07-18 2019-07-21 帥群微電子股份有限公司 半導體功率元件及其製造方法
US20210020630A1 (en) * 2019-04-15 2021-01-21 Nexchip Semiconductor Co., Ltd. High-voltage tolerant semiconductor element
CN111200020B (zh) * 2019-04-15 2021-01-08 合肥晶合集成电路股份有限公司 高耐压半导体元件及其制造方法
US11581215B2 (en) * 2020-07-14 2023-02-14 Newport Fab, Llc Body-source-tied semiconductor-on-insulator (SOI) transistor
US12295155B2 (en) * 2020-07-14 2025-05-06 Newport Fab, Llc Asymmetric halo-implant body-source-tied semiconductor-on-insulator (SOI) device
CN116207142B (zh) * 2023-05-04 2023-07-18 合肥晶合集成电路股份有限公司 一种半导体结构及其制作方法

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