JP2006286118A - 閾値電圧制御機能を有する不揮発性記憶装置 - Google Patents

閾値電圧制御機能を有する不揮発性記憶装置 Download PDF

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Publication number
JP2006286118A
JP2006286118A JP2005106446A JP2005106446A JP2006286118A JP 2006286118 A JP2006286118 A JP 2006286118A JP 2005106446 A JP2005106446 A JP 2005106446A JP 2005106446 A JP2005106446 A JP 2005106446A JP 2006286118 A JP2006286118 A JP 2006286118A
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JP
Japan
Prior art keywords
circuit
adjustment value
output adjustment
erasing
unit area
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Ceased
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JP2005106446A
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English (en)
Japanese (ja)
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JP2006286118A5 (enExample
Inventor
Kenji Misumi
賢治 三角
Makoto Kojima
誠 小島
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2005106446A priority Critical patent/JP2006286118A/ja
Priority to US11/377,433 priority patent/US7280409B2/en
Priority to CNB2006100716680A priority patent/CN100472655C/zh
Publication of JP2006286118A publication Critical patent/JP2006286118A/ja
Publication of JP2006286118A5 publication Critical patent/JP2006286118A5/ja
Ceased legal-status Critical Current

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/102—External programming circuits, e.g. EPROM programmers; In-circuit programming or reprogramming; EPROM emulators
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/30—Power supply circuits

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  • Read Only Memory (AREA)
JP2005106446A 2005-04-01 2005-04-01 閾値電圧制御機能を有する不揮発性記憶装置 Ceased JP2006286118A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2005106446A JP2006286118A (ja) 2005-04-01 2005-04-01 閾値電圧制御機能を有する不揮発性記憶装置
US11/377,433 US7280409B2 (en) 2005-04-01 2006-03-17 Non-volatile memory device with threshold voltage control function
CNB2006100716680A CN100472655C (zh) 2005-04-01 2006-03-30 具有阈值电压控制功能的非易失性存储器

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005106446A JP2006286118A (ja) 2005-04-01 2005-04-01 閾値電圧制御機能を有する不揮発性記憶装置

Publications (2)

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JP2006286118A true JP2006286118A (ja) 2006-10-19
JP2006286118A5 JP2006286118A5 (enExample) 2008-04-10

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JP2005106446A Ceased JP2006286118A (ja) 2005-04-01 2005-04-01 閾値電圧制御機能を有する不揮発性記憶装置

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Country Link
US (1) US7280409B2 (enExample)
JP (1) JP2006286118A (enExample)
CN (1) CN100472655C (enExample)

Cited By (4)

* Cited by examiner, † Cited by third party
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JP2009146474A (ja) * 2007-12-12 2009-07-02 Toshiba Corp 不揮発性半導体記憶装置
JP2009266349A (ja) * 2008-04-28 2009-11-12 Toshiba Corp 不揮発性半導体記憶装置
JP2009301616A (ja) * 2008-06-11 2009-12-24 Toshiba Corp 不揮発性半導体記憶装置
JP2013073643A (ja) * 2011-09-27 2013-04-22 Toshiba Corp 不揮発性半導体記憶装置

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KR101202537B1 (ko) 2006-05-12 2012-11-19 애플 인크. 메모리 디바이스를 위한 결합된 왜곡 추정 및 에러 보정 코딩
US8060806B2 (en) 2006-08-27 2011-11-15 Anobit Technologies Ltd. Estimation of non-linear distortion in memory devices
US7975192B2 (en) 2006-10-30 2011-07-05 Anobit Technologies Ltd. Reading memory cells using multiple thresholds
US7924648B2 (en) * 2006-11-28 2011-04-12 Anobit Technologies Ltd. Memory power and performance management
US8151163B2 (en) 2006-12-03 2012-04-03 Anobit Technologies Ltd. Automatic defect management in memory devices
US8151166B2 (en) 2007-01-24 2012-04-03 Anobit Technologies Ltd. Reduction of back pattern dependency effects in memory devices
US8369141B2 (en) 2007-03-12 2013-02-05 Apple Inc. Adaptive estimation of memory cell read thresholds
JP2008270343A (ja) * 2007-04-17 2008-11-06 Renesas Technology Corp 不揮発性半導体記憶装置
US8001320B2 (en) 2007-04-22 2011-08-16 Anobit Technologies Ltd. Command interface for memory devices
WO2008139441A2 (en) 2007-05-12 2008-11-20 Anobit Technologies Ltd. Memory device with internal signal processing unit
US8234545B2 (en) 2007-05-12 2012-07-31 Apple Inc. Data storage with incremental redundancy
JP5241148B2 (ja) * 2007-06-08 2013-07-17 スパンション エルエルシー 半導体装置及びその制御方法
US7925936B1 (en) 2007-07-13 2011-04-12 Anobit Technologies Ltd. Memory device with non-uniform programming levels
US8259497B2 (en) 2007-08-06 2012-09-04 Apple Inc. Programming schemes for multi-level analog memory cells
US8174905B2 (en) 2007-09-19 2012-05-08 Anobit Technologies Ltd. Programming orders for reducing distortion in arrays of multi-level analog memory cells
US8068360B2 (en) 2007-10-19 2011-11-29 Anobit Technologies Ltd. Reading analog memory cells using built-in multi-threshold commands
US8000141B1 (en) * 2007-10-19 2011-08-16 Anobit Technologies Ltd. Compensation for voltage drifts in analog memory cells
WO2009050703A2 (en) 2007-10-19 2009-04-23 Anobit Technologies Data storage in analog memory cell arrays having erase failures
WO2009063450A2 (en) 2007-11-13 2009-05-22 Anobit Technologies Optimized selection of memory units in multi-unit memory devices
US8225181B2 (en) 2007-11-30 2012-07-17 Apple Inc. Efficient re-read operations from memory devices
US8209588B2 (en) 2007-12-12 2012-06-26 Anobit Technologies Ltd. Efficient interference cancellation in analog memory cell arrays
US8085586B2 (en) 2007-12-27 2011-12-27 Anobit Technologies Ltd. Wear level estimation in analog memory cells
WO2009090731A1 (ja) * 2008-01-16 2009-07-23 Fujitsu Limited 半導体記憶装置、制御装置、制御方法
US8159874B2 (en) * 2008-01-22 2012-04-17 Micron Technology, Inc. Cell operation monitoring
US8156398B2 (en) 2008-02-05 2012-04-10 Anobit Technologies Ltd. Parameter estimation based on error correction code parity check equations
US7924587B2 (en) 2008-02-21 2011-04-12 Anobit Technologies Ltd. Programming of analog memory cells using a single programming pulse per state transition
US8230300B2 (en) 2008-03-07 2012-07-24 Apple Inc. Efficient readout from analog memory cells using data compression
US8400858B2 (en) 2008-03-18 2013-03-19 Apple Inc. Memory device with reduced sense time readout
US8059457B2 (en) 2008-03-18 2011-11-15 Anobit Technologies Ltd. Memory device with multiple-accuracy read commands
KR101373751B1 (ko) * 2008-06-03 2014-03-13 삼성전자주식회사 칩 면적을 줄여 트리밍 작업의 확장성을 갖는 불휘발성메모리 장치
JP4505766B2 (ja) * 2008-06-30 2010-07-21 ルネサスエレクトロニクス株式会社 データ処理装置及びトリミングデータ読み出し方法
US7924613B1 (en) 2008-08-05 2011-04-12 Anobit Technologies Ltd. Data storage in analog memory cells with protection against programming interruption
US8498151B1 (en) 2008-08-05 2013-07-30 Apple Inc. Data storage in analog memory cells using modified pass voltages
US8169825B1 (en) 2008-09-02 2012-05-01 Anobit Technologies Ltd. Reliable data storage in analog memory cells subjected to long retention periods
US8949684B1 (en) 2008-09-02 2015-02-03 Apple Inc. Segmented data storage
US8482978B1 (en) 2008-09-14 2013-07-09 Apple Inc. Estimation of memory cell read thresholds by sampling inside programming level distribution intervals
US8000135B1 (en) 2008-09-14 2011-08-16 Anobit Technologies Ltd. Estimation of memory cell read thresholds by sampling inside programming level distribution intervals
US8239734B1 (en) 2008-10-15 2012-08-07 Apple Inc. Efficient data storage in storage device arrays
US8261159B1 (en) 2008-10-30 2012-09-04 Apple, Inc. Data scrambling schemes for memory devices
US8208304B2 (en) 2008-11-16 2012-06-26 Anobit Technologies Ltd. Storage at M bits/cell density in N bits/cell analog memory cell devices, M>N
US8397131B1 (en) 2008-12-31 2013-03-12 Apple Inc. Efficient readout schemes for analog memory cell devices
US8248831B2 (en) 2008-12-31 2012-08-21 Apple Inc. Rejuvenation of analog memory cells
US8924661B1 (en) 2009-01-18 2014-12-30 Apple Inc. Memory system including a controller and processors associated with memory devices
US8228701B2 (en) 2009-03-01 2012-07-24 Apple Inc. Selective activation of programming schemes in analog memory cell arrays
US8259506B1 (en) 2009-03-25 2012-09-04 Apple Inc. Database of memory read thresholds
US8832354B2 (en) 2009-03-25 2014-09-09 Apple Inc. Use of host system resources by memory controller
US8238157B1 (en) 2009-04-12 2012-08-07 Apple Inc. Selective re-programming of analog memory cells
US8479080B1 (en) 2009-07-12 2013-07-02 Apple Inc. Adaptive over-provisioning in memory systems
US8495465B1 (en) 2009-10-15 2013-07-23 Apple Inc. Error correction coding over multiple memory pages
US8677054B1 (en) 2009-12-16 2014-03-18 Apple Inc. Memory management schemes for non-volatile memory devices
US8694814B1 (en) 2010-01-10 2014-04-08 Apple Inc. Reuse of host hibernation storage space by memory controller
US8677203B1 (en) 2010-01-11 2014-03-18 Apple Inc. Redundant data storage schemes for multi-die memory systems
JP2011211767A (ja) * 2010-03-29 2011-10-20 Toshiba Corp 半導体集積回路装置
US8694853B1 (en) 2010-05-04 2014-04-08 Apple Inc. Read commands for reading interfering memory cells
US8572423B1 (en) 2010-06-22 2013-10-29 Apple Inc. Reducing peak current in memory systems
US8595591B1 (en) 2010-07-11 2013-11-26 Apple Inc. Interference-aware assignment of programming levels in analog memory cells
US9104580B1 (en) 2010-07-27 2015-08-11 Apple Inc. Cache memory for hybrid disk drives
US8767459B1 (en) 2010-07-31 2014-07-01 Apple Inc. Data storage in analog memory cells across word lines using a non-integer number of bits per cell
US8856475B1 (en) 2010-08-01 2014-10-07 Apple Inc. Efficient selection of memory blocks for compaction
US8694854B1 (en) 2010-08-17 2014-04-08 Apple Inc. Read threshold setting based on soft readout statistics
US9021181B1 (en) 2010-09-27 2015-04-28 Apple Inc. Memory management for unifying memory cell conditions by using maximum time intervals
TWI514391B (zh) * 2013-07-23 2015-12-21 Winbond Electronics Corp 半導體記憶裝置及其抹除方法
US9589645B2 (en) * 2014-10-06 2017-03-07 Sandisk Technologies Llc Block refresh to adapt to new die trim settings
US10146460B1 (en) 2017-06-01 2018-12-04 Apple Inc. Programming schemes for avoidance or recovery from cross-temperature read failures
TWI717749B (zh) * 2019-06-10 2021-02-01 慧榮科技股份有限公司 記憶體之資料清除方法及應用其之儲存裝置
JP2021174566A (ja) * 2020-04-27 2021-11-01 キオクシア株式会社 半導体記憶装置
US11556416B2 (en) 2021-05-05 2023-01-17 Apple Inc. Controlling memory readout reliability and throughput by adjusting distance between read thresholds
US11847342B2 (en) 2021-07-28 2023-12-19 Apple Inc. Efficient transfer of hard data and confidence levels in reading a nonvolatile memory

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JP2002133887A (ja) * 2000-10-31 2002-05-10 Matsushita Electric Ind Co Ltd 不揮発性半導体メモリ装置
JP2002208291A (ja) * 2001-01-15 2002-07-26 Matsushita Electric Ind Co Ltd 不揮発性記憶装置
JP2003178597A (ja) * 2001-12-11 2003-06-27 Matsushita Electric Ind Co Ltd 半導体記憶装置

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009146474A (ja) * 2007-12-12 2009-07-02 Toshiba Corp 不揮発性半導体記憶装置
JP2009266349A (ja) * 2008-04-28 2009-11-12 Toshiba Corp 不揮発性半導体記憶装置
US8310873B2 (en) 2008-04-28 2012-11-13 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device
JP2009301616A (ja) * 2008-06-11 2009-12-24 Toshiba Corp 不揮発性半導体記憶装置
JP2013073643A (ja) * 2011-09-27 2013-04-22 Toshiba Corp 不揮発性半導体記憶装置

Also Published As

Publication number Publication date
US20060221681A1 (en) 2006-10-05
CN1841559A (zh) 2006-10-04
CN100472655C (zh) 2009-03-25
US7280409B2 (en) 2007-10-09

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