JP2005159103A - 半導体装置およびその製造方法 - Google Patents

半導体装置およびその製造方法 Download PDF

Info

Publication number
JP2005159103A
JP2005159103A JP2003396996A JP2003396996A JP2005159103A JP 2005159103 A JP2005159103 A JP 2005159103A JP 2003396996 A JP2003396996 A JP 2003396996A JP 2003396996 A JP2003396996 A JP 2003396996A JP 2005159103 A JP2005159103 A JP 2005159103A
Authority
JP
Japan
Prior art keywords
back surface
sealing body
chip mounting
resin
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2003396996A
Other languages
English (en)
Japanese (ja)
Other versions
JP2005159103A5 (https=
Inventor
Tadatoshi Danno
忠敏 団野
Hiromi Taya
博美 田谷
Yoshiharu Shimizu
嘉治 清水
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Technology Corp
Original Assignee
Renesas Technology Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Technology Corp filed Critical Renesas Technology Corp
Priority to JP2003396996A priority Critical patent/JP2005159103A/ja
Priority to US10/983,706 priority patent/US7282396B2/en
Priority to KR20040097986A priority patent/KR101054540B1/ko
Publication of JP2005159103A publication Critical patent/JP2005159103A/ja
Publication of JP2005159103A5 publication Critical patent/JP2005159103A5/ja
Priority to US11/853,798 priority patent/US20080006916A1/en
Priority to US12/277,144 priority patent/US7691677B2/en
Priority to US12/624,309 priority patent/US8053875B2/en
Priority to US12/624,342 priority patent/US7833833B2/en
Priority to US13/101,199 priority patent/US8513785B2/en
Priority to KR1020110061982A priority patent/KR101054602B1/ko
Priority to KR1020110061983A priority patent/KR101267148B1/ko
Priority to KR1020110091315A priority patent/KR101131353B1/ko
Priority to KR1020120002527A priority patent/KR101267140B1/ko
Priority to US13/562,639 priority patent/US8592961B2/en
Priority to KR1020120085661A priority patent/KR101277391B1/ko
Priority to KR1020130001922A priority patent/KR101398311B1/ko
Priority to US14/070,676 priority patent/US9024419B2/en
Priority to US14/702,969 priority patent/US9425165B2/en
Priority to US15/236,143 priority patent/US9806035B2/en
Priority to US15/729,374 priority patent/US10249595B2/en
Priority to US16/290,804 priority patent/US10998288B2/en
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P54/00—Cutting or separating of wafers, substrates or parts of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0446—Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0448—Apparatus for applying a liquid, a resin, an ink or the like
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00—Arrangements for protection of devices
    • H10W42/121—Arrangements for protection of devices protecting against mechanical damage
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/04—Manufacture or treatment of leadframes
    • H10W70/041—Connecting or disconnecting interconnections to or from leadframes, e.g. connecting bond wires or bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/04—Manufacture or treatment of leadframes
    • H10W70/048—Mechanical treatments, e.g. punching, cutting, deforming or cold welding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/411—Chip-supporting parts, e.g. die pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/421—Shapes or dispositions
    • H10W70/424—Cross-sectional shapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/464—Additional interconnections in combination with leadframes
    • H10W70/465—Bumps or wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/464—Additional interconnections in combination with leadframes
    • H10W70/466—Tape carriers or flat leads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/016—Manufacture or treatment using moulds
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/129—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed forming a chip-scale package [CSP]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H10W46/601—Marks applied to devices, e.g. for alignment or identification for use after dicing
    • H10W46/607—Located on parts of packages, e.g. on encapsulations or on package substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H10W72/07351—Connecting or disconnecting of die-attach connectors characterised by changes in properties of the die-attach connectors during connecting
    • H10W72/07352—Connecting or disconnecting of die-attach connectors characterised by changes in properties of the die-attach connectors during connecting changes in structures or sizes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/321—Structures or relative sizes of die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/59—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H10W72/932—Plan-view shape, i.e. in top view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
JP2003396996A 2003-11-27 2003-11-27 半導体装置およびその製造方法 Pending JP2005159103A (ja)

Priority Applications (20)

Application Number Priority Date Filing Date Title
JP2003396996A JP2005159103A (ja) 2003-11-27 2003-11-27 半導体装置およびその製造方法
US10/983,706 US7282396B2 (en) 2003-11-27 2004-11-09 Method of manufacturing a semiconductor device including using a sealing resin to form a sealing body
KR20040097986A KR101054540B1 (ko) 2003-11-27 2004-11-26 반도체 장치 및 그 제조 방법
US11/853,798 US20080006916A1 (en) 2003-11-27 2007-09-11 Method of Manufacturing a Semiconductor Device
US12/277,144 US7691677B2 (en) 2003-11-27 2008-11-24 Method of manufacturing a semiconductor device
US12/624,309 US8053875B2 (en) 2003-11-27 2009-11-23 Method of manufacturing a semiconductor device
US12/624,342 US7833833B2 (en) 2003-11-27 2009-11-23 Method of manufacturing a semiconductor device
US13/101,199 US8513785B2 (en) 2003-11-27 2011-05-05 Method of manufacturing a semiconductor device
KR1020110061982A KR101054602B1 (ko) 2003-11-27 2011-06-24 반도체 장치의 제조 방법
KR1020110061983A KR101267148B1 (ko) 2003-11-27 2011-06-24 반도체 장치
KR1020110091315A KR101131353B1 (ko) 2003-11-27 2011-09-08 반도체 장치
KR1020120002527A KR101267140B1 (ko) 2003-11-27 2012-01-09 반도체 장치
US13/562,639 US8592961B2 (en) 2003-11-27 2012-07-31 Method of manufacturing a semiconductor device
KR1020120085661A KR101277391B1 (ko) 2003-11-27 2012-08-06 반도체 장치
KR1020130001922A KR101398311B1 (ko) 2003-11-27 2013-01-08 반도체 장치
US14/070,676 US9024419B2 (en) 2003-11-27 2013-11-04 Method of manufacturing semiconductor device
US14/702,969 US9425165B2 (en) 2003-11-27 2015-05-04 Method of manufacturing semiconductor device
US15/236,143 US9806035B2 (en) 2003-11-27 2016-08-12 Semiconductor device
US15/729,374 US10249595B2 (en) 2003-11-27 2017-10-10 Method of manufacturing a semiconductor device
US16/290,804 US10998288B2 (en) 2003-11-27 2019-03-01 Method of manufacturing a semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003396996A JP2005159103A (ja) 2003-11-27 2003-11-27 半導体装置およびその製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2009096178A Division JP4566266B2 (ja) 2009-04-10 2009-04-10 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JP2005159103A true JP2005159103A (ja) 2005-06-16
JP2005159103A5 JP2005159103A5 (https=) 2007-01-11

Family

ID=34616512

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003396996A Pending JP2005159103A (ja) 2003-11-27 2003-11-27 半導体装置およびその製造方法

Country Status (3)

Country Link
US (12) US7282396B2 (https=)
JP (1) JP2005159103A (https=)
KR (7) KR101054540B1 (https=)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013168669A (ja) * 2013-04-18 2013-08-29 Agere Systems Inc 改良型パドルを有するクワッド・フラット・ノーリード（ｑｆｎ）集積回路（ｉｃ）パッケージおよびこのパッケージを設計する方法
JP2014022399A (ja) * 2012-07-12 2014-02-03 Mitsui High Tec Inc リードフレームおよびリードフレームの製造方法
JP2018157222A (ja) * 2013-04-16 2018-10-04 ローム株式会社 半導体装置
US10312171B2 (en) 2013-04-16 2019-06-04 Rohm Co., Ltd. Semiconductor device

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005159103A (ja) 2003-11-27 2005-06-16 Renesas Technology Corp 半導体装置およびその製造方法
US7772974B2 (en) * 2005-02-28 2010-08-10 Cypak Ab Tamper evident seal system and method
US7304395B2 (en) * 2005-07-05 2007-12-04 Oki Electric Industry Co., Ltd. Semiconductor chip package
WO2007089209A1 (en) * 2006-02-01 2007-08-09 Infineon Technologies Ag Fabrication of a qfn integrated circuit package
JP5353153B2 (ja) * 2007-11-09 2013-11-27 パナソニック株式会社 実装構造体
US7960818B1 (en) * 2009-03-04 2011-06-14 Amkor Technology, Inc. Conformal shield on punch QFN semiconductor package
CN102074517B (zh) * 2010-12-03 2013-01-02 日月光封装测试(上海)有限公司 球栅阵列封装构造
JP5940257B2 (ja) * 2011-08-01 2016-06-29 株式会社三井ハイテック リードフレーム及びリードフレームの製造方法並びにこれを用いた半導体装置
JP2013069741A (ja) * 2011-09-21 2013-04-18 Renesas Electronics Corp リードフレーム、半導体装置、リードフレームの製造方法及び半導体装置の製造方法
JP5947107B2 (ja) * 2012-05-23 2016-07-06 ルネサスエレクトロニクス株式会社 半導体装置
US9741642B1 (en) * 2014-05-07 2017-08-22 UTAC Headquarters Pte. Ltd. Semiconductor package with partial plating on contact side surfaces
CN104157583B (zh) * 2014-08-28 2017-01-25 山东华芯半导体有限公司 一种芯片封装方法及模具
WO2016117072A1 (ja) * 2015-01-22 2016-07-28 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
CN104766843B (zh) * 2015-04-24 2017-10-10 南京晟芯半导体有限公司 一种可用smt工艺贴装的高功率半导体封装结构
JP2017147272A (ja) * 2016-02-15 2017-08-24 ローム株式会社 半導体装置およびその製造方法、ならびに、半導体装置の製造に使用されるリードフレーム中間体
WO2017168537A1 (ja) * 2016-03-29 2017-10-05 三菱電機株式会社 樹脂封止型電力半導体装置の製造方法
CN109300835B (zh) * 2017-07-25 2021-04-09 北京北方华创微电子装备有限公司 一种晶片支撑结构、预热腔室和半导体处理设备
US10535812B2 (en) * 2017-09-04 2020-01-14 Rohm Co., Ltd. Semiconductor device

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10242366A (ja) * 1997-02-24 1998-09-11 Ricoh Co Ltd 半導体装置
JP2000036556A (ja) * 1998-07-17 2000-02-02 Matsushita Electronics Industry Corp 半導体装置の製造方法とその半導体装置
JP2000307049A (ja) * 1999-04-23 2000-11-02 Matsushita Electronics Industry Corp リードフレームとそれを用いた樹脂封止型半導体装置およびその製造方法
JP2002261187A (ja) * 2000-12-28 2002-09-13 Hitachi Ltd 半導体装置
JP2003197846A (ja) * 2001-12-27 2003-07-11 Mitsui High Tec Inc リードフレームおよびこれを用いた半導体装置
JP2003332511A (ja) * 2002-05-09 2003-11-21 Mitsui High Tec Inc リードフレームおよび半導体装置

Family Cites Families (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2002A (en) * 1841-03-12 Tor and planter for plowing
JPS61139052A (ja) 1984-12-11 1986-06-26 Matsushita Electric Ind Co Ltd 半導体集積回路部品
JPS61220361A (ja) 1985-03-26 1986-09-30 Matsushita Electric Ind Co Ltd 電子部品の捺印及びフレ−ム切断機
US5274914A (en) * 1986-11-25 1994-01-04 Hitachi, Ltd. Method of producing surface package type semiconductor package
JPH06232195A (ja) 1993-01-28 1994-08-19 Rohm Co Ltd 半導体装置の製造方法およびリードフレーム
JPH07235630A (ja) 1994-02-25 1995-09-05 Matsushita Electron Corp リードフレーム
JP3155933B2 (ja) * 1996-03-29 2001-04-16 キヤノン株式会社 電子写真用光透過性被記録材及び加熱定着方法
JP3012816B2 (ja) 1996-10-22 2000-02-28 松下電子工業株式会社 樹脂封止型半導体装置およびその製造方法
JP2915892B2 (ja) 1997-06-27 1999-07-05 松下電子工業株式会社 樹脂封止型半導体装置およびその製造方法
JP2951308B1 (ja) 1998-03-13 1999-09-20 松下電子工業株式会社 リードフレームの製造方法
JP2000091488A (ja) 1998-09-08 2000-03-31 Dainippon Printing Co Ltd 樹脂封止型半導体装置とそれに用いられる回路部材
MY133357A (en) 1999-06-30 2007-11-30 Hitachi Ltd A semiconductor device and a method of manufacturing the same
KR20010037247A (ko) * 1999-10-15 2001-05-07 마이클 디. 오브라이언 반도체패키지
JP2001127090A (ja) 1999-10-25 2001-05-11 Matsushita Electronics Industry Corp 樹脂封止型半導体装置の製造方法
JP2001156239A (ja) * 1999-11-25 2001-06-08 Matsushita Electronics Industry Corp 半導体装置及び半導体装置の製造方法
JP2002091488A (ja) 2000-01-31 2002-03-27 Matsushita Electric Ind Co Ltd 車載ナビゲーション装置
JP3547704B2 (ja) 2000-06-22 2004-07-28 株式会社三井ハイテック リードフレーム及び半導体装置
JP2002026190A (ja) 2000-07-03 2002-01-25 Dainippon Printing Co Ltd 樹脂封止型半導体装置
JP4387566B2 (ja) 2000-07-05 2009-12-16 パナソニック株式会社 樹脂封止型半導体装置
JP3660861B2 (ja) * 2000-08-18 2005-06-15 株式会社ルネサステクノロジ 半導体装置の製造方法
JP4523138B2 (ja) 2000-10-06 2010-08-11 ローム株式会社 半導体装置およびそれに用いるリードフレーム
KR20020048572A (ko) * 2000-12-18 2002-06-24 정헌태 반도체 마킹 장비의 스트립 플리퍼 장치
US6700186B2 (en) * 2000-12-21 2004-03-02 Mitsui High-Tec, Inc. Lead frame for a semiconductor device, a semiconductor device made from the lead frame, and a method of making a semiconductor device
JP4547086B2 (ja) 2000-12-25 2010-09-22 ルネサスエレクトロニクス株式会社 半導体装置
US6828661B2 (en) * 2001-06-27 2004-12-07 Matsushita Electric Industrial Co., Ltd. Lead frame and a resin-sealed semiconductor device exhibiting improved resin balance, and a method for manufacturing the same
JP2003031753A (ja) 2001-07-19 2003-01-31 Sony Corp 半導体装置及びその製造方法
US6710432B1 (en) * 2001-11-02 2004-03-23 National Semiconductor Corporation Integrated circuit package with low inductance ground path and improved thermal capability
JP3773855B2 (ja) 2001-11-12 2006-05-10 三洋電機株式会社 リードフレーム
JP2003158234A (ja) 2001-11-21 2003-05-30 Hitachi Ltd 半導体装置及びその製造方法
US6894376B1 (en) * 2003-06-09 2005-05-17 National Semiconductor Corporation Leadless microelectronic package and a method to maximize the die size in the package
JP2005159103A (ja) * 2003-11-27 2005-06-16 Renesas Technology Corp 半導体装置およびその製造方法
US7351611B2 (en) * 2004-02-20 2008-04-01 Carsem (M) Sdn Bhd Method of making the mould for encapsulating a leadframe package

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10242366A (ja) * 1997-02-24 1998-09-11 Ricoh Co Ltd 半導体装置
JP2000036556A (ja) * 1998-07-17 2000-02-02 Matsushita Electronics Industry Corp 半導体装置の製造方法とその半導体装置
JP2000307049A (ja) * 1999-04-23 2000-11-02 Matsushita Electronics Industry Corp リードフレームとそれを用いた樹脂封止型半導体装置およびその製造方法
JP2002261187A (ja) * 2000-12-28 2002-09-13 Hitachi Ltd 半導体装置
JP2003197846A (ja) * 2001-12-27 2003-07-11 Mitsui High Tec Inc リードフレームおよびこれを用いた半導体装置
JP2003332511A (ja) * 2002-05-09 2003-11-21 Mitsui High Tec Inc リードフレームおよび半導体装置

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014022399A (ja) * 2012-07-12 2014-02-03 Mitsui High Tec Inc リードフレームおよびリードフレームの製造方法
JP2018157222A (ja) * 2013-04-16 2018-10-04 ローム株式会社 半導体装置
US10312171B2 (en) 2013-04-16 2019-06-04 Rohm Co., Ltd. Semiconductor device
JP2013168669A (ja) * 2013-04-18 2013-08-29 Agere Systems Inc 改良型パドルを有するクワッド・フラット・ノーリード（ｑｆｎ）集積回路（ｉｃ）パッケージおよびこのパッケージを設計する方法

Also Published As

Publication number Publication date
KR101277391B1 (ko) 2013-06-20
KR20120008086A (ko) 2012-01-25
KR20130018968A (ko) 2013-02-25
KR101054602B1 (ko) 2011-08-05
US20190198477A1 (en) 2019-06-27
US20110204502A1 (en) 2011-08-25
US8513785B2 (en) 2013-08-20
US20140054759A1 (en) 2014-02-27
US20160351512A1 (en) 2016-12-01
KR20110105754A (ko) 2011-09-27
KR101267140B1 (ko) 2013-05-24
KR101398311B1 (ko) 2014-05-27
US7833833B2 (en) 2010-11-16
KR20120101314A (ko) 2012-09-13
KR101267148B1 (ko) 2013-05-27
KR101131353B1 (ko) 2012-04-04
US10998288B2 (en) 2021-05-04
US20100068852A1 (en) 2010-03-18
US20180047677A1 (en) 2018-02-15
US20150235987A1 (en) 2015-08-20
US9806035B2 (en) 2017-10-31
US7282396B2 (en) 2007-10-16
US9425165B2 (en) 2016-08-23
US8592961B2 (en) 2013-11-26
US8053875B2 (en) 2011-11-08
US20100065951A1 (en) 2010-03-18
US7691677B2 (en) 2010-04-06
KR20110079799A (ko) 2011-07-08
US10249595B2 (en) 2019-04-02
KR101054540B1 (ko) 2011-08-04
KR20050051572A (ko) 2005-06-01
KR20110079800A (ko) 2011-07-08
US20130020691A1 (en) 2013-01-24
US20080006916A1 (en) 2008-01-10
US20050116327A1 (en) 2005-06-02
US20090075427A1 (en) 2009-03-19
US9024419B2 (en) 2015-05-05

Similar Documents

Publication Publication Date Title
KR101267148B1 (ko) 반도체 장치
JP4566266B2 (ja) 半導体装置の製造方法
JP5184558B2 (ja) 半導体装置
JP5512784B2 (ja) 半導体装置の製造方法
JP4535513B2 (ja) 半導体装置
JP2014112714A (ja) 半導体装置
JP2009231322A (ja) 半導体装置の製造方法
JPH08279575A (ja) 半導体パッケージ
JP2009176987A (ja) 半導体装置およびその製造方法

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20061116

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20061116

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20090202

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20090210

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20090609