JP2005064527A - 半導体メモリ装置 - Google Patents
半導体メモリ装置 Download PDFInfo
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- JP2005064527A JP2005064527A JP2004292094A JP2004292094A JP2005064527A JP 2005064527 A JP2005064527 A JP 2005064527A JP 2004292094 A JP2004292094 A JP 2004292094A JP 2004292094 A JP2004292094 A JP 2004292094A JP 2005064527 A JP2005064527 A JP 2005064527A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 40
- 230000015654 memory Effects 0.000 claims abstract description 139
- 230000002093 peripheral effect Effects 0.000 claims description 25
- 239000002131 composite material Substances 0.000 claims description 21
- 238000012360 testing method Methods 0.000 claims description 4
- 238000007789 sealing Methods 0.000 claims description 3
- 238000003860 storage Methods 0.000 abstract description 13
- 230000006870 function Effects 0.000 abstract description 4
- 239000010410 layer Substances 0.000 description 134
- 239000000758 substrate Substances 0.000 description 44
- 235000012431 wafers Nutrition 0.000 description 43
- 238000000034 method Methods 0.000 description 40
- 238000004519 manufacturing process Methods 0.000 description 35
- 239000003990 capacitor Substances 0.000 description 31
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 28
- 229910052710 silicon Inorganic materials 0.000 description 28
- 239000010703 silicon Substances 0.000 description 28
- 230000003647 oxidation Effects 0.000 description 20
- 238000007254 oxidation reaction Methods 0.000 description 20
- 230000000873 masking effect Effects 0.000 description 19
- 230000008569 process Effects 0.000 description 18
- 230000010354 integration Effects 0.000 description 17
- 238000006243 chemical reaction Methods 0.000 description 16
- 150000004767 nitrides Chemical class 0.000 description 15
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 15
- 229920005591 polysilicon Polymers 0.000 description 15
- 238000000137 annealing Methods 0.000 description 14
- 125000006850 spacer group Chemical group 0.000 description 14
- 238000010586 diagram Methods 0.000 description 13
- 241000293849 Cordylanthus Species 0.000 description 12
- 229910021417 amorphous silicon Inorganic materials 0.000 description 11
- 238000003491 array Methods 0.000 description 11
- 238000005530 etching Methods 0.000 description 11
- 230000015572 biosynthetic process Effects 0.000 description 9
- 238000002955 isolation Methods 0.000 description 9
- 238000010899 nucleation Methods 0.000 description 8
- 239000000463 material Substances 0.000 description 7
- 230000003628 erosive effect Effects 0.000 description 6
- 239000004020 conductor Substances 0.000 description 5
- 238000000151 deposition Methods 0.000 description 5
- 230000008021 deposition Effects 0.000 description 5
- 238000009792 diffusion process Methods 0.000 description 5
- 229910004298 SiO 2 Inorganic materials 0.000 description 3
- 239000005380 borophosphosilicate glass Substances 0.000 description 3
- 230000008878 coupling Effects 0.000 description 3
- 238000010168 coupling process Methods 0.000 description 3
- 238000005859 coupling reaction Methods 0.000 description 3
- 238000013461 design Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 230000001590 oxidative effect Effects 0.000 description 3
- 239000011856 silicon-based particle Substances 0.000 description 3
- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Chemical compound P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- PZPGRFITIJYNEJ-UHFFFAOYSA-N disilane Chemical compound [SiH3][SiH3] PZPGRFITIJYNEJ-UHFFFAOYSA-N 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 239000011261 inert gas Substances 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 230000009467 reduction Effects 0.000 description 2
- 238000007788 roughening Methods 0.000 description 2
- 239000002210 silicon-based material Substances 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- 229910052719 titanium Inorganic materials 0.000 description 2
- 229910000838 Al alloy Inorganic materials 0.000 description 1
- 240000001307 Myosotis scorpioides Species 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 238000009825 accumulation Methods 0.000 description 1
- 239000012790 adhesive layer Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 239000006117 anti-reflective coating Substances 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 239000012159 carrier gas Substances 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 210000005069 ears Anatomy 0.000 description 1
- 238000009429 electrical wiring Methods 0.000 description 1
- 230000008030 elimination Effects 0.000 description 1
- 238000003379 elimination reaction Methods 0.000 description 1
- 239000012467 final product Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000007943 implant Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 229910000073 phosphorus hydride Inorganic materials 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 229910021426 porous silicon Inorganic materials 0.000 description 1
- 230000002250 progressing effect Effects 0.000 description 1
- 238000012827 research and development Methods 0.000 description 1
- 239000000523 sample Substances 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-NJFSPNSNSA-N silicon-30 atom Chemical compound [30Si] XUIMIQQOPSSXEZ-NJFSPNSNSA-N 0.000 description 1
- 230000003746 surface roughness Effects 0.000 description 1
- 238000012876 topography Methods 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
- H01L27/105—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/48—Data lines or contacts therefor
- H10B12/485—Bit line contacts
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
- H10B12/312—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor with a bit line higher than the capacitor
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- Power Engineering (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Semiconductor Memories (AREA)
- Dram (AREA)
- Local Oxidation Of Silicon (AREA)
- Element Separation (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Non-Volatile Memory (AREA)
Abstract
【解決手段】4MのDRAM半導体メモリ装置は、イ)半導体ダイ上に形成された多重メモリアレイに配置された総数が4,000,000個から4,500,000個までの機能し且つアドレス指定可能に動作するメモリセルと、ロ)データを一つ又はそれ以上のメモリセルに書き込み、及び一つ又はそれ以上のメモリセルから読み出すことを可能にする、半導体ダイ上に形成された回路とを含む。ダイ上に形成されたすべての機能し且つ動作上アドレス指定可能なメモリセルが占める領域が結合した総領域は、3.3mm2より大きくない。
【選択図】図35
Description
Claims (5)
- 4M半導体メモリ装置であって、該装置は、
封止体と該封止体から外方に延びる導電性接続ピンとを有するパッケージに封止された半導体ダイと、
個々の機能し且つ動作上アドレス指定可能なメモリセルがメモリアレイ内のダイの上の領域を占め、ダイの上で全ての機能し且つ動作上アドレス指定可能なメモリセルが占める領域が結合した総領域において3.3mm2より大きくない領域となるような、ダイに形成された多重メモリアレイに配置された4,000,000個から4,500,000個までの機能し且つ動作上アドレス指定可能なメモリセルと、
メモリアレイに関連してダイの上に形成された周辺回路及びピッチ回路であって、該周辺回路が、ピンに電気的に相互接続されており、作動的に相互接続された制御及びタイミング回路、アドレス及び冗長回路、データ及びテスト経路回路、及び電圧供給回路を含み、それらが協働してメモリアレイの全てのアドレス指定可能なメモリに全アクセスを可能とするようになっている、周辺回路及びピッチ回路と、
からなる4M半導体メモリ装置。 - 請求項1に記載の半導体メモリ装置であって、前記周辺回路、ピッチ回路及びメモリアレイが全体で4個以下のコンポジット導電性線層を含むように製造されている、半導体メモリ装置。
- 請求項11に記載の半導体メモリ装置であって、前記周辺回路、ピッチ回路及びメモリアレイがダイの上に11.0mm2と同一又はそれ以下の、結合した連続の総表面領域を有する、半導体メモリ装置。
- 請求項1に記載の半導体メモリ装置であって、前記周辺回路、ピッチ回路及びメモリアレイが少なくとも5個のコンポジット導電性線層を含むように製造されており、ダイの上で全ての機能し且つ動作上アドレス指定可能なメモリセルが占める領域が結合した総領域において2.5mm2より大きくない領域となるような、半導体メモリ装置。
- 請求項1に記載の半導体メモリ装置であって、前記周辺回路、ピッチ回路及びメモリアレイが少なくとも5個のコンポジット導電性線層を含むように製造されており、前記周辺回路、ピッチ回路及びメモリアレイがダイの上に10.2mm2と同一又はそれ以下の、結合した連続の総表面領域を有する、半導体メモリ装置。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/530,661 US7705383B2 (en) | 1995-09-20 | 1995-09-20 | Integrated circuitry for semiconductor memory |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9512668A Division JPH11512570A (ja) | 1995-09-20 | 1996-01-25 | 半導体メモリ回路 |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2005064527A true JP2005064527A (ja) | 2005-03-10 |
Family
ID=24114474
Family Applications (4)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9512668A Ceased JPH11512570A (ja) | 1995-09-20 | 1996-01-25 | 半導体メモリ回路 |
JP2004292094A Pending JP2005064527A (ja) | 1995-09-20 | 2004-10-05 | 半導体メモリ装置 |
JP2004292093A Pending JP2005026719A (ja) | 1995-09-20 | 2004-10-05 | 半導体メモリ装置 |
JP2004292092A Pending JP2005026718A (ja) | 1995-09-20 | 2004-10-05 | 半導体メモリ装置 |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9512668A Ceased JPH11512570A (ja) | 1995-09-20 | 1996-01-25 | 半導体メモリ回路 |
Family Applications After (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2004292093A Pending JP2005026719A (ja) | 1995-09-20 | 2004-10-05 | 半導体メモリ装置 |
JP2004292092A Pending JP2005026718A (ja) | 1995-09-20 | 2004-10-05 | 半導体メモリ装置 |
Country Status (7)
Country | Link |
---|---|
US (3) | US7705383B2 (ja) |
EP (2) | EP1304736B1 (ja) |
JP (4) | JPH11512570A (ja) |
KR (1) | KR100440770B1 (ja) |
AT (1) | ATE460747T1 (ja) |
DE (1) | DE69638147D1 (ja) |
WO (1) | WO1997011493A1 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2012530384A (ja) * | 2009-12-23 | 2012-11-29 | インテル・コーポレーション | 凹型電極を有するキャパシタを備えるメモリデバイスを形成する方法 |
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US5770500A (en) | 1996-11-15 | 1998-06-23 | Micron Technology, Inc. | Process for improving roughness of conductive layer |
JP3116865B2 (ja) | 1997-07-10 | 2000-12-11 | 双葉電子工業株式会社 | 蛍光表示管 |
-
1995
- 1995-09-20 US US08/530,661 patent/US7705383B2/en not_active Expired - Fee Related
-
1996
- 1996-01-25 DE DE69638147T patent/DE69638147D1/de not_active Expired - Lifetime
- 1996-01-25 KR KR10-1998-0701873A patent/KR100440770B1/ko not_active IP Right Cessation
- 1996-01-25 AT AT96905258T patent/ATE460747T1/de not_active IP Right Cessation
- 1996-01-25 JP JP9512668A patent/JPH11512570A/ja not_active Ceased
- 1996-01-25 EP EP03001319.7A patent/EP1304736B1/en not_active Expired - Lifetime
- 1996-01-25 EP EP96905258A patent/EP0852812B1/en not_active Expired - Lifetime
- 1996-01-25 WO PCT/US1996/001164 patent/WO1997011493A1/en not_active Application Discontinuation
-
2004
- 2004-10-05 JP JP2004292094A patent/JP2005064527A/ja active Pending
- 2004-10-05 JP JP2004292093A patent/JP2005026719A/ja active Pending
- 2004-10-05 JP JP2004292092A patent/JP2005026718A/ja active Pending
-
2010
- 2010-02-26 US US12/713,673 patent/US8049260B2/en not_active Expired - Fee Related
-
2011
- 2011-10-31 US US13/285,182 patent/US8299514B2/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2012530384A (ja) * | 2009-12-23 | 2012-11-29 | インテル・コーポレーション | 凹型電極を有するキャパシタを備えるメモリデバイスを形成する方法 |
Also Published As
Publication number | Publication date |
---|---|
EP0852812A4 (en) | 2000-06-21 |
EP1304736A1 (en) | 2003-04-23 |
JPH11512570A (ja) | 1999-10-26 |
US7705383B2 (en) | 2010-04-27 |
EP1304736B1 (en) | 2014-03-05 |
ATE460747T1 (de) | 2010-03-15 |
EP0852812B1 (en) | 2010-03-10 |
DE69638147D1 (de) | 2010-04-22 |
EP0852812A1 (en) | 1998-07-15 |
KR19990044621A (ko) | 1999-06-25 |
KR100440770B1 (ko) | 2004-12-13 |
JP2005026719A (ja) | 2005-01-27 |
US8299514B2 (en) | 2012-10-30 |
US20120044752A1 (en) | 2012-02-23 |
JP2005026718A (ja) | 2005-01-27 |
US20100149855A1 (en) | 2010-06-17 |
WO1997011493A1 (en) | 1997-03-27 |
US8049260B2 (en) | 2011-11-01 |
US20040070018A1 (en) | 2004-04-15 |
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