JP2004014875A - 半導体装置及びその製造方法 - Google Patents

半導体装置及びその製造方法 Download PDF

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Publication number
JP2004014875A
JP2004014875A JP2002167637A JP2002167637A JP2004014875A JP 2004014875 A JP2004014875 A JP 2004014875A JP 2002167637 A JP2002167637 A JP 2002167637A JP 2002167637 A JP2002167637 A JP 2002167637A JP 2004014875 A JP2004014875 A JP 2004014875A
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JP
Japan
Prior art keywords
gate electrode
semiconductor substrate
conductivity type
forming
insulating film
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002167637A
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English (en)
Japanese (ja)
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JP2004014875A5 (enExample
Inventor
Takashi Saiki
齋木　孝志
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Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
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First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=29706771&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=JP2004014875(A) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP2002167637A priority Critical patent/JP2004014875A/ja
Priority to US10/352,928 priority patent/US7098110B2/en
Publication of JP2004014875A publication Critical patent/JP2004014875A/ja
Publication of JP2004014875A5 publication Critical patent/JP2004014875A5/ja
Priority to US11/486,112 priority patent/US7633124B2/en
Priority to US11/486,294 priority patent/US7405130B2/en
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
    • H01L21/2652—Through-implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28247—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon passivation or protection of the electrode, e.g. using re-oxidation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/021—Manufacture or treatment using multiple gate spacer layers, e.g. bilayered sidewall spacers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311—Gate electrodes for field-effect devices
    • H10D64/411—Gate electrodes for field-effect devices for FETs
    • H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/517—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers
    • H10D64/518—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers characterised by their lengths or sectional shapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/017—Manufacturing their source or drain regions, e.g. silicided source or drain regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0172—Manufacturing their gate conductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0181—Manufacturing their gate insulating layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0184—Manufacturing their gate sidewall spacers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Power Engineering (AREA)
  • Toxicology (AREA)
  • Health & Medical Sciences (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
JP2002167637A 2002-06-07 2002-06-07 半導体装置及びその製造方法 Pending JP2004014875A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2002167637A JP2004014875A (ja) 2002-06-07 2002-06-07 半導体装置及びその製造方法
US10/352,928 US7098110B2 (en) 2002-06-07 2003-01-29 Semiconductor device and method of manufacturing thereof
US11/486,112 US7633124B2 (en) 2002-06-07 2006-07-14 Semiconductor device and method of manufacturing thereof
US11/486,294 US7405130B2 (en) 2002-06-07 2006-07-14 Method of manufacturing a semiconductor device with a notched gate electrode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002167637A JP2004014875A (ja) 2002-06-07 2002-06-07 半導体装置及びその製造方法

Publications (2)

Publication Number Publication Date
JP2004014875A true JP2004014875A (ja) 2004-01-15
JP2004014875A5 JP2004014875A5 (enExample) 2005-10-13

Family

ID=29706771

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002167637A Pending JP2004014875A (ja) 2002-06-07 2002-06-07 半導体装置及びその製造方法

Country Status (2)

Country Link
US (3) US7098110B2 (enExample)
JP (1) JP2004014875A (enExample)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008117848A (ja) * 2006-11-01 2008-05-22 Nec Electronics Corp 半導体装置の製造方法
JP2008288560A (ja) * 2007-04-18 2008-11-27 Sony Corp 半導体装置及びその製造方法
JP2009277816A (ja) * 2008-05-14 2009-11-26 Nec Corp 半導体装置及びその製造方法
US8350335B2 (en) 2007-04-18 2013-01-08 Sony Corporation Semiconductor device including off-set spacers formed as a portion of the sidewall
JP2021121036A (ja) * 2017-03-30 2021-08-19 ルネサスエレクトロニクス株式会社 半導体装置の製造方法

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050176191A1 (en) * 2003-02-04 2005-08-11 Applied Materials, Inc. Method for fabricating a notched gate structure of a field effect transistor
US7033897B2 (en) * 2003-10-23 2006-04-25 Texas Instruments Incorporated Encapsulated spacer with low dielectric constant material to reduce the parasitic capacitance between gate and drain in CMOS technology
US7022596B2 (en) * 2003-12-30 2006-04-04 Advanced Micro Devices, Inc. Method for forming rectangular-shaped spacers for semiconductor devices
KR100632654B1 (ko) * 2004-12-28 2006-10-12 주식회사 하이닉스반도체 플래시 메모리 소자의 제조 방법
JP4509864B2 (ja) * 2005-05-30 2010-07-21 東京エレクトロン株式会社 プラズマ処理方法およびプラズマ処理装置
US7790561B2 (en) * 2005-07-01 2010-09-07 Texas Instruments Incorporated Gate sidewall spacer and method of manufacture therefor
KR100698079B1 (ko) * 2005-12-28 2007-03-23 동부일렉트로닉스 주식회사 반도체소자 및 그의 제조방법
US20070196970A1 (en) * 2006-02-21 2007-08-23 Texas Instruments Inc. Method for manufacturing a semiconductor device using a nitrogen containing oxide layer
KR100837555B1 (ko) * 2006-11-24 2008-06-12 동부일렉트로닉스 주식회사 반도체 소자 및 그 제조 방법
US7723785B2 (en) * 2007-07-31 2010-05-25 Taiwan Semiconductor Manufacturing Company, Ltd. High performance power MOS structure
JP2009182089A (ja) * 2008-01-30 2009-08-13 Panasonic Corp 半導体装置の製造方法
US8693987B2 (en) * 2008-12-31 2014-04-08 Airvana Lp Femto personal policy server
US10446662B2 (en) * 2016-10-07 2019-10-15 Taiwan Semiconductor Manufacturing Co., Ltd. Reducing metal gate overhang by forming a top-wide bottom-narrow dummy gate electrode
CN113314417B (zh) * 2020-02-26 2023-05-05 中芯国际集成电路制造(上海)有限公司 半导体器件及其形成方法

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US4744859A (en) * 1986-10-23 1988-05-17 Vitelic Corporation Process for fabricating lightly doped drain MOS devices
KR940007666B1 (ko) * 1990-12-26 1994-08-22 재단법인 한국전자통신연구소 이중층의 내열성 게이트를 사용한 자기정렬형 GaAs 전계효과 트랜지스터의 제조방법
US6051471A (en) * 1996-09-03 2000-04-18 Advanced Micro Devices, Inc. Method for making asymmetrical N-channel and symmetrical P-channel devices
JP3495869B2 (ja) * 1997-01-07 2004-02-09 株式会社東芝 半導体装置の製造方法
JPH10233504A (ja) 1997-02-20 1998-09-02 Hitachi Ltd 半導体装置およびその製造方法
JPH10242420A (ja) * 1997-02-27 1998-09-11 Toshiba Corp 半導体装置およびその製造方法
US5933721A (en) * 1997-04-21 1999-08-03 Advanced Micro Devices, Inc. Method for fabricating differential threshold voltage transistor pair
JPH1117166A (ja) * 1997-06-23 1999-01-22 Nec Corp 半導体装置の製造方法
US6144071A (en) * 1998-09-03 2000-11-07 Advanced Micro Devices, Inc. Ultrathin silicon nitride containing sidewall spacers for improved transistor performance
JP2000114257A (ja) 1998-10-06 2000-04-21 Toshiba Corp 半導体装置の製造方法
JP2000150873A (ja) * 1998-11-12 2000-05-30 Mitsubishi Electric Corp 半導体装置およびその製造方法
US6245616B1 (en) * 1999-01-06 2001-06-12 International Business Machines Corporation Method of forming oxynitride gate dielectric
US6294797B1 (en) * 1999-04-30 2001-09-25 Texas Instruments - Acer Incorporated MOSFET with an elevated source/drain
JP4582837B2 (ja) 1999-09-09 2010-11-17 シャープ株式会社 半導体装置の製造方法
JP2001168323A (ja) * 1999-12-06 2001-06-22 Mitsubishi Electric Corp 半導体装置の製造方法
US6420250B1 (en) * 2000-03-03 2002-07-16 Micron Technology, Inc. Methods of forming portions of transistor structures, methods of forming array peripheral circuitry, and structures comprising transistor gates
JP2001267562A (ja) 2000-03-15 2001-09-28 Hitachi Ltd 半導体装置及びその製造方法
JP2002016237A (ja) * 2000-06-27 2002-01-18 Hitachi Ltd 半導体集積回路装置およびその製造方法
JP2002026310A (ja) * 2000-06-30 2002-01-25 Toshiba Corp 半導体装置及びその製造方法
JP2002043567A (ja) * 2000-07-27 2002-02-08 Mitsubishi Electric Corp 半導体装置およびその製造方法
US6551941B2 (en) * 2001-02-22 2003-04-22 Applied Materials, Inc. Method of forming a notched silicon-containing gate structure
KR100414220B1 (ko) * 2001-06-22 2004-01-07 삼성전자주식회사 공유 콘택을 가지는 반도체 장치 및 그 제조 방법
US6555865B2 (en) * 2001-07-10 2003-04-29 Samsung Electronics Co. Ltd. Nonvolatile semiconductor memory device with a multi-layer sidewall spacer structure and method for manufacturing the same
US6596599B1 (en) * 2001-07-16 2003-07-22 Taiwan Semiconductor Manufacturing Company Gate stack for high performance sub-micron CMOS devices

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008117848A (ja) * 2006-11-01 2008-05-22 Nec Electronics Corp 半導体装置の製造方法
JP2008288560A (ja) * 2007-04-18 2008-11-27 Sony Corp 半導体装置及びその製造方法
US8350335B2 (en) 2007-04-18 2013-01-08 Sony Corporation Semiconductor device including off-set spacers formed as a portion of the sidewall
JP2009277816A (ja) * 2008-05-14 2009-11-26 Nec Corp 半導体装置及びその製造方法
JP2021121036A (ja) * 2017-03-30 2021-08-19 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP7165236B2 (ja) 2017-03-30 2022-11-02 ルネサスエレクトロニクス株式会社 半導体装置の製造方法

Also Published As

Publication number Publication date
US20060261420A1 (en) 2006-11-23
US7405130B2 (en) 2008-07-29
US20060252200A1 (en) 2006-11-09
US7098110B2 (en) 2006-08-29
US7633124B2 (en) 2009-12-15
US20030227054A1 (en) 2003-12-11

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