JP2003515931A - ハロ打込みを用いた半導体素子の製造方法 - Google Patents

ハロ打込みを用いた半導体素子の製造方法

Info

Publication number
JP2003515931A
JP2003515931A JP2001540842A JP2001540842A JP2003515931A JP 2003515931 A JP2003515931 A JP 2003515931A JP 2001540842 A JP2001540842 A JP 2001540842A JP 2001540842 A JP2001540842 A JP 2001540842A JP 2003515931 A JP2003515931 A JP 2003515931A
Authority
JP
Japan
Prior art keywords
photoresist
semiconductor device
halo
implant
source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001540842A
Other languages
English (en)
Japanese (ja)
Other versions
JP2003515931A5 (enExample
Inventor
ガエッマガミ，アフマド
クリボカピク，ゾラン
スワンソン，ブライアン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of JP2003515931A publication Critical patent/JP2003515931A/ja
Publication of JP2003515931A5 publication Critical patent/JP2003515931A5/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/022—Manufacture or treatment of FETs having insulated gates [IGFET] having lightly-doped source or drain extensions selectively formed at the sides of the gates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26586—Bombardment with radiation with high-energy radiation producing ion implantation characterised by the angle between the ion beam and the crystal planes or the main crystal surface
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/351—Substrate regions of field-effect devices
    • H10D62/357—Substrate regions of field-effect devices of FETs
    • H10D62/364—Substrate regions of field-effect devices of FETs of IGFETs
    • H10D62/371—Inactive supplementary semiconductor regions, e.g. for preventing punch-through, improving capacity effect or leakage current

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • High Energy & Nuclear Physics (AREA)
  • General Physics & Mathematics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP2001540842A 1999-11-29 2000-06-23 ハロ打込みを用いた半導体素子の製造方法 Pending JP2003515931A (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US16815599P 1999-11-29 1999-11-29
US60/168,155 1999-11-29
US09/497,320 US7192836B1 (en) 1999-11-29 2000-02-03 Method and system for providing halo implant to a semiconductor device with minimal impact to the junction capacitance
US09/497,320 2000-02-03
PCT/US2000/017271 WO2001039273A1 (en) 1999-11-29 2000-06-23 Method of manufacturing a semiconductor device using a halo implantation

Publications (2)

Publication Number Publication Date
JP2003515931A true JP2003515931A (ja) 2003-05-07
JP2003515931A5 JP2003515931A5 (enExample) 2007-06-28

Family

ID=26863843

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001540842A Pending JP2003515931A (ja) 1999-11-29 2000-06-23 ハロ打込みを用いた半導体素子の製造方法

Country Status (7)

Country Link
US (1) US7192836B1 (enExample)
EP (1) EP1234335B1 (enExample)
JP (1) JP2003515931A (enExample)
KR (1) KR100647884B1 (enExample)
CN (1) CN1307724C (enExample)
DE (1) DE60031881T2 (enExample)
WO (1) WO2001039273A1 (enExample)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6462371B1 (en) * 1998-11-24 2002-10-08 Micron Technology Inc. Films doped with carbon for use in integrated circuit technology
US6677646B2 (en) 2002-04-05 2004-01-13 International Business Machines Corporation Method and structure of a disposable reversed spacer process for high performance recessed channel CMOS
KR100531105B1 (ko) * 2003-07-23 2005-11-28 동부아남반도체 주식회사 반도체 소자 제조방법
US8216903B2 (en) * 2005-09-29 2012-07-10 Texas Instruments Incorporated SRAM cell with asymmetrical pass gate
KR100752173B1 (ko) * 2005-12-29 2007-08-24 동부일렉트로닉스 주식회사 반도체 소자의 포켓 이온 주입 감광막 패턴 및 그 형성방법
KR101416316B1 (ko) 2007-12-12 2014-07-08 삼성전자주식회사 국부적인 할로 이온 영역을 포함하는 전계 효과트랜지스터, 이를 포함하는 반도체 메모리, 메모리 카드 및시스템
US8822293B2 (en) * 2008-03-13 2014-09-02 Taiwan Semiconductor Manufacturing Company, Ltd. Self-aligned halo/pocket implantation for reducing leakage and source/drain resistance in MOS devices
US8877596B2 (en) * 2010-06-24 2014-11-04 International Business Machines Corporation Semiconductor devices with asymmetric halo implantation and method of manufacture
KR200454335Y1 (ko) * 2011-01-21 2011-06-29 임석우 조명장치를 갖춘 모자
WO2013048513A1 (en) * 2011-09-30 2013-04-04 Intel Corporation Non-planar transitor fin fabrication
CN103337482A (zh) * 2013-06-17 2013-10-02 上海集成电路研发中心有限公司 可调节阈值电压的静态随机存储器晶体管单元制造方法

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63312678A (ja) * 1987-06-16 1988-12-21 Sanyo Electric Co Ltd Ｍｏｓ半導体装置の製造方法
JPH05198804A (ja) * 1991-07-25 1993-08-06 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
JPH05218324A (ja) * 1991-09-30 1993-08-27 Sgs Thomson Microelectron Inc 集積回路トランジスタの製造方法
JPH06196492A (ja) * 1992-12-24 1994-07-15 Nippon Steel Corp 半導体装置及びその製造方法
JPH06349854A (ja) * 1993-06-11 1994-12-22 Sony Corp トランジスタの製造方法
WO1997013273A1 (en) * 1995-10-04 1997-04-10 Intel Corporation Formation of source/drain from doped glass
JPH09289315A (ja) * 1996-04-22 1997-11-04 Sony Corp 半導体装置の製造方法
JPH09304945A (ja) * 1996-05-10 1997-11-28 Hitachi Ltd パターン形成方法
JPH11135791A (ja) * 1997-08-28 1999-05-21 Texas Instr Inc <Ti> 局在化されたソースおよびドレイン・エクステンションを有するトランジスタおよびその製造方法
JP2000068509A (ja) * 1998-08-26 2000-03-03 Sony Corp 半導体装置の製造方法

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62163374A (ja) 1986-01-14 1987-07-20 Toshiba Corp 半導体装置の製造方法
US5045486A (en) * 1990-06-26 1991-09-03 At&T Bell Laboratories Transistor fabrication method
US5320974A (en) * 1991-07-25 1994-06-14 Matsushita Electric Industrial Co., Ltd. Method for making semiconductor transistor device by implanting punch through stoppers
US5378659A (en) 1993-07-06 1995-01-03 Motorola Inc. Method and structure for forming an integrated circuit pattern on a semiconductor substrate
KR970004074A (ko) * 1995-06-05 1997-01-29 빈센트 비. 인그라시아 절연 게이트 전계 효과 트랜지스터 및 그 제조 방법
US5675166A (en) * 1995-07-07 1997-10-07 Motorola, Inc. FET with stable threshold voltage and method of manufacturing the same
US5595919A (en) * 1996-02-20 1997-01-21 Chartered Semiconductor Manufacturing Pte Ltd. Method of making self-aligned halo process for reducing junction capacitance
US6020244A (en) * 1996-12-30 2000-02-01 Intel Corporation Channel dopant implantation with automatic compensation for variations in critical dimension
US5899719A (en) 1997-02-14 1999-05-04 United Semiconductor Corporation Sub-micron MOSFET
US6083794A (en) * 1997-07-10 2000-07-04 International Business Machines Corporation Method to perform selective drain engineering with a non-critical mask
US6037107A (en) * 1997-08-28 2000-03-14 Shipley Company, L.L.C. Photoresist compositions
US5976937A (en) * 1997-08-28 1999-11-02 Texas Instruments Incorporated Transistor having ultrashallow source and drain junctions with reduced gate overlap and method
US6008094A (en) * 1997-12-05 1999-12-28 Advanced Micro Devices Optimization of logic gates with criss-cross implants to form asymmetric channel regions
US5970353A (en) * 1998-03-30 1999-10-19 Advanced Micro Devices, Inc. Reduced channel length lightly doped drain transistor using a sub-amorphous large tilt angle implant to provide enhanced lateral diffusion
US6051458A (en) * 1998-05-04 2000-04-18 Taiwan Semiconductor Manufacturing Company Drain and source engineering for ESD-protection transistors
US6171913B1 (en) * 1998-09-08 2001-01-09 Taiwan Semiconductor Manufacturing Company Process for manufacturing a single asymmetric pocket implant
US6114211A (en) * 1998-11-18 2000-09-05 Advanced Micro Devices, Inc. Semiconductor device with vertical halo region and methods of manufacture
US6320236B1 (en) * 1999-10-06 2001-11-20 Advanced Micro Devices, Inc. Optimization of logic gates with criss-cross implants to form asymmetric channel regions

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63312678A (ja) * 1987-06-16 1988-12-21 Sanyo Electric Co Ltd Ｍｏｓ半導体装置の製造方法
JPH05198804A (ja) * 1991-07-25 1993-08-06 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
JPH05218324A (ja) * 1991-09-30 1993-08-27 Sgs Thomson Microelectron Inc 集積回路トランジスタの製造方法
JPH06196492A (ja) * 1992-12-24 1994-07-15 Nippon Steel Corp 半導体装置及びその製造方法
JPH06349854A (ja) * 1993-06-11 1994-12-22 Sony Corp トランジスタの製造方法
WO1997013273A1 (en) * 1995-10-04 1997-04-10 Intel Corporation Formation of source/drain from doped glass
JPH09289315A (ja) * 1996-04-22 1997-11-04 Sony Corp 半導体装置の製造方法
JPH09304945A (ja) * 1996-05-10 1997-11-28 Hitachi Ltd パターン形成方法
JPH11135791A (ja) * 1997-08-28 1999-05-21 Texas Instr Inc <Ti> 局在化されたソースおよびドレイン・エクステンションを有するトランジスタおよびその製造方法
JP2000068509A (ja) * 1998-08-26 2000-03-03 Sony Corp 半導体装置の製造方法

Also Published As

Publication number Publication date
KR20020060980A (ko) 2002-07-19
WO2001039273A1 (en) 2001-05-31
KR100647884B1 (ko) 2006-11-23
US7192836B1 (en) 2007-03-20
CN1307724C (zh) 2007-03-28
DE60031881T2 (de) 2007-07-05
EP1234335B1 (en) 2006-11-15
CN1373904A (zh) 2002-10-09
EP1234335A1 (en) 2002-08-28
DE60031881D1 (de) 2006-12-28

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