JP2003338519A - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法Info
- Publication number
- JP2003338519A JP2003338519A JP2002146321A JP2002146321A JP2003338519A JP 2003338519 A JP2003338519 A JP 2003338519A JP 2002146321 A JP2002146321 A JP 2002146321A JP 2002146321 A JP2002146321 A JP 2002146321A JP 2003338519 A JP2003338519 A JP 2003338519A
- Authority
- JP
- Japan
- Prior art keywords
- wire
- semiconductor device
- semiconductor chip
- electrode pads
- connection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Geometry (AREA)
- Wire Bonding (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Priority Applications (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002146321A JP2003338519A (ja) | 2002-05-21 | 2002-05-21 | 半導体装置及びその製造方法 |
| TW92112447A TWI297184B (en) | 2002-05-21 | 2003-05-07 | A semiconductor device and a method of manufacturing the same |
| US10/430,279 US6900551B2 (en) | 2002-05-21 | 2003-05-07 | Semiconductor device with alternate bonding wire arrangement |
| KR1020030030463A KR20040014167A (ko) | 2002-05-21 | 2003-05-14 | 반도체장치 및 그 제조방법 |
| CNB031237061A CN100481414C (zh) | 2002-05-21 | 2003-05-20 | 半导体器件及其制造方法 |
| US11/035,999 US20050121805A1 (en) | 2002-05-21 | 2005-01-18 | Semiconductor device and a method of manufacturing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002146321A JP2003338519A (ja) | 2002-05-21 | 2002-05-21 | 半導体装置及びその製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2003338519A true JP2003338519A (ja) | 2003-11-28 |
| JP2003338519A5 JP2003338519A5 (enExample) | 2005-09-29 |
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ID=29545121
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2002146321A Pending JP2003338519A (ja) | 2002-05-21 | 2002-05-21 | 半導体装置及びその製造方法 |
Country Status (5)
| Country | Link |
|---|---|
| US (2) | US6900551B2 (enExample) |
| JP (1) | JP2003338519A (enExample) |
| KR (1) | KR20040014167A (enExample) |
| CN (1) | CN100481414C (enExample) |
| TW (1) | TWI297184B (enExample) |
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| KR100603932B1 (ko) | 2005-01-31 | 2006-07-24 | 삼성전자주식회사 | 칩-온-보오드 기판을 갖는 반도체 장치 |
| JP2007103423A (ja) * | 2005-09-30 | 2007-04-19 | Renesas Technology Corp | 半導体装置及びその製造方法 |
| JP2007109917A (ja) * | 2005-10-14 | 2007-04-26 | Nec Electronics Corp | 半導体装置および半導体装置の製造方法 |
| JP2011155292A (ja) * | 2011-04-01 | 2011-08-11 | Renesas Electronics Corp | 半導体装置の製造方法 |
| JP2012195459A (ja) * | 2011-03-16 | 2012-10-11 | Sharp Corp | ワイヤーボンディング方法、及び、半導体装置 |
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| WO2017145256A1 (ja) * | 2016-02-23 | 2017-08-31 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
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| JP6768569B2 (ja) * | 2017-03-21 | 2020-10-14 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法および半導体装置 |
| KR20230084971A (ko) | 2021-12-06 | 2023-06-13 | 삼성전자주식회사 | 반도체 패키지 |
| JP2023147829A (ja) * | 2022-03-30 | 2023-10-13 | キヤノン株式会社 | 記録素子ユニット及び記録素子ユニットの製造方法 |
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| KR100603932B1 (ko) | 2005-01-31 | 2006-07-24 | 삼성전자주식회사 | 칩-온-보오드 기판을 갖는 반도체 장치 |
| JP2007103423A (ja) * | 2005-09-30 | 2007-04-19 | Renesas Technology Corp | 半導体装置及びその製造方法 |
| JP2007109917A (ja) * | 2005-10-14 | 2007-04-26 | Nec Electronics Corp | 半導体装置および半導体装置の製造方法 |
| US8508055B2 (en) | 2005-10-14 | 2013-08-13 | Renesas Electronics Corporation | Semiconductor device and manufacturing method thereof |
| US8525306B2 (en) | 2010-07-21 | 2013-09-03 | Renesas Electronics Corporation | Semiconductor device and method of manufacturing the same |
| US8710637B2 (en) | 2010-07-21 | 2014-04-29 | Renesas Electronics Corporation | Semiconductor device and method of manufacturing the same |
| JP2012195459A (ja) * | 2011-03-16 | 2012-10-11 | Sharp Corp | ワイヤーボンディング方法、及び、半導体装置 |
| JP2011155292A (ja) * | 2011-04-01 | 2011-08-11 | Renesas Electronics Corp | 半導体装置の製造方法 |
| CN104765169A (zh) * | 2015-02-04 | 2015-07-08 | 深圳市华星光电技术有限公司 | 一种阵列基板的检测线路及阵列基板 |
| CN104765169B (zh) * | 2015-02-04 | 2018-01-05 | 深圳市华星光电技术有限公司 | 一种阵列基板的检测线路及阵列基板 |
| WO2017145256A1 (ja) * | 2016-02-23 | 2017-08-31 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
| JPWO2017145256A1 (ja) * | 2016-02-23 | 2018-10-04 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
| KR20180118604A (ko) * | 2016-02-23 | 2018-10-31 | 르네사스 일렉트로닉스 가부시키가이샤 | 반도체 장치 및 그 제조 방법 |
| EP3422393A4 (en) * | 2016-02-23 | 2020-02-05 | Renesas Electronics Corporation | SEMICONDUCTOR COMPONENT AND PRODUCTION METHOD THEREFOR |
| US10777507B2 (en) | 2016-02-23 | 2020-09-15 | Renesas Electronics Corporation | Semiconductor device including a pad and a wiring line arranged for bringing a probe into contact with the pad and method of manufacturing the same |
| US10818601B1 (en) | 2016-02-23 | 2020-10-27 | Renesas Electronics Corporation | Semiconductor device and method of manufacturing the same |
| KR102482774B1 (ko) * | 2016-02-23 | 2023-01-02 | 르네사스 일렉트로닉스 가부시키가이샤 | 반도체 장치 및 그 제조 방법 |
| US11616033B2 (en) | 2021-02-03 | 2023-03-28 | Kioxia Corporation | Semiconductor device |
| US12033903B1 (en) * | 2021-12-09 | 2024-07-09 | Amazon Technologies, Inc. | High-density microbump and probe pad arrangement for semiconductor components |
Also Published As
| Publication number | Publication date |
|---|---|
| CN100481414C (zh) | 2009-04-22 |
| US20030218245A1 (en) | 2003-11-27 |
| TWI297184B (en) | 2008-05-21 |
| KR20040014167A (ko) | 2004-02-14 |
| US6900551B2 (en) | 2005-05-31 |
| TW200405491A (en) | 2004-04-01 |
| US20050121805A1 (en) | 2005-06-09 |
| CN1459855A (zh) | 2003-12-03 |
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