CN202205748U - 半导体存储装置 - Google Patents

半导体存储装置 Download PDF

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Publication number
CN202205748U
CN202205748U CN2011200565899U CN201120056589U CN202205748U CN 202205748 U CN202205748 U CN 202205748U CN 2011200565899 U CN2011200565899 U CN 2011200565899U CN 201120056589 U CN201120056589 U CN 201120056589U CN 202205748 U CN202205748 U CN 202205748U
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organic substrate
semiconductor storage
semiconductor memory
memory chip
lead frame
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CN2011200565899U
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石井齐
奥村尚久
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Kioxia Corp
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Toshiba Corp
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    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate

Abstract

根据本实施方式，提供一种半导体存储装置，其具备：设置有外部连接端子的有机基板；和半导体存储芯片。半导体存储装置还具备引线框架，该引线框架具有粘接部及载置部。另外，还具备树脂模铸部，其封装半导体存储芯片。在引线框架，以从载置部以及粘接部的至少一方朝向树脂模铸部的至少大于等于2条的边延伸的方式形成有多个延伸部。

Description

半导体存储装置
技术领域
本实施方式一般地涉及半导体存储装置及其制造方法。 
背景技术
本申请要求2010年3月26日提交的日本专利申请2010-72921的优先权，该日本专利申请的全部内容被引用在本申请中。 
近年来，作为便携电话机、个人计算机等电子设备的存储装置，广泛使用采用了NAND型闪存等存储元件的半导体存储装置。作为在电子设备中所使用的半导体存储装置，能够例示存储卡(半导体存储卡)。 
在半导体存储装置中，半导体存储卡、控制芯片等半导体芯片被搭载于形成有外部端子的布线基板上。半导体芯片的电极应用引线接合而与布线基板的连接焊盘电连接，进而以覆盖半导体芯片整体的方式进行树脂封装。 
在扩展这样的半导体存储装置的使用中，正在推进半导体存储装置的制造成本的抑制。例如，公开了下述技术：对布线基板，使用由比较高价的材料构成的有机基板，通过将该有机基板的形状制成为俯视L字状，来抑制有机基板的使用量从而抑制半导体存储装置的制造成本。 
但是，在半导体存储装置中，占据比较大的区域的半导体存储芯片的载置区域由有机基板构成。因此，制造成本的抑制效果容易变得有限。 
发明内容
本实用新型的实施方式提供能够抑制有机基板的使用量而实现制造成本的抑制的半导体存储装置及其制造方法。 
根据实施方式，提供一种半导体存储装置，其具备：在一个面设置有外部连接端子的有机基板；和半导体存储芯片。半导体存储装置还具备引线框架，该引线框架具有粘接于有机基板的另一个面的粘接部及载置半导体存储芯片的载置部。另外，还具备树脂模铸部，其使外部连接端子露出而封装有机基板、引线框架以及半导体存储芯片，并且俯视呈大致方形形状。有机基板，被单片化为在粘接于粘接部的状态下、俯视与载置部基本不重叠的形状。在引线框架，以从载置部以及粘接部的至少一方朝向树脂模铸部的至少大于等于2条的边延伸的方式形成有多个延伸部。 
提供一种半导体存储装置，具备：有机基板，其在一个面设置有外部连接端子；引线框架，其具有粘接部及载置部，所述粘接部粘接于所述有机基板的另一个面；半导体存储芯片，其载置于所述载置部；以及树脂模铸部，其使所述外部连接端子露出而封装所述有机基板、所述引线框架以及所述半导体存储芯片，并且俯视呈方形形状；所述有机基板被单片化为在粘接于所述粘接部的状态下、俯视所述有机基板与所述载置部不重叠的部分这一方比所述有机基板与所述载置部重叠的部分大的形状；在所述引线框架，以从所述载置部及所述粘接部的至少一方朝向所述树脂模铸部的至少大于等于2条的边延伸的方式形成有多个延伸部。 
在上述的半导体存储装置中，所述延伸部，与其靠所述载置部或所述粘接部侧的根基部分相比，其与所述树脂模铸部的外部的边界部分这一方俯视形成得细。 
在上述的半导体存储装置中，在所述引线框架，以朝向所述树脂模铸部的至少一条边延伸的方式形成有多个所述延伸部。 
在上述的半导体存储装置中，所述有机基板的一部分与所述延伸部的一部分俯视重叠。 
在上述的半导体存储装置中，从所述粘接部朝向所述树脂模铸部的2条边延伸有2个所述延伸部。 
在上述的半导体存储装置中，还具备：搭载于所述有机基板的另一个面的控制芯片。 
在上述的半导体存储装置中，在所述有机基板形成有内部布线，所述内部布线与所述半导体存储芯片之间以及所述内部布线与所述控制芯片之间用接合引线连接，所述控制芯片与所述半导体存储芯片经由所述内部布线电连接。 
在上述的半导体存储装置中，在所述有机基板形成有内部布线，所述控制芯片与所述外部连接端子经由所述内部布线电连接。 
根据本实用新型的实施方式的半导体存储装置及其制造方法，能够抑制有机基板的使用量而实现制造成本的抑制。 
附图说明
图1是表示实施方式的半导体存储装置的外观的俯视图。 
图2是表示图1所示的半导体存储装置的外观的仰视图。 
图3是示意性地表示图1所示的半导体存储装置的内部结构的图。 
图4是表示沿着图1所示的半导体存储装置的A-A线的剖面构造的横截面图。 
图5是有机基板的仰视图。 
图6是引线框架的俯视图。 
图7是用于说明半导体存储装置的制造工序的流程图。 
图8是用于说明半导体存储装置的制造工序的图。 
图9是用于说明半导体存储装置的制造工序的图。 
图10是用于说明半导体存储装置的制造工序的图。 
图11是用于说明半导体存储装置的制造工序的图。 
图12是用于说明半导体存储装置的制造工序的图。 
图13是用于说明半导体存储装置的制造工序的图。 
图14是示意性地表示作为比较例的半导体存储装置的内部结构的图。 
图15是表示图14所示的半导体存储装置的剖面构造的横截面图。 
具体实施方式
以下参照附图，详细地说明实施方式的半导体存储装置及其制造方法。另外，本实用新型并不由该实施方式所限定。 
图1是表示实施方式的半导体存储装置的外观的俯视图。图2是表示图1所示的半导体存储装置的外观的仰视图。图3是示意性地表示图1所示的半导体存储装置的内部结构的图。图4是表示沿着图1所示的半导体存储装置的A-A线的剖面构造的横截面图。半导体存储装置10例如是Micro SD卡(注册商标)。 
半导体存储装置10具备：有机基板11、引线框架13、半导体存储芯片15、控制芯片16、电子部件17和树脂模铸部18。半导体存储装置10，如图1以及图2所示，以在底面侧使外部连接端子19露出的状态，由树脂模铸部18覆盖其外周。半导体存储装置10，通过被树脂模铸部18覆盖而俯视呈大致方形形状。 
有机基板11是例如在绝缘性树脂基板的内部和/或表面设置有布线网的基板，兼作元件搭载基板和端子形成基板。作为这样的有机基板11，使用采用了玻璃环氧树脂和/或BT树脂(双马来酰亚胺三嗪树脂)等的印刷布线板。虽然省略详细的图示，但有机基板11为多层构造，按各层所使用的材料有时不同。 
图5是有机基板11的仰视图。在有机基板11的底面(一个面)11a，设置含有金属层的外部连接端子19。外部连接端子19为半导体存储装置10的输入输出端子。有机基板11被单片化为在俯视半导体存储装置10的内部结构的情况下、与后述的引线框架13的存储芯片载置部(载置部)21基本不重叠的形状(也参照图9)。换言之，在俯视的情况下，有机基板11与载置部21不重叠的部分比有机基板11与载置部21重叠的部分大。 
有机基板11的上表面11b(另一个面)成为搭载控制芯片16和/或电子部件17的搭载面。因此，有机基板11的上表面11b的面积比从上方观察控制芯片16和/或电子部件17所见的面积大。在有机基板11的上表面11b，形成有多个连接焊盘(没有图示)。连接焊盘与外部连接端子19之间和/或连接焊盘彼此之间，经由有机基板11的内部布线(通孔等)电连 接。通过将半导体存储芯片15和/或控制芯片16的电极焊盘(没有图示)与连接焊盘电连接，来将半导体存储芯片15、控制芯片16、外部连接端子19等各要素电连接。 
这里，多个连接焊盘之中连接于半导体存储芯片15的连接焊盘，与外部端子的排列方向大致平行地配置。另外，多个连接焊盘之中连接于控制芯片16的连接焊盘，配置于控制芯片16的电极焊盘附近。其结果，能够用金属线28直接连接半导体存储芯片15的电极焊盘与配置在有机基板11的上表面11b的连接焊盘。另外，能够用金属线27直接连接控制芯片16的电极焊盘与配置在有机基板11的上表面11b的连接焊盘。另外，通过将连接于半导体存储芯片15的连接焊盘及连接于控制芯片16的连接焊盘配置在半导体存储芯片15的电极焊盘与控制芯片16的电极焊盘之间，能够缩短连接于半导体存储芯片15的连接焊盘与控制芯片16的距离。其结果，能够以低电阻连接半导体存储芯片15与控制芯片16。另外，有机基板11的连接焊盘的配置并不限于上述的情况。例如，在使控制芯片16从图3所示的配置旋转了180度的情况下，连接于控制芯片16的连接焊盘配置为，相对于连接于半导体存储芯片15的连接焊盘将控制芯片16夹于中间。 
另外，多个连接焊盘之中电连接于半导体存储芯片15的连接焊盘的间距，为大致80～150μm左右，电连接于控制芯片16的连接焊盘的间距为大致50～120μm左右。即，电连接于控制芯片16的连接焊盘的间隔这一方比电连接于半导体存储芯片15的连接焊盘的间隔小。 
图6是引线框架13的俯视图。引线框架13使用比有机基板11所使用的材料先对便宜的通用材料、例如42Alloy(铁镍合金)和/或铜。引线框架13具有载置部21、基板粘接部22和连结部23。 
载置部21是用于载置半导体存储芯片15的区域。在载置部21的周围，以从载置部21起延伸的方式形成有基板粘接部22和/或连结部23。基板粘接部22是使用粘接剂而粘接于有机基板11的上表面11b的区域。通过将基板粘接部22粘接于有机基板11的上表面11b，载置部21被定位于俯视与有机基板11基本不重叠的位置。 
另外，载置部21与有机基板11虽然俯视基本不重叠，但在一部分区域有相互重叠的部分。在该重叠的部分，载置部21也与有机基板11接合。通过使载置部21接合于有机基板11，使有机基板11与引线框架13的接触面积增大。因此，与仅用基板粘接部22与有机基板11粘接的情况相比，能够强化有机基板11与引线框架13的粘接力。另外，也可以在载置部21与有机基板11重叠的部分使用粘接剂进行粘接。其结果，能够进一步强化有机基板11与引线框架13的粘接力。 
连结部23形成为从载置部21和/或基板粘接部22朝向半导体存储装置10的外部即后述的树脂模铸部18的外部延伸。如图6所示，在引线框架13，形成有多个连结部23。连结部23在半导体存储装置的制造阶段使多个引线框架13彼此连结。这样，通过使多个引线框架13连结，能够一并地制造多个半导体存储装置10。在图6中，由两点划线表示半导体存储装置的外形。在本实施方式中，以朝向俯视呈大致方形形状的半导体存储装置10的全部4边延伸的方式形成有多个连结部23。 
另外，在俯视的半导体存储装置10的4边中的至少1边，以朝向该1边延伸的方式设置有大于等于2个的连结部23。另外，在本实施方式中，在半导体存储装置10的全部4边，以朝向该1边延伸的方式设置有大于等于2个的连结部23。 
连结部23包括余留部13a和延伸部13b而构成。余留部13a是从半导体存储装置10的外形伸出的部分，最终会被切断而除去。延伸部13b不从半导体存储装置10的最终的外径伸出，其构成半导体存储装置10的一部分。连结部23形成为，与其靠载置部21和/或基板粘接部22侧的根基部相比，其与半导体存储装置10的外部的边界部分这一方俯视变细。尤其是，在本实施方式中，连结部23形成为，在其与半导体存储装置10的外部的边界部分的附近变细。 
半导体存储芯片15是NAND型闪存等存储元件。半导体存储芯片15在其1边具有多个电极焊盘。半导体存储芯片15的电极焊盘的间距为大于等于大致80μm，有机基板11的多个连接焊盘之中电连接于半导体存储芯 片15的连接焊盘与半导体存储芯片相一致，形成为大致80～150μm的间距。在载置部21上，层叠多个半导体存储芯片15。多个半导体存储芯片15之中最下层的半导体存储芯片15，相对于载置部21通过粘接材料25而粘接。作为粘接材料25，例如使用一般的以聚酰亚胺树脂、环氧树脂、丙烯酸树脂等为主成分的热固化性或光固化性的贴装薄膜(粘接剂薄膜)或者液状材料。 
通过在粘接于载置部21的最下层的半导体存储芯片15上，以阶梯状粘接其他的半导体存储芯片15，可层叠多个半导体存储芯片15。通过将半导体存储芯片15层叠为阶梯状，能够使设置在半导体存储芯片15的一边侧的电极焊盘露出。另外，以各个半导体存储芯片15的配置有电极焊盘的边与有机基板11相对的方式进行层叠。该露出了的电极焊盘用Au线等金属线27与有机基板11的连接焊盘电连接(引线接合)。 
控制芯片16搭载于有机基板11的上表面11b。控制芯片16从多个半导体存储芯片15选择进行数据的写入和/或读出的半导体存储芯片15。控制芯片16进行向所选择的半导体存储芯片15的数据的写入和/或存储在所选择的半导体存储芯片15中的数据的读出等。在控制芯片16的上表面，形成有电极焊盘(没有图示)。另外，控制芯片16的多个电极焊盘配置在控制芯片16的周边。控制芯片16所具有的电极焊盘的数量比半导体存储芯片15所具有的电极焊盘的数量多。另外，控制芯片16所具有的电极焊盘的间距为大致30～100μm左右，比有机基板11的多个连接焊盘之中电连接于控制芯片16的连接焊盘的间隔窄。控制芯片16的电极焊盘与有机基板11的连接焊盘由金属线28引线接合。 
电子部件17搭载于有机基板11的上表面11b。电子部件17例如是芯片电容器、电阻和/或电感器。在此，通过将电子部件17配置在有机基板11上，无需用金属线连接，而可经由有机基板的内部布线与半导体存储芯片15和/或控制芯片16电连接。其结果，能够降低半导体存储装置10的寄生电容、寄生电阻。 
树脂模铸部18通过用树脂系材料封装有机基板11的上表面11b和引 线框架13的两面而形成。通过用树脂材料封装闭有机基板11的上表面11b，使外部连接端子19露出于外部。树脂模铸部18构成半导体存储装置10的外壳。树脂模铸部18以覆盖半导体存储芯片15和/或控制芯片16的高度形成。树脂模铸部18通过用模具覆盖安装有半导体存储芯片15等安装部件的有机基板11以及引线框架13并对该模具内注入软化了的树脂系材料而形成。 
接着，关于半导体存储装置10的制造工序进行说明。图7是用于说明半导体存储装置10的制造工序的流程图。图8～图13是用于说明半导体存储装置10的制造工序的图。 
首先，将有机基板11单片化(步骤S1)。有机基板11的单片化，由于通过使用了例如切割刀片(dicing blate)(没有图示)的一般的工序进行，所以省略详细的说明。接着，在引线框架13的基板粘接部22涂敷粘接剂30(步骤S2，也参照图8)。作为粘接剂30，例如使用一般的以聚酰亚胺树脂、环氧树脂、丙烯酸树脂等为主成分的热固化性或光固化性的贴装薄膜(粘接剂薄膜)或者液状材料。另外，在载置部21与有机基板11重叠的部分也涂敷粘接剂30。在此，能够省略在载置部21与有机基板11重叠的部分所涂敷的粘接剂30 
接着，使有机基板11的上表面11b粘接于涂敷有粘接剂30的基板粘接部22(步骤S3，也参照图9)。接着，在有机基板11的上表面11b安装控制芯片16和电子部件17(步骤S4，也参照图10)。接着，在载置部21经由粘接材料25粘接半导体存储芯片15，进而再在其上粘接半导体存储芯片15而使半导体存储芯片15层叠(步骤S5，也参照图11)。 
接着，用金属线27、28对半导体存储芯片15的电极焊盘与有机基板11的连接焊盘以及控制芯片16的电极焊盘与有机基板11的连接焊盘进行引线接合(步骤S6，也参照图12)。接着，用树脂系材料封装有机基板11的上表面11b和引线框架13的两面，形成树脂模铸部18，并切除余留部13a(步骤S7，也参照图13)。另外，在图13中，为了方便说明而示出了由于被树脂模铸部18所覆盖而实际上无法观察到的内部的结构(半导 体存储芯片15等)。通过上述一系列的工序，制造出半导体存储装置10。 
图14是示意性地表示作为比较例的半导体存储装置100的内部结构的图。图15是表示图14所示的半导体存储装置100的剖面构造的横截面图。如图14、图15所示，在比较例的半导体存储装置100中，将半导体存储芯片115层叠在有机基板111上。因此，有机基板111以具备用于载置半导体存储芯片115的区域的大小而形成。 
另一方面，在本实施方式的半导体存储装置10中，由于有机基板11被单片化为在俯视半导体存储装置10的内部结构的情况下、与载置部21基本不重叠的形状，所以与比较例相比，有机基板11变得小型，能够大幅抑制有机基板11的使用量。由此，能够实现半导体存储装置10的制造成本的抑制。另外，也可以通过将有机基板11单片化为与设置有外部连接端子19的区域S(参照图5)大致相同的俯视形状，来实现有机基板11的进一步小型化。 
另外，以朝向俯视呈大致方形形状的半导体存储装置10的4边延伸的方式，形成有多个连结部23。即，连结部23从引线框架13起向4个方向延伸。在形成树脂模铸部18的工序中，通过使向4个方向延伸的连结部23被模具夹持，来保持引线框架13。由于由向4个方向延伸的连结部23保持，所以由模具产生的对引线框架13的保持力增加。 
尤其是，容易使存储芯片载置部21在模具内保持于适合的位置。在对模具注入了树脂系材料之后，如果引线框架13由于该注入压力而移动，则半导体存储芯片15会从树脂模铸部18露出，但本实施方式能够抑制这样的问题的发生，实现成品率的提高。另外，连结部23也可以不朝向俯视下的半导体存储装置10的全部4边延伸。只有以至少朝向俯视下的半导体存储装置10的大于等于2条的边延伸的方式设置多个连结部23即可。 
另外，由于在俯视下的半导体存储装置10的4边之中的至少1边，以朝向该1边延伸的方式设置有大于等于2个的连结部23，所以能够进一步提高上述的由模具产生的对引线框架13的保持力。 
另外，连结部23也以从基板粘接部22延伸的方式形成。因此，由于 与上述同样的理由，形成树脂模铸部18的工序中的、由模具产生的对基板粘接部22的保持力增加。在此，在半导体存储装置10中，使有机基板11的底面11a露出。因此，在形成树脂模铸部18的工序中，需要通过使有机基板11的底面11a与模具紧密附着，来防止树脂浸入到底面11a与模具的间隙。 
例如，如果引线框架13、尤其是基板粘接部22在有机基板11从模具分离的方向变形，则会在有机基板11的底面11a与模具之间出现间隙，树脂容易侵入。如果由侵入到底面11a与模具的间隙的树脂覆盖外部连接端子19，则存在会引起与外部设备的接触不良、产生切除飞边这样的多余的时间和劳力的问题。另一方面，在本实施方式中，由于通过从基板粘接部22延伸的连结部23(延伸部13b)，能够提高由模具产生的对基板粘接部22的保持力，所以能够抑制引线框架13的变形、尤其是基板粘接部22的变形，容易使有机基板11可靠地紧密附着于模具。由此，能够抑制树脂侵入到基板11的底面11a与模具的间隙的情况，实现成品率的提高和/或制造成本的抑制。另外，从基板粘接部22有2个连结部23(延伸部13b)朝向树脂模铸部的2条边延伸。其结果，能够有效地抑制树脂侵入到基板11的底面11a与模具的间隙的情况。 
另外，由于连结部23形成为，与其靠载置部21和/或基板粘接部22侧的根基部相比，其与半导体存储装置10的外部的边界部分这一方俯视变细，所以在切除余留部23a时，能够减小连结部23的切断面积。因此，能够抑制切断连结部23的工具的磨损，实现工具的长寿命化。另外，由于连结部23的根基部，比连结部与半导体存储装置10的外部的边界部分粗，所以能够抑制连结部23的强度降低。由此，能够抑制由上述的模具产生的对引线框架13的保持力降低的情况。 
另外，通过使引线框架13与有机基板11接触，来确定有机基板11与载置部21的相对的位置关系。通过使引线框架13与有机基板11接触，能够使半导体存储芯片15与有机基板11的位置偏离变小，能够抑制引线接合工序中的施工不良而抑制成品率的降低。另外，由于有机基板11与引 线框架13最终由树脂模铸部18封装，所以对于有机基板11与引线框架13的粘接，不要求高的可靠性，只要直至树脂模铸部18的形成工序为止维持两者的粘接即可。即，能够在载置部21和基板粘接部22涂敷粘接剂30，而省略涂敷于载置部21与有机基板11的重叠部分的粘接剂30。例如，在载置部21与有机基板11重叠的部分小等情况下，能够防止粘接部30从载置部21与有机基板11重叠的部分溢出的情况。 
另外，位于引线框架13的大致中央部、从载置部21与有机基板11重叠的部分朝向树脂模铸部18的外部延伸的连结部23-1，也与有机基板11重叠。其结果，能够增加引线框架13与有机基板11接触的面积。因此，半导体存储芯片15与有机基板11的位置偏离减小，能够抑制引线接合工序中的施工不良而抑制成品率的降低。 
控制芯片16，与半导体存储芯片15相比，所形成的电极焊盘的数量容易变多。另外，控制芯片16与半导体存储芯片15相比，从上方所见的俯视形状容易形成得小。因此，用于引线接合控制芯片16的电极焊盘和/或连接焊盘，与用于引线接合半导体存储芯片15的电极焊盘和/或连接焊盘相比，密集地形成。在本实施方式中，由于将控制芯片16安装在有机基板11上而非引线框架13上，所以即使在电极焊盘和/或连接焊盘密集地形成的条件下，也能够可靠地进行引线接合。另一方面，用于进行半导体存储芯片15的引线接合的电极焊盘和/或连接焊盘其间隔比较宽阔。因此，半导体存储芯片15的引线接合比较容易进行，通过将半导体存储芯片15安装于引线框架13上，即使相互之间的距离稍微分离也能够进行引线接合。 
另外，由于将控制芯片16和/或电子部件17安装在有机基板11的上表面11b，所以能够使有机基板11的底面11a侧、即形成有外部连接端子19的一侧变得大致平坦。由此，能够有助于半导体存储装置10的小型化。另外，通过减少半导体存储装置10的外周面的凹凸，能够有助于实现半导体存储装置10向电子设备的顺畅的插入、从电子设备的拔出。 
另外，外部连接端子、半导体存储芯片15、控制芯片16以及电子部 件17，经由有机基板11的内部布线连接。即，半导体存储芯片15、控制芯片16以及电子部件17不经由引线部件地电连接。由此，余留部13a的切除部分露出于树脂模铸部18的外侧，但能够节省对该部分进行绝缘处理等的时间和劳力，能够进一步抑制半导体存储装置10的制造成本。 
另外，通过使有机基板11的俯视形状小型化，能够抑制由在电子部件17的安装工序等中对有机基板11施加的热而导致的有机基板11的变形。如上所述，有机基板11为多层构造，按各层所使用的材料有时不同。由于按各层所使用的材料不同，所以线膨胀系数也按各层而不同，所以容易产生由受热历程引起的变形。在此，通过使有机基板11的俯视形状小型化，能够使有机基板11占半导体存储装置10整体的比例变小，使半导体存储装置10整体的变形难以产生。 
另外，载置部21与有机基板10的相对的位置关系的确定，不限于通过引线框架13的粘接来进行的情况。例如，也可以由用于形成树脂模铸部18的模具分别固定有机基板11和引线框架13。通过使有机基板11和引线框架13固定于模具，来确定相互的相对位置关系。 
另外，在本实施方式中，举出在载置部21上层叠多个半导体存储芯片15的例子而进行了说明，但是并不限于此，而也可以仅使1块半导体存储芯片15粘接于载置部21上而构成半导体存储装置10。 
另外，半导体存储芯片10的制造工序不限于由图7的流程图所示的情况。例如，也可以在将有机基板11粘接于引线框架13之前，使控制芯片16和电子部件17安装于有机基板11。另外，也可以在将有机基板11单片化之前，使控制芯片16和电子部件安装于有机基板11。 
另外，在本实施方式中，作为半导体存储装置10举出微SD卡为例进行了说明，但并不限于此，而能够将本实施方式应用于具备半导体存储芯片而构成的各种存储装置。 
进一步的效果和/或变形例，能够由本领域技术人员容易导出。因此，本实用新型的更为广泛的方式，不限定于以上所表示且记述的特定的详细的以及代表性的实施方式。因此，不脱离由所附权利要求及其均等物所定 义的概括性的发明的概念的精神或范围，能够实现各种变形。 

Claims (10)

1.一种半导体存储装置，其特征在于，具备：
有机基板，其在一个面设置有外部连接端子；
引线框架，其具有粘接部及载置部，所述粘接部粘接于所述有机基板的另一个面；
半导体存储芯片，其载置于所述载置部；以及
树脂模铸部，其使所述外部连接端子露出而封装所述有机基板、所述引线框架以及所述半导体存储芯片，并且俯视呈方形形状；
所述有机基板被单片化为在粘接于所述粘接部的状态下、俯视所述有机基板与所述载置部不重叠的部分这一方比所述有机基板与所述载置部重叠的部分大的形状；
在所述引线框架，以从所述载置部及所述粘接部的至少一方朝向所述树脂模铸部的至少大于等于2条的边延伸的方式形成有多个延伸部。
2.根据权利要求1所述的半导体存储装置，其特征在于，
所述延伸部，与其靠所述载置部或所述粘接部侧的根基部分相比，其与所述树脂模铸部的外部的边界部分这一方俯视形成得细。
3.根据权利要求1所述的半导体存储装置，其特征在于，
在所述引线框架，以朝向所述树脂模铸部的至少一条边延伸的方式形成有多个所述延伸部。
4.根据权利要求1所述的半导体存储装置，其特征在于，
所述有机基板的一部分与所述延伸部的一部分俯视重叠。
5.根据权利要求1所述的半导体存储装置，其特征在于，
从所述粘接部朝向所述树脂模铸部的2条边延伸有2个所述延伸部。
6.根据权利要求1所述的半导体存储装置，其特征在于，还具备：
搭载于所述有机基板的另一个面的控制芯片。
7.根据权利要求6所述的半导体存储装置，其特征在于，
在所述有机基板形成有内部布线， 
所述内部布线与所述半导体存储芯片之间以及所述内部布线与所述控制芯片之间用接合引线连接，所述控制芯片与所述半导体存储芯片经由所述内部布线电连接。
8.根据权利要求7所述的半导体存储装置，其特征在于，
在所述有机基板形成有内部布线，
所述控制芯片与所述外部连接端子经由所述内部布线电连接。
9.根据权利要求1所述的半导体存储装置，其特征在于，还具备：
搭载于所述有机基板的另一个面的电子部件。
10.根据权利要求1所述的半导体存储装置，其特征在于，
所述半导体存储芯片为NAND型闪存。 
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CN102201414B (zh) * 2010-03-26 2013-12-18 株式会社东芝 半导体存储装置及其制造方法

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US8314478B2 (en) 2012-11-20
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