JP2003068893A - 不揮発性記憶素子及び半導体集積回路 - Google Patents

不揮発性記憶素子及び半導体集積回路

Info

Publication number
JP2003068893A
JP2003068893A JP2001257698A JP2001257698A JP2003068893A JP 2003068893 A JP2003068893 A JP 2003068893A JP 2001257698 A JP2001257698 A JP 2001257698A JP 2001257698 A JP2001257698 A JP 2001257698A JP 2003068893 A JP2003068893 A JP 2003068893A
Authority
JP
Japan
Prior art keywords
insulating film
film
semiconductor
region
trap
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001257698A
Other languages
English (en)
Japanese (ja)
Other versions
JP2003068893A5 (enExample
Inventor
Shoji Yadori
章二 宿利
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP2001257698A priority Critical patent/JP2003068893A/ja
Priority to PCT/JP2002/006710 priority patent/WO2003021666A1/ja
Priority to TW091117013A priority patent/TW584943B/zh
Publication of JP2003068893A publication Critical patent/JP2003068893A/ja
Publication of JP2003068893A5 publication Critical patent/JP2003068893A5/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0466—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/40—EEPROM devices comprising charge-trapping gate insulators characterised by the peripheral circuit region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0413—Manufacture or treatment of FETs having insulated gates [IGFET] of FETs having charge-trapping gate insulators, e.g. MNOS transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H10D30/681—Floating-gate IGFETs having only two programming levels
    • H10D30/684—Floating-gate IGFETs having only two programming levels programmed by hot carrier injection
    • H10D30/685—Floating-gate IGFETs having only two programming levels programmed by hot carrier injection from the channel
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/69—IGFETs having charge trapping gate insulators, e.g. MNOS transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/031—Manufacture or treatment of data-storage electrodes
    • H10D64/037—Manufacture or treatment of data-storage electrodes comprising charge-trapping insulators

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
  • Read Only Memory (AREA)
JP2001257698A 2001-08-28 2001-08-28 不揮発性記憶素子及び半導体集積回路 Pending JP2003068893A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2001257698A JP2003068893A (ja) 2001-08-28 2001-08-28 不揮発性記憶素子及び半導体集積回路
PCT/JP2002/006710 WO2003021666A1 (en) 2001-08-28 2002-07-03 Nonvolatile storage device and semiconductor integrated circuit
TW091117013A TW584943B (en) 2001-08-28 2002-07-30 Nonvolatile storage device and semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001257698A JP2003068893A (ja) 2001-08-28 2001-08-28 不揮発性記憶素子及び半導体集積回路

Related Child Applications (2)

Application Number Title Priority Date Filing Date
JP2005041612A Division JP2005184029A (ja) 2005-02-18 2005-02-18 不揮発性記憶素子及び半導体集積回路装置
JP2005041611A Division JP2005184028A (ja) 2005-02-18 2005-02-18 不揮発性記憶素子

Publications (2)

Publication Number Publication Date
JP2003068893A true JP2003068893A (ja) 2003-03-07
JP2003068893A5 JP2003068893A5 (enExample) 2005-08-25

Family

ID=19085320

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001257698A Pending JP2003068893A (ja) 2001-08-28 2001-08-28 不揮発性記憶素子及び半導体集積回路

Country Status (3)

Country Link
JP (1) JP2003068893A (enExample)
TW (1) TW584943B (enExample)
WO (1) WO2003021666A1 (enExample)

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004172559A (ja) * 2002-11-15 2004-06-17 Samsung Electronics Co Ltd 垂直チャンネルを有する不揮発性ｓｏｎｏｓメモリ及びその製造方法、並びにメモリのプログラミング方法
KR100446632B1 (ko) * 2002-10-14 2004-09-04 삼성전자주식회사 비휘발성 ｓｏｎｓｎｏｓ 메모리
JP2005317191A (ja) * 2004-04-26 2005-11-10 Macronix Internatl Co Ltd 電荷トラップ不揮発性メモリのための電荷均衡化を有する動作方式
JP2005317965A (ja) * 2004-04-26 2005-11-10 Micronics Internatl Co Ltd 電荷捕獲型不揮発性メモリのための電荷平衡消去による動作スキーム
JP2006196643A (ja) * 2005-01-13 2006-07-27 Renesas Technology Corp 不揮発性半導体記憶装置
KR100815968B1 (ko) * 2007-05-17 2008-03-24 주식회사 동부하이텍 반도체 소자 제조 방법
JP2008131030A (ja) * 2006-11-20 2008-06-05 Macronix Internatl Co Ltd トンネル障壁の上に電界分布層を有する電荷捕獲装置
JP2008541487A (ja) * 2005-05-17 2008-11-20 マイクロン テクノロジー， インク． 斬新な低電力不揮発性メモリおよびゲートスタック
US7598559B2 (en) 2005-03-04 2009-10-06 Sharp Kabushiki Kaisha Semiconductor storage device, manufacturing method therefor, and portable electronic equipment
US7816205B2 (en) 2008-10-21 2010-10-19 Applied Materials, Inc. Method of forming non-volatile memory having charge trap layer with compositional gradient
US8987098B2 (en) 2012-06-19 2015-03-24 Macronix International Co., Ltd. Damascene word line
US9099538B2 (en) 2013-09-17 2015-08-04 Macronix International Co., Ltd. Conductor with a plurality of vertical extensions for a 3D device
US9379126B2 (en) 2013-03-14 2016-06-28 Macronix International Co., Ltd. Damascene conductor for a 3D device
US9559113B2 (en) 2014-05-01 2017-01-31 Macronix International Co., Ltd. SSL/GSL gate oxide in 3D vertical channel NAND

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4647175B2 (ja) 2002-04-18 2011-03-09 ルネサスエレクトロニクス株式会社 半導体集積回路装置
US8320191B2 (en) 2007-08-30 2012-11-27 Infineon Technologies Ag Memory cell arrangement, method for controlling a memory cell, memory array and electronic device
US8198671B2 (en) 2009-04-22 2012-06-12 Applied Materials, Inc. Modification of charge trap silicon nitride with oxygen plasma
JP5586666B2 (ja) 2012-08-01 2014-09-10 力晶科技股▲ふん▼有限公司 不揮発性半導体記憶装置とその読み出し方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4913118B1 (enExample) * 1970-02-05 1974-03-29
JPS4886485A (enExample) * 1972-02-17 1973-11-15
JPS5924547B2 (ja) * 1976-11-04 1984-06-09 ソニー株式会社 不揮発性メモリトランジスタ
JP2901493B2 (ja) * 1994-06-27 1999-06-07 日本電気株式会社 半導体記憶装置及びその製造方法
JPH09205155A (ja) * 1996-01-25 1997-08-05 Sony Corp 半導体記憶装置の製造方法
JP2000030471A (ja) * 1998-07-14 2000-01-28 Toshiba Microelectronics Corp 不揮発性半導体メモリ
JP2000049241A (ja) * 1998-07-28 2000-02-18 Matsushita Electron Corp 半導体メモリ装置およびその製造方法
JP2000349175A (ja) * 1999-06-03 2000-12-15 Mitsubishi Electric Corp 半導体装置の製造方法
JP3464955B2 (ja) * 1999-12-03 2003-11-10 Ｎｅｃエレクトロニクス株式会社 半導体記憶装置及び記憶方法
JP2002184873A (ja) * 2000-10-03 2002-06-28 Sony Corp 不揮発性半導体記憶装置及びその製造方法

Cited By (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100446632B1 (ko) * 2002-10-14 2004-09-04 삼성전자주식회사 비휘발성 ｓｏｎｓｎｏｓ 메모리
JP2004172559A (ja) * 2002-11-15 2004-06-17 Samsung Electronics Co Ltd 垂直チャンネルを有する不揮発性ｓｏｎｏｓメモリ及びその製造方法、並びにメモリのプログラミング方法
JP2005317191A (ja) * 2004-04-26 2005-11-10 Macronix Internatl Co Ltd 電荷トラップ不揮発性メモリのための電荷均衡化を有する動作方式
JP2005317965A (ja) * 2004-04-26 2005-11-10 Micronics Internatl Co Ltd 電荷捕獲型不揮発性メモリのための電荷平衡消去による動作スキーム
JP2006196643A (ja) * 2005-01-13 2006-07-27 Renesas Technology Corp 不揮発性半導体記憶装置
US7598559B2 (en) 2005-03-04 2009-10-06 Sharp Kabushiki Kaisha Semiconductor storage device, manufacturing method therefor, and portable electronic equipment
US8802526B2 (en) 2005-05-17 2014-08-12 Micron Technology, Inc. Methods of forming reverse mode non-volatile memory cell structures
JP2008541487A (ja) * 2005-05-17 2008-11-20 マイクロン テクノロジー， インク． 斬新な低電力不揮発性メモリおよびゲートスタック
US20110300682A1 (en) * 2006-11-20 2011-12-08 Macronix International Co., Ltd. Charge trapping devices with field distribution layer over tunneling barrier
JP2008131030A (ja) * 2006-11-20 2008-06-05 Macronix Internatl Co Ltd トンネル障壁の上に電界分布層を有する電荷捕獲装置
US8101989B2 (en) 2006-11-20 2012-01-24 Macronix International Co., Ltd. Charge trapping devices with field distribution layer over tunneling barrier
EP1923909B1 (en) * 2006-11-20 2016-11-16 Macronix International Co., Ltd. Charge trapping memory device and manufacturing method thereof
JP2012216876A (ja) * 2006-11-20 2012-11-08 Macronix International Co Ltd トンネル障壁の上に電界分布層を有する電荷捕獲装置
US8889509B2 (en) * 2006-11-20 2014-11-18 Macronix International Co., Ltd. Charge trapping devices with field distribution layer over tunneling barrier
KR100815968B1 (ko) * 2007-05-17 2008-03-24 주식회사 동부하이텍 반도체 소자 제조 방법
US8252653B2 (en) 2008-10-21 2012-08-28 Applied Materials, Inc. Method of forming a non-volatile memory having a silicon nitride charge trap layer
US8501568B2 (en) 2008-10-21 2013-08-06 Applied Materials, Inc. Method of forming flash memory with ultraviolet treatment
US7816205B2 (en) 2008-10-21 2010-10-19 Applied Materials, Inc. Method of forming non-volatile memory having charge trap layer with compositional gradient
US8987098B2 (en) 2012-06-19 2015-03-24 Macronix International Co., Ltd. Damascene word line
US9379126B2 (en) 2013-03-14 2016-06-28 Macronix International Co., Ltd. Damascene conductor for a 3D device
US9099538B2 (en) 2013-09-17 2015-08-04 Macronix International Co., Ltd. Conductor with a plurality of vertical extensions for a 3D device
US9559113B2 (en) 2014-05-01 2017-01-31 Macronix International Co., Ltd. SSL/GSL gate oxide in 3D vertical channel NAND

Also Published As

Publication number Publication date
WO2003021666A1 (en) 2003-03-13
TW584943B (en) 2004-04-21

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