JP2001189303A5 - - Google Patents

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Publication number
JP2001189303A5
JP2001189303A5 JP1999375745A JP37574599A JP2001189303A5 JP 2001189303 A5 JP2001189303 A5 JP 2001189303A5 JP 1999375745 A JP1999375745 A JP 1999375745A JP 37574599 A JP37574599 A JP 37574599A JP 2001189303 A5 JP2001189303 A5 JP 2001189303A5
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JP
Japan
Prior art keywords
conductive film
wafer
main surface
recess
forming
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1999375745A
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English (en)
Japanese (ja)
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JP3676958B2 (ja
JP2001189303A (ja
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Publication date
Application filed filed Critical
Priority to JP37574599A priority Critical patent/JP3676958B2/ja
Priority claimed from JP37574599A external-priority patent/JP3676958B2/ja
Priority to KR1020000082927A priority patent/KR20010082607A/ko
Priority to US09/749,554 priority patent/US6607988B2/en
Publication of JP2001189303A publication Critical patent/JP2001189303A/ja
Publication of JP2001189303A5 publication Critical patent/JP2001189303A5/ja
Application granted granted Critical
Publication of JP3676958B2 publication Critical patent/JP3676958B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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JP37574599A 1999-12-28 1999-12-28 半導体集積回路装置の製造方法 Expired - Fee Related JP3676958B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP37574599A JP3676958B2 (ja) 1999-12-28 1999-12-28 半導体集積回路装置の製造方法
KR1020000082927A KR20010082607A (ko) 1999-12-28 2000-12-27 반도체 집적 회로 장치 및 그 제조 방법
US09/749,554 US6607988B2 (en) 1999-12-28 2000-12-28 Manufacturing method of semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP37574599A JP3676958B2 (ja) 1999-12-28 1999-12-28 半導体集積回路装置の製造方法

Publications (3)

Publication Number Publication Date
JP2001189303A JP2001189303A (ja) 2001-07-10
JP2001189303A5 true JP2001189303A5 (https=) 2004-10-28
JP3676958B2 JP3676958B2 (ja) 2005-07-27

Family

ID=18505993

Family Applications (1)

Application Number Title Priority Date Filing Date
JP37574599A Expired - Fee Related JP3676958B2 (ja) 1999-12-28 1999-12-28 半導体集積回路装置の製造方法

Country Status (3)

Country Link
US (1) US6607988B2 (https=)
JP (1) JP3676958B2 (https=)
KR (1) KR20010082607A (https=)

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US7112122B2 (en) 2003-09-17 2006-09-26 Micron Technology, Inc. Methods and apparatus for removing conductive material from a microelectronic substrate
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US7566391B2 (en) 2004-09-01 2009-07-28 Micron Technology, Inc. Methods and systems for removing materials from microfeature workpieces with organic and/or non-aqueous electrolytic media
KR100599091B1 (ko) 2004-10-06 2006-07-12 삼성전자주식회사 캐패시터 제조 방법
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KR100589078B1 (ko) * 2004-11-29 2006-06-12 삼성전자주식회사 커패시터 제조 방법 및 이를 채용한 디램 장치의 제조 방법
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KR100662542B1 (ko) * 2005-06-17 2006-12-28 제일모직주식회사 반사방지 하드마스크 조성물 및 이를 이용하여 기판 상에패턴화된 재료 형상을 형성시키는 방법
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JP4882548B2 (ja) * 2006-06-30 2012-02-22 富士通セミコンダクター株式会社 半導体装置及びその製造方法
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CN107078040B (zh) 2014-10-17 2021-01-15 盛美半导体设备(上海)股份有限公司 阻挡层的去除方法和半导体结构的形成方法
US10290543B1 (en) * 2017-12-20 2019-05-14 MACRONXI International Co., Ltd. Method for manufacturing semiconductor device
JP2019169627A (ja) * 2018-03-23 2019-10-03 東京エレクトロン株式会社 エッチング方法
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JP2956485B2 (ja) 1994-09-07 1999-10-04 日本電気株式会社 半導体装置の製造方法
JPH08153707A (ja) * 1994-11-29 1996-06-11 Nec Corp 半導体装置の製造方法
JP4058777B2 (ja) 1997-07-31 2008-03-12 日鉱金属株式会社 薄膜形成用高純度ルテニウム焼結体スパッタリングターゲット及び同ターゲットをスパッタリングすることによって形成される薄膜
SG79292A1 (en) * 1998-12-11 2001-03-20 Hitachi Ltd Semiconductor integrated circuit and its manufacturing method

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