GB1521431A - Forming conductors for electrical devices - Google Patents

Forming conductors for electrical devices

Info

Publication number
GB1521431A
GB1521431A GB2056/77A GB205677A GB1521431A GB 1521431 A GB1521431 A GB 1521431A GB 2056/77 A GB2056/77 A GB 2056/77A GB 205677 A GB205677 A GB 205677A GB 1521431 A GB1521431 A GB 1521431A
Authority
GB
United Kingdom
Prior art keywords
layer
photoresist
deposited
metal
opening
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB2056/77A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of GB1521431A publication Critical patent/GB1521431A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
    • H10W20/058—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches by depositing on sacrificial masks, e.g. using lift-off

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Weting (AREA)
GB2056/77A 1976-02-06 1977-01-19 Forming conductors for electrical devices Expired GB1521431A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US65581476A 1976-02-06 1976-02-06

Publications (1)

Publication Number Publication Date
GB1521431A true GB1521431A (en) 1978-08-16

Family

ID=24630480

Family Applications (1)

Application Number Title Priority Date Filing Date
GB2056/77A Expired GB1521431A (en) 1976-02-06 1977-01-19 Forming conductors for electrical devices

Country Status (6)

Country Link
JP (1) JPS5827664B2 (enExample)
CA (1) CA1088382A (enExample)
DE (1) DE2703473A1 (enExample)
FR (1) FR2340620A1 (enExample)
GB (1) GB1521431A (enExample)
IT (1) IT1079545B (enExample)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4184909A (en) * 1978-08-21 1980-01-22 International Business Machines Corporation Method of forming thin film interconnection systems
JPS59170692A (ja) * 1983-03-16 1984-09-26 Ebara Corp 水封入熱交換器
DE102016218652A1 (de) 2015-10-27 2017-04-27 Schaeffler Technologies AG & Co. KG Lageranordnung mit darin eingebauter elektrischer Leitung zur Bereitstellung von mehreren Betriebsspannungen

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1267738B (de) * 1962-10-29 1968-05-09 Intellux Inc Verfahren zur Herstellung von elektrischen Verbindungen zwischen den Stromkreisen von mehrlagigen gedruckten elektrischen Schaltungen
US3464855A (en) * 1966-09-06 1969-09-02 North American Rockwell Process for forming interconnections in a multilayer circuit board
DE1765013A1 (de) * 1968-03-21 1971-07-01 Telefunken Patent Verfahren zur Herstellung von Mehrebenenschaltungen
DE2059425A1 (de) * 1970-12-02 1972-06-22 Siemens Ag Partieller Aufbau von gedruckten Mehrlagenschaltungen
JPS4960870A (enExample) * 1972-10-16 1974-06-13
US3873361A (en) * 1973-11-29 1975-03-25 Ibm Method of depositing thin film utilizing a lift-off mask
JPS5120681A (en) * 1974-07-27 1976-02-19 Oki Electric Ind Co Ltd Handotaisochino seizohoho
NL7415841A (nl) * 1974-12-05 1976-06-09 Philips Nv Werkwijze voor het vervaardigen van een half- geleiderinrichting en halfgeleiderinrichting, vervaardigd volgens de werkwijze.
JPS5272571A (en) * 1975-12-15 1977-06-17 Fujitsu Ltd Production of semiconductor device

Also Published As

Publication number Publication date
CA1088382A (en) 1980-10-28
FR2340620B1 (enExample) 1979-09-28
FR2340620A1 (fr) 1977-09-02
IT1079545B (it) 1985-05-13
DE2703473A1 (de) 1977-08-11
JPS5295987A (en) 1977-08-12
DE2703473C2 (enExample) 1991-01-24
JPS5827664B2 (ja) 1983-06-10

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PCNP Patent ceased through non-payment of renewal fee