FR2807211B1 - Dispositif semiconducteur de type soi et procede de fabricat ion de ce dispositif - Google Patents

Dispositif semiconducteur de type soi et procede de fabricat ion de ce dispositif

Info

Publication number
FR2807211B1
FR2807211B1 FR0014712A FR0014712A FR2807211B1 FR 2807211 B1 FR2807211 B1 FR 2807211B1 FR 0014712 A FR0014712 A FR 0014712A FR 0014712 A FR0014712 A FR 0014712A FR 2807211 B1 FR2807211 B1 FR 2807211B1
Authority
FR
France
Prior art keywords
soi
semiconductor device
type semiconductor
ion manufacturing
ion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0014712A
Other languages
English (en)
French (fr)
Other versions
FR2807211A1 (fr
Inventor
Takuji Matsumoto
Toshiaki Iwamatsu
Yuuichi Hirano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of FR2807211A1 publication Critical patent/FR2807211A1/fr
Application granted granted Critical
Publication of FR2807211B1 publication Critical patent/FR2807211B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01Manufacture or treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/201Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
FR0014712A 2000-04-03 2000-11-15 Dispositif semiconducteur de type soi et procede de fabricat ion de ce dispositif Expired - Fee Related FR2807211B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000100437A JP4698793B2 (ja) 2000-04-03 2000-04-03 半導体装置

Publications (2)

Publication Number Publication Date
FR2807211A1 FR2807211A1 (fr) 2001-10-05
FR2807211B1 true FR2807211B1 (fr) 2004-12-17

Family

ID=18614644

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0014712A Expired - Fee Related FR2807211B1 (fr) 2000-04-03 2000-11-15 Dispositif semiconducteur de type soi et procede de fabricat ion de ce dispositif

Country Status (6)

Country Link
US (1) US6455894B1 (enExample)
JP (1) JP4698793B2 (enExample)
KR (1) KR100373287B1 (enExample)
DE (1) DE10059620A1 (enExample)
FR (1) FR2807211B1 (enExample)
TW (1) TW477067B (enExample)

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US6995430B2 (en) 2002-06-07 2006-02-07 Amberwave Systems Corporation Strained-semiconductor-on-insulator device structures
US6946371B2 (en) 2002-06-10 2005-09-20 Amberwave Systems Corporation Methods of fabricating semiconductor structures having epitaxially grown source and drain elements
US6982474B2 (en) 2002-06-25 2006-01-03 Amberwave Systems Corporation Reacted conductive gate electrodes
KR100897474B1 (ko) * 2002-06-29 2009-05-14 매그나칩 반도체 유한회사 바이폴라 트랜지스터의 제조방법
US6960781B2 (en) * 2003-03-07 2005-11-01 Amberwave Systems Corporation Shallow trench isolation process
JP4371710B2 (ja) * 2003-06-09 2009-11-25 キヤノン株式会社 半導体基体、半導体装置及びこれらの製造方法
JP4651920B2 (ja) * 2003-07-15 2011-03-16 ルネサスエレクトロニクス株式会社 半導体装置
JP4561060B2 (ja) * 2003-07-28 2010-10-13 パナソニック株式会社 半導体装置及びその製造方法
US6930351B2 (en) 2003-08-14 2005-08-16 Renesas Technology Corp. Semiconductor device with dummy gate electrode
US20050056881A1 (en) * 2003-09-15 2005-03-17 Yee-Chia Yeo Dummy pattern for silicide gate electrode
US7109532B1 (en) * 2003-12-23 2006-09-19 Lee Zachary K High Ion/Ioff SOI MOSFET using body voltage control
DE102004048096A1 (de) * 2004-09-30 2006-04-27 Forschungszentrum Jülich GmbH Verfahren zur Herstellung einer verspannten Schicht auf einem Substrat und Schichtstruktur
JP5172083B2 (ja) * 2004-10-18 2013-03-27 ルネサスエレクトロニクス株式会社 半導体装置及びその製造方法、並びにメモリ回路
US7883979B2 (en) * 2004-10-26 2011-02-08 Taiwan Semiconductor Manufacturing Company, Ltd. Method for manufacturing a semiconductor device with reduced floating body effect
US20060091423A1 (en) * 2004-10-29 2006-05-04 Peter Poechmueller Layer fill for homogenous technology processing
KR100641555B1 (ko) * 2004-12-30 2006-10-31 동부일렉트로닉스 주식회사 트랜치 소스 구조를 갖는 수평형 디모스 트랜지스터
JP5091462B2 (ja) * 2006-01-19 2012-12-05 パナソニック株式会社 セルおよび半導体装置
US20090087956A1 (en) * 2007-09-27 2009-04-02 Texas Instruments Incorporated Dummy Contact Fill to Improve Post Contact Chemical Mechanical Polish Topography
KR100967037B1 (ko) * 2007-10-17 2010-06-29 주식회사 하이닉스반도체 퓨즈 박스 및 그 형성 방법
US7880229B2 (en) * 2007-10-18 2011-02-01 Globalfoundries Inc. Body tie test structure for accurate body effect measurement
US7994577B2 (en) * 2008-07-18 2011-08-09 Taiwan Semiconductor Manufacturing Company, Ltd. ESD protection structures on SOI substrates
CN101872737A (zh) * 2010-01-28 2010-10-27 中国科学院上海微系统与信息技术研究所 一种抑制soi浮体效应的mos结构及其制作方法
US8598656B2 (en) * 2010-03-08 2013-12-03 Taiwan Semiconductor Manufacturing Company, Ltd. Method and apparatus of forming ESD protection device
KR101804420B1 (ko) * 2010-06-14 2018-01-11 삼성전자주식회사 반도체 소자 및 그 제조 방법
US8217464B2 (en) * 2010-08-06 2012-07-10 Altera Corporation N-well/P-well strap structures
JP2011146733A (ja) * 2011-03-18 2011-07-28 Renesas Electronics Corp 半導体装置の製造方法
US8765607B2 (en) * 2011-06-01 2014-07-01 Freescale Semiconductor, Inc. Active tiling placement for improved latch-up immunity
US8796855B2 (en) 2012-01-13 2014-08-05 Freescale Semiconductor, Inc. Semiconductor devices with nonconductive vias
US9143123B2 (en) * 2012-07-10 2015-09-22 Infineon Technologies Ag RF switch, mobile communication device and method for switching an RF signal
CN105633134B (zh) * 2014-10-28 2019-08-27 中芯国际集成电路制造(上海)有限公司 半导体栅极版图及其修正方法、半导体结构形成方法
FR3036846B1 (fr) * 2015-05-29 2018-06-15 Stmicroelectronics (Crolles 2) Sas Procede d'isolation locale entre des transistors realises sur un substrat soi, en particulier fdsoi, et circuit integre correspondant
KR102420539B1 (ko) * 2015-08-26 2022-07-14 에스케이하이닉스 주식회사 반도체 장치
US10249621B2 (en) * 2016-12-15 2019-04-02 Texas Instruments Incorporated Dummy contacts to mitigate plasma charging damage to gate dielectrics
KR101927667B1 (ko) * 2018-03-15 2018-12-10 한국과학기술원 단일 사건 현상과 누적 이온화 현상에 강인한 내방사선 단위 모스펫

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US5463238A (en) * 1992-02-25 1995-10-31 Seiko Instruments Inc. CMOS structure with parasitic channel prevention
JPH0832039A (ja) 1994-07-12 1996-02-02 Nippondenso Co Ltd 半導体装置およびその製造方法
US5910017A (en) * 1996-02-21 1999-06-08 Texas Instruments Incorporated Increasing uniformity in a refill layer thickness for a semiconductor device
US5767549A (en) * 1996-07-03 1998-06-16 International Business Machines Corporation SOI CMOS structure
JPH1041406A (ja) * 1996-07-18 1998-02-13 Mitsubishi Electric Corp 半導体装置
DE69738012T2 (de) * 1996-11-26 2007-12-13 Matsushita Electric Industrial Co., Ltd., Kadoma Halbleitervorrichtung und deren Herstellungsverfahren
JP3648343B2 (ja) * 1997-01-14 2005-05-18 株式会社東芝 半導体装置
JP3371756B2 (ja) 1997-05-16 2003-01-27 株式会社デンソー 半導体基板の製造方法
JPH1154758A (ja) * 1997-08-01 1999-02-26 Hitachi Ltd 半導体集積回路装置およびその製造方法
JPH11204801A (ja) * 1997-11-13 1999-07-30 Seiko Epson Corp 半導体装置
JP4158219B2 (ja) * 1998-02-27 2008-10-01 株式会社デンソー 半導体装置の製造方法
US6020616A (en) * 1998-03-31 2000-02-01 Vlsi Technology, Inc. Automated design of on-chip capacitive structures for suppressing inductive noise
JPH11317528A (ja) * 1998-05-07 1999-11-16 Hitachi Ltd 半導体集積回路装置およびその製造方法
KR100296130B1 (ko) * 1998-06-29 2001-08-07 박종섭 이중막 실리콘웨이퍼를 이용한 금속-산화막-반도체 전계효과트랜지스터 제조방법
KR100272166B1 (ko) * 1998-06-30 2000-11-15 윤종용 소자분리영역에 형성된 더미 도전층을 갖춘반도체소자 및 그제조방법
JP4540146B2 (ja) * 1998-12-24 2010-09-08 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP2000216388A (ja) * 1999-01-21 2000-08-04 Mitsubishi Electric Corp 半導体装置
JP2001077368A (ja) * 1999-09-03 2001-03-23 Mitsubishi Electric Corp 半導体装置及びその製造方法
US6281593B1 (en) * 1999-12-06 2001-08-28 International Business Machines Corporation SOI MOSFET body contact and method of fabrication

Also Published As

Publication number Publication date
FR2807211A1 (fr) 2001-10-05
JP4698793B2 (ja) 2011-06-08
KR100373287B1 (ko) 2003-02-25
JP2001284599A (ja) 2001-10-12
DE10059620A1 (de) 2001-10-18
US6455894B1 (en) 2002-09-24
KR20010096517A (ko) 2001-11-07
TW477067B (en) 2002-02-21

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Legal Events

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Effective date: 20140731