FR2764115B1 - Dispositif semiconducteur et procede de connexion des fils internes de masse d'un tel dispositif - Google Patents

Dispositif semiconducteur et procede de connexion des fils internes de masse d'un tel dispositif

Info

Publication number
FR2764115B1
FR2764115B1 FR9706748A FR9706748A FR2764115B1 FR 2764115 B1 FR2764115 B1 FR 2764115B1 FR 9706748 A FR9706748 A FR 9706748A FR 9706748 A FR9706748 A FR 9706748A FR 2764115 B1 FR2764115 B1 FR 2764115B1
Authority
FR
France
Prior art keywords
ground wires
internal ground
semiconductor device
connecting internal
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9706748A
Other languages
English (en)
French (fr)
Other versions
FR2764115A1 (fr
Inventor
Michel Champagne
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
SGS Thomson Microelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SGS Thomson Microelectronics SA filed Critical SGS Thomson Microelectronics SA
Priority to FR9706748A priority Critical patent/FR2764115B1/fr
Priority to US09/076,257 priority patent/US6075282A/en
Priority to EP98401260A priority patent/EP0883181A1/fr
Priority to JP10151092A priority patent/JP2926078B2/ja
Publication of FR2764115A1 publication Critical patent/FR2764115A1/fr
Application granted granted Critical
Publication of FR2764115B1 publication Critical patent/FR2764115B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
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Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
FR9706748A 1997-06-02 1997-06-02 Dispositif semiconducteur et procede de connexion des fils internes de masse d'un tel dispositif Expired - Fee Related FR2764115B1 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
FR9706748A FR2764115B1 (fr) 1997-06-02 1997-06-02 Dispositif semiconducteur et procede de connexion des fils internes de masse d'un tel dispositif
US09/076,257 US6075282A (en) 1997-06-02 1998-05-12 Leadframe for a semiconductor device and associated method
EP98401260A EP0883181A1 (fr) 1997-06-02 1998-05-27 Dispositif semi-conducteur et procédé de connexion des fils internes de masse d'un tel dispositif
JP10151092A JP2926078B2 (ja) 1997-06-02 1998-06-01 半導体装置および半導体装置の内部アース線を接続する方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9706748A FR2764115B1 (fr) 1997-06-02 1997-06-02 Dispositif semiconducteur et procede de connexion des fils internes de masse d'un tel dispositif

Publications (2)

Publication Number Publication Date
FR2764115A1 FR2764115A1 (fr) 1998-12-04
FR2764115B1 true FR2764115B1 (fr) 2001-06-08

Family

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Family Applications (1)

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FR9706748A Expired - Fee Related FR2764115B1 (fr) 1997-06-02 1997-06-02 Dispositif semiconducteur et procede de connexion des fils internes de masse d'un tel dispositif

Country Status (4)

Country Link
US (1) US6075282A (ja)
EP (1) EP0883181A1 (ja)
JP (1) JP2926078B2 (ja)
FR (1) FR2764115B1 (ja)

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JP3062691B1 (ja) * 1999-02-26 2000-07-12 株式会社三井ハイテック 半導体装置
TW447096B (en) * 2000-04-01 2001-07-21 Siliconware Precision Industries Co Ltd Semiconductor packaging with exposed die
US6249434B1 (en) * 2000-06-20 2001-06-19 Adc Telecommunications, Inc. Surface mounted conduction heat sink
JP2002076228A (ja) * 2000-09-04 2002-03-15 Dainippon Printing Co Ltd 樹脂封止型半導体装置
JP4523138B2 (ja) * 2000-10-06 2010-08-11 ローム株式会社 半導体装置およびそれに用いるリードフレーム
DE10107552A1 (de) * 2001-02-17 2002-09-05 Atmel Germany Gmbh Leiterstreifenanordnung
JP3436253B2 (ja) * 2001-03-01 2003-08-11 松下電器産業株式会社 樹脂封止型半導体装置およびその製造方法
SG157957A1 (en) * 2003-01-29 2010-01-29 Interplex Qlp Inc Package for integrated circuit die
JP4570868B2 (ja) * 2003-12-26 2010-10-27 ルネサスエレクトロニクス株式会社 半導体装置
US8536688B2 (en) * 2004-05-25 2013-09-17 Stats Chippac Ltd. Integrated circuit leadframe and fabrication method therefor
US20070176271A1 (en) * 2006-02-01 2007-08-02 Stats Chippac Ltd. Integrated circuit package system having die-attach pad with elevated bondline thickness
US7977773B1 (en) * 2006-07-17 2011-07-12 Marvell International Ltd. Leadframe including die paddle apertures for reducing delamination
JP5448727B2 (ja) 2009-11-05 2014-03-19 ルネサスエレクトロニクス株式会社 半導体装置及びその製造方法
US8581382B2 (en) * 2010-06-18 2013-11-12 Stats Chippac Ltd. Integrated circuit packaging system with leadframe and method of manufacture thereof
CN112216658A (zh) * 2019-07-10 2021-01-12 恩智浦美国有限公司 具有适应各种管芯尺寸的引线框架的半导体器件

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EP0883181A1 (fr) 1998-12-09
JPH1174303A (ja) 1999-03-16
FR2764115A1 (fr) 1998-12-04
JP2926078B2 (ja) 1999-07-28
US6075282A (en) 2000-06-13

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