FR2764115B1 - Dispositif semiconducteur et procede de connexion des fils internes de masse d'un tel dispositif - Google Patents

Dispositif semiconducteur et procede de connexion des fils internes de masse d'un tel dispositif

Info

Publication number
FR2764115B1
FR2764115B1 FR9706748A FR9706748A FR2764115B1 FR 2764115 B1 FR2764115 B1 FR 2764115B1 FR 9706748 A FR9706748 A FR 9706748A FR 9706748 A FR9706748 A FR 9706748A FR 2764115 B1 FR2764115 B1 FR 2764115B1
Authority
FR
France
Prior art keywords
ground wires
internal ground
semiconductor device
connecting internal
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9706748A
Other languages
English (en)
French (fr)
Other versions
FR2764115A1 (fr
Inventor
Michel Champagne
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
SGS Thomson Microelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SGS Thomson Microelectronics SA filed Critical SGS Thomson Microelectronics SA
Priority to FR9706748A priority Critical patent/FR2764115B1/fr
Priority to US09/076,257 priority patent/US6075282A/en
Priority to EP98401260A priority patent/EP0883181A1/fr
Priority to JP10151092A priority patent/JP2926078B2/ja
Publication of FR2764115A1 publication Critical patent/FR2764115A1/fr
Application granted granted Critical
Publication of FR2764115B1 publication Critical patent/FR2764115B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
    • H01L23/4334—Auxiliary members in encapsulations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49503—Lead-frames or other flat leads characterised by the die pad
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05553—Shape in top view being rectangular
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05639—Silver [Ag] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05647—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601—Structure
    • H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48253—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a potential ring of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48257—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01047—Silver [Ag]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01058—Cerium [Ce]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
FR9706748A 1997-06-02 1997-06-02 Dispositif semiconducteur et procede de connexion des fils internes de masse d'un tel dispositif Expired - Fee Related FR2764115B1 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
FR9706748A FR2764115B1 (fr) 1997-06-02 1997-06-02 Dispositif semiconducteur et procede de connexion des fils internes de masse d'un tel dispositif
US09/076,257 US6075282A (en) 1997-06-02 1998-05-12 Leadframe for a semiconductor device and associated method
EP98401260A EP0883181A1 (fr) 1997-06-02 1998-05-27 Dispositif semi-conducteur et procédé de connexion des fils internes de masse d'un tel dispositif
JP10151092A JP2926078B2 (ja) 1997-06-02 1998-06-01 半導体装置および半導体装置の内部アース線を接続する方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9706748A FR2764115B1 (fr) 1997-06-02 1997-06-02 Dispositif semiconducteur et procede de connexion des fils internes de masse d'un tel dispositif

Publications (2)

Publication Number Publication Date
FR2764115A1 FR2764115A1 (fr) 1998-12-04
FR2764115B1 true FR2764115B1 (fr) 2001-06-08

Family

ID=9507486

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9706748A Expired - Fee Related FR2764115B1 (fr) 1997-06-02 1997-06-02 Dispositif semiconducteur et procede de connexion des fils internes de masse d'un tel dispositif

Country Status (4)

Country Link
US (1) US6075282A (ja)
EP (1) EP0883181A1 (ja)
JP (1) JP2926078B2 (ja)
FR (1) FR2764115B1 (ja)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3062691B1 (ja) * 1999-02-26 2000-07-12 株式会社三井ハイテック 半導体装置
TW447096B (en) * 2000-04-01 2001-07-21 Siliconware Precision Industries Co Ltd Semiconductor packaging with exposed die
US6249434B1 (en) * 2000-06-20 2001-06-19 Adc Telecommunications, Inc. Surface mounted conduction heat sink
JP2002076228A (ja) * 2000-09-04 2002-03-15 Dainippon Printing Co Ltd 樹脂封止型半導体装置
JP4523138B2 (ja) 2000-10-06 2010-08-11 ローム株式会社 半導体装置およびそれに用いるリードフレーム
DE10107552A1 (de) * 2001-02-17 2002-09-05 Atmel Germany Gmbh Leiterstreifenanordnung
JP3436253B2 (ja) * 2001-03-01 2003-08-11 松下電器産業株式会社 樹脂封止型半導体装置およびその製造方法
SG157957A1 (en) * 2003-01-29 2010-01-29 Interplex Qlp Inc Package for integrated circuit die
JP4570868B2 (ja) * 2003-12-26 2010-10-27 ルネサスエレクトロニクス株式会社 半導体装置
US8536688B2 (en) * 2004-05-25 2013-09-17 Stats Chippac Ltd. Integrated circuit leadframe and fabrication method therefor
US20070176271A1 (en) * 2006-02-01 2007-08-02 Stats Chippac Ltd. Integrated circuit package system having die-attach pad with elevated bondline thickness
US7977773B1 (en) * 2006-07-17 2011-07-12 Marvell International Ltd. Leadframe including die paddle apertures for reducing delamination
JP5448727B2 (ja) * 2009-11-05 2014-03-19 ルネサスエレクトロニクス株式会社 半導体装置及びその製造方法
US8581382B2 (en) * 2010-06-18 2013-11-12 Stats Chippac Ltd. Integrated circuit packaging system with leadframe and method of manufacture thereof
CN112216658A (zh) * 2019-07-10 2021-01-12 恩智浦美国有限公司 具有适应各种管芯尺寸的引线框架的半导体器件

Family Cites Families (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58143558A (ja) * 1982-02-22 1983-08-26 Toshiba Corp 半導体装置
US4862246A (en) * 1984-09-26 1989-08-29 Hitachi, Ltd. Semiconductor device lead frame with etched through holes
JPS62112356A (ja) * 1985-11-11 1987-05-23 Furukawa Electric Co Ltd:The リ−ドフレ−ム
JPH07120743B2 (ja) * 1988-07-07 1995-12-20 株式会社三井ハイテック 半導体装置用リードフレーム
US5291060A (en) * 1989-10-16 1994-03-01 Shinko Electric Industries Co., Ltd. Lead frame and semiconductor device using same
JPH0437050A (ja) * 1990-05-31 1992-02-07 Hitachi Ltd 樹脂封止型半導体装置
US5202288A (en) * 1990-06-01 1993-04-13 Robert Bosch Gmbh Method of manufacturing an electronic circuit component incorporating a heat sink
DE4021871C2 (de) * 1990-07-09 1994-07-28 Lsi Logic Products Gmbh Hochintegriertes elektronisches Bauteil
US5200809A (en) * 1991-09-27 1993-04-06 Vlsi Technology, Inc. Exposed die-attach heatsink package
JPH05121632A (ja) * 1991-10-25 1993-05-18 Nec Corp 半導体装置
JPH05152488A (ja) * 1991-11-30 1993-06-18 Nec Corp 樹脂封止型半導体装置
US5376756A (en) * 1991-12-20 1994-12-27 Vlsi Technology, Inc. Wire support and guide
JPH05243474A (ja) * 1992-02-28 1993-09-21 Toshiba Corp 半導体装置
JPH06120374A (ja) * 1992-03-31 1994-04-28 Amkor Electron Inc 半導体パッケージ構造、半導体パッケージ方法及び半導体パッケージ用放熱板
US5378924A (en) * 1992-09-10 1995-01-03 Vlsi Technology, Inc. Apparatus for thermally coupling a heat sink to a lead frame
US5397917A (en) * 1993-04-26 1995-03-14 Motorola, Inc. Semiconductor package capable of spreading heat
JPH06334105A (ja) * 1993-05-24 1994-12-02 Shinko Electric Ind Co Ltd 多層リードフレーム
US5430331A (en) * 1993-06-23 1995-07-04 Vlsi Technology, Inc. Plastic encapsulated integrated circuit package having an embedded thermal dissipator
US5489805A (en) * 1993-12-29 1996-02-06 Intel Corporation Slotted thermal dissipater for a semiconductor package
DE69531126T2 (de) * 1994-04-22 2004-05-06 Nec Corp. Trägerelement für Kühlvorrichtung und elektronisches Gehäuse mit einem solchen Element
KR0128164B1 (ko) * 1994-06-21 1998-04-02 황인길 반도체 패키지용 범용 히트스프레더
JPH0878605A (ja) * 1994-09-01 1996-03-22 Hitachi Ltd リードフレームおよびそれを用いた半導体集積回路装置
US5859477A (en) * 1995-07-10 1999-01-12 International Packaging And Assembly Corporation Apparatus for encapsulating IC packages with diamond substrate thermal conductor
US5683944A (en) * 1995-09-01 1997-11-04 Motorola, Inc. Method of fabricating a thermally enhanced lead frame
US5672547A (en) * 1996-01-31 1997-09-30 Industrial Technology Research Institute Method for bonding a heat sink to a die paddle
JP3168901B2 (ja) * 1996-02-22 2001-05-21 株式会社日立製作所 パワー半導体モジュール
US5872395A (en) * 1996-09-16 1999-02-16 International Packaging And Assembly Corporation Bent tip method for preventing vertical motion of heat spreaders during injection molding of IC packages
US5869883A (en) * 1997-09-26 1999-02-09 Stanley Wang, President Pantronix Corp. Packaging of semiconductor circuit in pre-molded plastic package
US5929514A (en) * 1998-05-26 1999-07-27 Analog Devices, Inc. Thermally enhanced lead-under-paddle I.C. leadframe

Also Published As

Publication number Publication date
US6075282A (en) 2000-06-13
JP2926078B2 (ja) 1999-07-28
FR2764115A1 (fr) 1998-12-04
EP0883181A1 (fr) 1998-12-09
JPH1174303A (ja) 1999-03-16

Similar Documents

Publication Publication Date Title
FR2764115B1 (fr) Dispositif semiconducteur et procede de connexion des fils internes de masse d'un tel dispositif
FR2736205B1 (fr) Dispositif detecteur a semiconducteur et son procede de formation
EP0734065A3 (en) Semiconductor device having a chip size
EP0740340A3 (en) Structure and method of mounting a semiconductor device
FR2736240B1 (fr) Repondeur d'identification pouvant etre implante et procede de montage ameliore
EP0723303A3 (en) Semiconductor light-emitting device and manufacturing method
FR2740324B1 (fr) Dispositif d'ancrage ligamentaire
KR970004015A (ko) 반도체장치 및 그의 제조방법
GB2307595B (en) Optical semiconductor device and method of manufacturing thereof
DE69637900D1 (de) Harzvergossenes Halbleiterbauteil und dessen Herstellungsverfahren
FR2746183B1 (fr) Dispositif capteur chimique a semiconducteur et procede de formation d'un dispositif capteur chimique a semiconducteur
EP0740342A3 (en) Semiconductor device and wiring method
GB9626363D0 (en) A method of manufacturing a semiconductor device
DE69633167D1 (de) Vertikales MOS-Halbleiterbauelement
GB2306780B (en) Semiconductor device and method of manufacture
GB9612263D0 (en) Semiconductor device and method of manufacture
GB2307790B (en) Semiconductor device and method of manufacture
GB2300517B (en) Method of manufacturing a semiconductor device
FR2738695B1 (fr) Procede et dispositif d'identification adaptative et annuleur d'echo adaptatif incluant un tel dispositif
KR970004171A (ko) 반도체장치 및 그 제조방법
FR2755557B1 (fr) Dispositif et procede de communication permettant une datation precise d'evenements
FR2757682B1 (fr) Procede et dispositif de connexion d'un composant semiconducteur sur un substrat equipe de conducteurs
FR2771541B1 (fr) Procede et dispositif d'insonorisation active
GB9608881D0 (en) Transistor structure of semiconductor device
KR970003997A (ko) 반도체소자의 캐패시터 형성방법

Legal Events

Date Code Title Description
CD Change of name or company name
ST Notification of lapse

Effective date: 20060228