JP5448727B2 - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法 Download PDFInfo
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- JP5448727B2 JP5448727B2 JP2009253999A JP2009253999A JP5448727B2 JP 5448727 B2 JP5448727 B2 JP 5448727B2 JP 2009253999 A JP2009253999 A JP 2009253999A JP 2009253999 A JP2009253999 A JP 2009253999A JP 5448727 B2 JP5448727 B2 JP 5448727B2
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- bonding
- bonding wire
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- power supply
- lead
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Description
図1は本発明の実施の形態1の半導体装置の構造の一例を封止体を透過して示す部分平面図、図2は図1のA−A線に沿って切断した構造の一例を示す部分断面図、図3は図1に示す半導体装置における特徴部分の概略構造の一例を示す部分平面図である。また、図4は図1に示す半導体装置の構造の一例を封止体を透過して示す平面図、図5は図4に示すB部の構造の一例を示す拡大部分平面図、図6は図4に示す半導体装置に組み込まれた過電流保護回路の一例を示す回路ブロック図である。
図19は本発明の実施の形態2の半導体装置の組み立てのワイヤボンディング工程で用いられるワイヤボンダの構造の一例を示す正面図、図20は本発明の実施の形態2の半導体装置の組み立てのワイヤボンディング工程で用いられるワイヤボンディング条件を導き出すための基準タクトの各時間の一例を示す実測値データ図である。さらに、図21は本発明の実施の形態2の半導体装置の組み立てのワイヤボンディング工程で用いられるワイヤボンディング条件を導き出すためのタクト計算の一例を示す計算値データ図、図22は本発明の実施の形態2の半導体装置の組み立てのワイヤボンディング工程で用いられるワイヤボンディング条件を導き出すためのタクトダウン率抑制を考慮したタクト計算の一例を示す計算値データ図である。
2 リードフレーム
2a インナリード(リード)
2b アウタリード
2c ダイパッド(チップ搭載部)
2d GND用リード(第1電源リード、第1リード)
2e 電源用リード(第2電源リード)
2f 第1出力リード
2g 吊りリード
2h 第2出力リード
3 半導体チップ
3a 主面
3b 裏面
3c 電極パッド
3d GND用電極パッド(第1電源用電極パッド、第1電極パッド)
3e 電源用電極パッド(第2電源用電極パッド)
3f GNDモニタ用電極パッド(第1モニタ用電極パッド、第2電極パッド)
3g 電源モニタ用電極パッド(第2モニタ用電極パッド)
3h 第1出力信号パッド
3i 第2出力信号パッド
3j 出力回路
3k 出力制御回路(制御回路)
3m 第1出力トランジスタ
3n 第2出力トランジスタ
3p 第1比較器
3q 第2比較器
4 ダイボンド材
5 樹脂封止体
6 ボンディングワイヤ
6a 第1ボンディングワイヤ
6b 第2ボンディングワイヤ
6c 第3ボンディングワイヤ
6d 第4ボンディングワイヤ
6e,6f 第5ボンディングワイヤ
6g ボール状電極
6h,6j 一端部
6i,6k 他端部
7 キャピラリ
8 モールド金型
8a 上型
8b 下型
8c キャビティ
8d 樹脂注入ゲート
9 封止用樹脂
9a レジン流動方向
10 QFP(半導体装置)
11 ワイヤボンダ
11a ボンディングヘッド
11b フィーダ
11c 主搬送レール
Claims (11)
- 複数の電極パッドを有する半導体チップと、
前記半導体チップの周囲に配置された複数のリードと、
前記複数の電極パッドと前記複数のリードとを電気的に接続する複数のボンディングワイヤと、
前記半導体チップ、前記複数のボンディングワイヤ及び前記複数のリードの一部を封止する樹脂封止体と、
を有し、
前記複数のリードは、前記半導体チップに第1動作電位を供給するための第1電源リードを有し、
前記複数の電極パッドは、前記第1電源リードと第1ボンディングワイヤを介して電気的に接続された第1電源用電極パッドと、前記第1電源リードと第2ボンディングワイヤを介して電気的に接続され、かつ、前記第1電源リードの電位をモニタするための第1モニタ用電極パッドとを有し、
前記第2ボンディングワイヤは、前記第1ボンディングワイヤより細く、
前記複数のリードは、前記半導体チップに前記第1動作電位より高い第2動作電位を供給するための第2電源リードを有し、
前記複数の電極パッドは、前記第2電源リードと第3ボンディングワイヤを介して電気的に接続された第2電源用電極パッドと、前記第2電源リードと第4ボンディングワイヤを介して電気的に接続され、かつ、前記第2電源リードの電位をモニタするための第2モニタ用電極パッドとを有し、
前記第4ボンディングワイヤは、前記第3ボンディングワイヤより細く、
前記半導体チップは、負荷となる外部デバイスを駆動する電流を出力するための出力回路と、前記出力回路から出力される前記電流を制御するための制御回路とを有し、
前記複数の電極パッドは、前記出力回路の出力端子として用いられる出力信号パッドを有し、
前記出力回路は、前記第1電源用電極パッド及び前記第2電源用電極パッドから供給される前記第1及び第2動作電位により動作し、
前記制御回路は、前記第1モニタ用電極パッド及び前記第2モニタ用電極パッドから供給される所定の信号に基づいて、前記出力回路の前記出力を制御する、半導体装置。 - 請求項1において、前記複数のリードは、前記出力信号パッドに第5ボンディングワイヤを介して電気的に接続された出力リードを有する、半導体装置。
- 複数の電極パッドを有する半導体チップと、
前記半導体チップの周囲に配置された複数のリードと、
前記複数の電極パッドと前記複数のリードとを電気的に接続する複数のボンディングワイヤと、
前記半導体チップ、前記複数のボンディングワイヤ及び前記複数のリードの一部を封止する樹脂封止体と、
を有し、
前記複数のリードは、前記半導体チップに第1動作電位を供給するための第1電源リードを有し、
前記複数の電極パッドは、前記第1電源リードと第1ボンディングワイヤを介して電気的に接続された第1電源用電極パッドと、前記第1電源リードと第2ボンディングワイヤを介して電気的に接続され、かつ、前記第1電源リードの電位をモニタするための第1モニタ用電極パッドとを有し、
前記第2ボンディングワイヤは、前記第1ボンディングワイヤより細く、
前記複数のリードは、前記半導体チップに前記第1動作電位より高い第2動作電位を供給するための第2電源リードを有し、
前記複数の電極パッドは、前記第2電源リードと第3ボンディングワイヤを介して電気的に接続された第2電源用電極パッドと、前記第2電源リードと第4ボンディングワイヤを介して電気的に接続され、かつ、前記第2電源リードの電位をモニタするための第2モニタ用電極パッドとを有し、
前記第4ボンディングワイヤは、前記第3ボンディングワイヤより細く、
前記第2電源リードにおける前記第4ボンディングワイヤとの接続位置は、前記第2電源リードにおける前記第3ボンディングワイヤとの接続位置に比べて前記第2電源リードのチップ側の先端部もしくは前記半導体チップの外周部から遠い位置である、半導体装置。 - 請求項3において、前記第4ボンディングワイヤのループ高さは、前記第3ボンディングワイヤのループ高さより高い、半導体装置。
- 請求項1または3において、前記第1動作電位は、接地電位であり、前記第2動作電位は、電源電位である、半導体装置。
- 請求項1または3において、前記半導体チップは、前記複数のリードと同一の材料で形成されたチップ搭載部上に搭載され、前記第1電源リードは、前記チップ搭載部と連続して一体に形成されている、半導体装置。
- 複数の電極パッドを有する半導体チップと、
前記半導体チップの周囲に配置された複数のリードと、
前記複数の電極パッドと前記複数のリードとを電気的に接続する複数のボンディングワイヤと、
前記半導体チップ、前記複数のボンディングワイヤ及び前記複数のリードの一部を封止する樹脂封止体と、
を有し、
前記複数のリードは、前記半導体チップに第1動作電位を供給するための第1電源リードを有し、
前記複数の電極パッドは、前記第1電源リードと第1ボンディングワイヤを介して電気的に接続された第1電源用電極パッドと、前記第1電源リードと第2ボンディングワイヤを介して電気的に接続され、かつ、前記第1電源リードの電位をモニタするための第1モニタ用電極パッドとを有し、
前記第2ボンディングワイヤは、前記第1ボンディングワイヤより細く、
前記第1電源リードにおける前記第2ボンディングワイヤとの接続位置は、前記第1電源リードにおける前記第1ボンディングワイヤとの接続位置に比べて前記第1電源リードのチップ側の先端部もしくは前記半導体チップの外周部から遠い位置である、半導体装置。 - 請求項7において、前記第2ボンディングワイヤのループ高さは、前記第1ボンディングワイヤのループ高さより高い、半導体装置。
- チップ搭載部と前記チップ搭載部の周囲に配置された複数のリードを有するリードフレームを準備する工程と、
前記リードフレームの前記チップ搭載部上に、複数の電極パッドを有する半導体チップを搭載する工程と、
前記複数のリードと前記半導体チップの前記複数の電極パッドとを複数のボンディングワイヤにより電気的に接続する工程と、
前記半導体チップ、前記複数のボンディングワイヤ及び前記複数のリードの一部を封止する樹脂封止体を形成する工程と、
を有し、
前記複数のボンディングワイヤは、
一端部が前記複数の電極パッドの中の第1電極パッドに接続され、他端部が前記複数のリードの中の第1リードに接続された第1ボンディングワイヤと、
一端部が前記複数の電極パッドの中の第2電極パッドに接続され、他端部が前記第1リードに接続され、かつ、前記第1ボンディングワイヤより細い第2ボンディングワイヤを有し、
前記第2ボンディングワイヤは、前記第1ボンディングワイヤより後に、形成され、
前記第1及び第2ボンディングワイヤを含む前記複数のボンディングワイヤは、キャピラリの先端にボール状電極を形成するボールボンディング法により形成され、前記第1及び第2ボンディングワイヤの各々の他端部は、前記ボール状電極の反対側の部分であり、
前記第2ボンディングワイヤの前記他端部は、前記第1ボンディングワイヤの他端部より前記半導体チップから離れた位置において前記第1リードに接続される、半導体装置の製造方法。 - チップ搭載部と前記チップ搭載部の周囲に配置された複数のリードを有するリードフレームを準備する工程と、
前記リードフレームの前記チップ搭載部上に、複数の電極パッドを有する半導体チップを搭載する工程と、
前記複数のリードと前記半導体チップの前記複数の電極パッドとを複数のボンディングワイヤにより電気的に接続する工程と、
前記半導体チップ、前記複数のボンディングワイヤ及び前記複数のリードの一部を封止する樹脂封止体を形成する工程と、
を有し、
前記複数のボンディングワイヤは、
一端部が前記複数の電極パッドの中の第1電極パッドに接続され、他端部が前記複数のリードの中の第1リードに接続された第1ボンディングワイヤと、
一端部が前記複数の電極パッドの中の第2電極パッドに接続され、他端部が前記第1リードに接続され、かつ、前記第1ボンディングワイヤより細い第2ボンディングワイヤを有し、
前記第2ボンディングワイヤは、前記第1ボンディングワイヤより後に、形成され、
前記樹脂封止体は、樹脂注入ゲートを有するモールド金型を用いたトランスファモールド法で形成され、
前記第2ボンディングワイヤの位置は、前記第1ボンディングワイヤの位置より、前記樹脂注入ゲートから離れた位置に配置されている、半導体装置の製造方法。 - 請求項10において、前記第1リードは、前記半導体チップに動作電位を供給するための電源リードであり、前記第1電極パッドは、電源用電極パッドであり、前記第2電極パッドは、前記電源リードの電位をモニタするためのモニタ用電極パッドである、半導体装置の製造方法。
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CN201510101284.8A CN104681524A (zh) | 2009-11-05 | 2010-11-04 | 半导体器件及其制造方法 |
CN201510100814.7A CN105047571A (zh) | 2009-11-05 | 2010-11-04 | 半导体器件及其制造方法 |
CN201010536912.2A CN102097409B (zh) | 2009-11-05 | 2010-11-04 | 半导体器件及其制造方法 |
US13/776,215 US8846455B2 (en) | 2009-11-05 | 2013-02-25 | Semiconductor device and method for manufacturing the same |
US14/467,930 US9040358B2 (en) | 2009-11-05 | 2014-08-25 | Semiconductor device and method for manufacturing the same |
US14/703,596 US20150235926A1 (en) | 2009-11-05 | 2015-05-04 | Semiconductor device and method for manufacturing the same |
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