FR2689295B1 - Memoire morte programmable effacable electriquement munie d'un circuit de controle et de correction d'erreur. - Google Patents

Memoire morte programmable effacable electriquement munie d'un circuit de controle et de correction d'erreur.

Info

Publication number
FR2689295B1
FR2689295B1 FR9214328A FR9214328A FR2689295B1 FR 2689295 B1 FR2689295 B1 FR 2689295B1 FR 9214328 A FR9214328 A FR 9214328A FR 9214328 A FR9214328 A FR 9214328A FR 2689295 B1 FR2689295 B1 FR 2689295B1
Authority
FR
France
Prior art keywords
memory
memory array
page buffer
bit lines
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9214328A
Other languages
English (en)
French (fr)
Other versions
FR2689295A1 (fr
Inventor
Jin-Ki Kim
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of FR2689295A1 publication Critical patent/FR2689295A1/fr
Application granted granted Critical
Publication of FR2689295B1 publication Critical patent/FR2689295B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1076—Parity data used in redundant arrays of independent storages, e.g. in RAID systems

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Read Only Memory (AREA)
  • Detection And Correction Of Errors (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
FR9214328A 1992-03-30 1992-11-27 Memoire morte programmable effacable electriquement munie d'un circuit de controle et de correction d'erreur. Expired - Fee Related FR2689295B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019920005284A KR950003013B1 (ko) 1992-03-30 1992-03-30 틀림정정회로를 가지는 이이피롬

Publications (2)

Publication Number Publication Date
FR2689295A1 FR2689295A1 (fr) 1993-10-01
FR2689295B1 true FR2689295B1 (fr) 1996-12-27

Family

ID=19331104

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9214328A Expired - Fee Related FR2689295B1 (fr) 1992-03-30 1992-11-27 Memoire morte programmable effacable electriquement munie d'un circuit de controle et de correction d'erreur.

Country Status (9)

Country Link
US (1) US5448578A (US20100012521A1-20100121-C00001.png)
JP (1) JP2525112B2 (US20100012521A1-20100121-C00001.png)
KR (1) KR950003013B1 (US20100012521A1-20100121-C00001.png)
CN (1) CN1035698C (US20100012521A1-20100121-C00001.png)
DE (1) DE4242810C2 (US20100012521A1-20100121-C00001.png)
FR (1) FR2689295B1 (US20100012521A1-20100121-C00001.png)
GB (1) GB2265738B (US20100012521A1-20100121-C00001.png)
IT (1) IT1256497B (US20100012521A1-20100121-C00001.png)
TW (1) TW272286B (US20100012521A1-20100121-C00001.png)

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DE69622149T2 (de) * 1996-03-21 2002-11-28 St Microelectronics Srl Verfahren zur Wiederherstellung fehlerhafter Speichereinrichtungen
FR2748134B1 (fr) * 1996-04-30 1998-06-26 Bull Cp8 Procede et dispositif permettant a un programme fige de pouvoir evoluer
US6041423A (en) * 1996-11-08 2000-03-21 Oracle Corporation Method and apparatus for using undo/redo logging to perform asynchronous updates of parity and data pages in a redundant array data storage environment
KR100247064B1 (ko) * 1997-04-10 2000-03-15 윤종용 콤팩트디스크-롬 드라이브의 디코딩장치에서 에러정정을 위한 메모리 리드회로
US5956743A (en) * 1997-08-25 1999-09-21 Bit Microsystems, Inc. Transparent management at host interface of flash-memory overhead-bytes using flash-specific DMA having programmable processor-interrupt of high-level operations
KR100266748B1 (ko) 1997-12-31 2000-10-02 윤종용 반도체 메모리 장치 및 그 장치의 에러 정정 방법
JP4074029B2 (ja) * 1999-06-28 2008-04-09 株式会社東芝 フラッシュメモリ
FR2809222A1 (fr) * 2000-05-17 2001-11-23 St Microelectronics Sa Memoire eeprom comprenant un systeme de correction d'erreur
JP3595495B2 (ja) 2000-07-27 2004-12-02 Ｎｅｃマイクロシステム株式会社 半導体記憶装置
US7042770B2 (en) * 2001-07-23 2006-05-09 Samsung Electronics Co., Ltd. Memory devices with page buffer having dual registers and method of using the same
KR100543447B1 (ko) * 2003-04-03 2006-01-23 삼성전자주식회사 에러정정기능을 가진 플래쉬메모리장치
US7099221B2 (en) 2004-05-06 2006-08-29 Micron Technology, Inc. Memory controller method and system compensating for memory cell data losses
US20060010339A1 (en) 2004-06-24 2006-01-12 Klein Dean A Memory system and method having selective ECC during low power refresh
US7340668B2 (en) 2004-06-25 2008-03-04 Micron Technology, Inc. Low power cost-effective ECC memory system and method
US7116602B2 (en) 2004-07-15 2006-10-03 Micron Technology, Inc. Method and system for controlling refresh to avoid memory cell data losses
US6965537B1 (en) * 2004-08-31 2005-11-15 Micron Technology, Inc. Memory system and method using ECC to achieve low power refresh
KR100680486B1 (ko) * 2005-03-30 2007-02-08 주식회사 하이닉스반도체 향상된 동작 성능을 가지는 플래시 메모리 장치의 페이지버퍼 회로 및 그 독출 및 프로그램 동작 제어 방법
JP2008059711A (ja) * 2006-09-01 2008-03-13 Toshiba Corp 半導体記憶装置
US7836386B2 (en) * 2006-09-27 2010-11-16 Qimonda Ag Phase shift adjusting method and circuit
JP5016888B2 (ja) * 2006-10-04 2012-09-05 株式会社東芝 不揮発性半導体記憶装置
US7894289B2 (en) 2006-10-11 2011-02-22 Micron Technology, Inc. Memory system and method using partial ECC to achieve low power refresh and fast access to data
US7900120B2 (en) 2006-10-18 2011-03-01 Micron Technology, Inc. Memory system and method using ECC with flag bit to identify modified data
KR100799018B1 (ko) * 2006-12-27 2008-01-28 주식회사 하이닉스반도체 불휘발성 메모리 소자 및 자기 보상 방법
KR100888482B1 (ko) 2007-05-11 2009-03-12 삼성전자주식회사 비휘발성 반도체 메모리 장치 및 상기 비휘발성 반도체메모리 장치의 쓰기 방법
KR101678404B1 (ko) * 2010-02-25 2016-11-23 삼성전자주식회사 사전 확률 정보를 사용하는 메모리 시스템 및 그것의 데이터 처리 방법
JP2010231887A (ja) * 2010-07-20 2010-10-14 Toshiba Corp 不揮発性半導体メモリ
US9047953B2 (en) * 2013-08-22 2015-06-02 Macronix International Co., Ltd. Memory device structure with page buffers in a page-buffer level separate from the array level
US9484113B2 (en) * 2014-04-15 2016-11-01 Advanced Micro Devices, Inc. Error-correction coding for hot-swapping semiconductor devices
KR20160125745A (ko) * 2015-04-22 2016-11-01 에스케이하이닉스 주식회사 반도체 장치

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US4410988A (en) * 1978-08-04 1983-10-18 Honeywell Information Systems Inc. Out of cycle error correction apparatus
US4692923A (en) * 1984-09-28 1987-09-08 Ncr Corporation Fault tolerant memory
JPS6221357A (ja) * 1985-07-22 1987-01-29 Toshiba Corp メモリシステム
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JPH01171199A (ja) * 1987-12-25 1989-07-06 Mitsubishi Electric Corp 半導体メモリ
JPH024813A (ja) * 1988-06-24 1990-01-09 Hitachi Ltd 重合性組成物
US4996690A (en) * 1988-08-26 1991-02-26 Stac Electronics Write operation with gating capability
JPH02166700A (ja) * 1988-12-15 1990-06-27 Samsung Electron Co Ltd エラー検査及び訂正装置を内蔵した不揮発性半導体メモリ装置
US5274647A (en) * 1989-02-13 1993-12-28 Kabushiki Kaisha Toshiba Elastic buffer with error detection using a hamming distance circuit
JPH07114077B2 (ja) * 1989-06-01 1995-12-06 三菱電機株式会社 不揮発性半導体記憶装置
JPH0318832A (ja) * 1989-06-15 1991-01-28 Ricoh Co Ltd 有機膜形成方法

Also Published As

Publication number Publication date
ITMI922999A0 (it) 1992-12-31
ITMI922999A1 (it) 1994-07-01
TW272286B (US20100012521A1-20100121-C00001.png) 1996-03-11
CN1077049A (zh) 1993-10-06
DE4242810A1 (de) 1993-10-07
DE4242810C2 (de) 2000-06-08
US5448578A (en) 1995-09-05
GB9227139D0 (en) 1993-02-24
JPH05298895A (ja) 1993-11-12
GB2265738B (en) 1996-01-17
GB2265738A (en) 1993-10-06
IT1256497B (it) 1995-12-07
CN1035698C (zh) 1997-08-20
FR2689295A1 (fr) 1993-10-01
KR950003013B1 (ko) 1995-03-29
KR930020472A (ko) 1993-10-19
JP2525112B2 (ja) 1996-08-14

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Effective date: 20120731