DE69622149T2 - Verfahren zur Wiederherstellung fehlerhafter Speichereinrichtungen - Google Patents

Verfahren zur Wiederherstellung fehlerhafter Speichereinrichtungen

Info

Publication number
DE69622149T2
DE69622149T2 DE69622149T DE69622149T DE69622149T2 DE 69622149 T2 DE69622149 T2 DE 69622149T2 DE 69622149 T DE69622149 T DE 69622149T DE 69622149 T DE69622149 T DE 69622149T DE 69622149 T2 DE69622149 T2 DE 69622149T2
Authority
DE
Germany
Prior art keywords
procedure
storage devices
faulty storage
restoring
restoring faulty
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69622149T
Other languages
English (en)
Other versions
DE69622149D1 (de
Inventor
Maurizio Branchetti
Armando Conci
Carla Golla
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
Original Assignee
STMicroelectronics SRL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SRL filed Critical STMicroelectronics SRL
Application granted granted Critical
Publication of DE69622149D1 publication Critical patent/DE69622149D1/de
Publication of DE69622149T2 publication Critical patent/DE69622149T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1068—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in sector programmable memories, e.g. flash disk

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
DE69622149T 1996-03-21 1996-03-21 Verfahren zur Wiederherstellung fehlerhafter Speichereinrichtungen Expired - Fee Related DE69622149T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP96830136A EP0797147B1 (de) 1996-03-21 1996-03-21 Verfahren zur Wiederherstellung fehlerhafter Speichereinrichtungen

Publications (2)

Publication Number Publication Date
DE69622149D1 DE69622149D1 (de) 2002-08-08
DE69622149T2 true DE69622149T2 (de) 2002-11-28

Family

ID=8225840

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69622149T Expired - Fee Related DE69622149T2 (de) 1996-03-21 1996-03-21 Verfahren zur Wiederherstellung fehlerhafter Speichereinrichtungen

Country Status (3)

Country Link
US (1) US6055665A (de)
EP (1) EP0797147B1 (de)
DE (1) DE69622149T2 (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7590918B2 (en) * 2004-09-10 2009-09-15 Ovonyx, Inc. Using a phase change memory as a high volume memory

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4493081A (en) * 1981-06-26 1985-01-08 Computer Automation, Inc. Dynamic memory with error correction on refresh
JPH01171199A (ja) * 1987-12-25 1989-07-06 Mitsubishi Electric Corp 半導体メモリ
JP2583547B2 (ja) * 1988-01-13 1997-02-19 株式会社日立製作所 半導体メモリ
JPH01201736A (ja) * 1988-02-08 1989-08-14 Mitsubishi Electric Corp マイクロコンピュータ
JP2830308B2 (ja) * 1990-02-26 1998-12-02 日本電気株式会社 情報処理装置
US5287311A (en) * 1991-05-31 1994-02-15 Texas Instruments Incorporated Method and apparatus for implementing ×2 parity DRAM for 16 bit systems from ×4 parity DRAM
JP3067866B2 (ja) * 1991-11-26 2000-07-24 沖電気工業株式会社 半導体記憶装置
JP3070025B2 (ja) * 1992-02-04 2000-07-24 富士通株式会社 半導体記憶装置
KR950003013B1 (ko) * 1992-03-30 1995-03-29 삼성전자 주식회사 틀림정정회로를 가지는 이이피롬
JP2647312B2 (ja) * 1992-09-11 1997-08-27 インターナショナル・ビジネス・マシーンズ・コーポレイション 一括消去型不揮発性半導体記憶装置

Also Published As

Publication number Publication date
US6055665A (en) 2000-04-25
EP0797147B1 (de) 2002-07-03
EP0797147A1 (de) 1997-09-24
DE69622149D1 (de) 2002-08-08

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee