FR2657463B1 - Dispositif semiconducteur avec forte resistance aux surtensions. - Google Patents
Dispositif semiconducteur avec forte resistance aux surtensions.Info
- Publication number
- FR2657463B1 FR2657463B1 FR919100810A FR9100810A FR2657463B1 FR 2657463 B1 FR2657463 B1 FR 2657463B1 FR 919100810 A FR919100810 A FR 919100810A FR 9100810 A FR9100810 A FR 9100810A FR 2657463 B1 FR2657463 B1 FR 2657463B1
- Authority
- FR
- France
- Prior art keywords
- overvoltages
- semiconductor device
- high resistance
- resistance
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7803—Vertical DMOS transistors, i.e. VDMOS transistors structurally associated with at least one other device
- H01L29/7808—Vertical DMOS transistors, i.e. VDMOS transistors structurally associated with at least one other device the other device being a breakdown diode, e.g. Zener diode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0626—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a localised breakdown region, e.g. built-in avalanching region
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
- H01L29/0692—Surface layout
- H01L29/0696—Surface layout of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1095—Body region, i.e. base region, of DMOS transistors or IGBTs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7811—Vertical DMOS transistors, i.e. VDMOS transistors with an edge termination structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/0843—Source or drain regions of field-effect devices
- H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
- H01L29/0852—Source or drain regions of field-effect devices of field-effect transistors with insulated gate of DMOS transistors
- H01L29/0873—Drain regions
- H01L29/0878—Impurity concentration or distribution
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Semiconductor Integrated Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2013613A JP2701502B2 (ja) | 1990-01-25 | 1990-01-25 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2657463A1 FR2657463A1 (fr) | 1991-07-26 |
FR2657463B1 true FR2657463B1 (fr) | 1992-05-15 |
Family
ID=11838080
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR919100810A Expired - Lifetime FR2657463B1 (fr) | 1990-01-25 | 1991-01-24 | Dispositif semiconducteur avec forte resistance aux surtensions. |
Country Status (5)
Country | Link |
---|---|
US (1) | US5184204A (fr) |
JP (1) | JP2701502B2 (fr) |
DE (1) | DE4102192C2 (fr) |
FR (1) | FR2657463B1 (fr) |
GB (1) | GB2240427B (fr) |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5686750A (en) * | 1991-09-27 | 1997-11-11 | Koshiba & Partners | Power semiconductor device having improved reverse recovery voltage |
US5270256A (en) * | 1991-11-27 | 1993-12-14 | Intel Corporation | Method of forming a guard wall to reduce delamination effects |
JP2837033B2 (ja) * | 1992-07-21 | 1998-12-14 | 三菱電機株式会社 | 半導体装置及びその製造方法 |
DE59208987D1 (de) * | 1992-08-10 | 1997-11-27 | Siemens Ag | Leistungs-MOSFET mit verbesserter Avalanche-Festigkeit |
JP3216315B2 (ja) * | 1993-04-02 | 2001-10-09 | 株式会社デンソー | 絶縁ゲート型バイポーラトランジスタ |
US5719412A (en) * | 1993-04-02 | 1998-02-17 | Nippondenso Co., Ltd | Insulated gate bipolar transistor |
US5723882A (en) * | 1994-03-10 | 1998-03-03 | Nippondenso Co., Ltd. | Insulated gate field effect transistor having guard ring regions |
US5731606A (en) * | 1995-05-31 | 1998-03-24 | Shrivastava; Ritu | Reliable edge cell array design |
JP3240896B2 (ja) * | 1995-11-21 | 2001-12-25 | 富士電機株式会社 | Mos型半導体素子 |
US5747853A (en) * | 1996-08-07 | 1998-05-05 | Megamos Corporation | Semiconductor structure with controlled breakdown protection |
KR19980055024A (ko) * | 1996-12-27 | 1998-09-25 | 김광호 | 플래나 링 구조를 가지는 바이폴라 트랜지스터 |
DE19816448C1 (de) * | 1998-04-14 | 1999-09-30 | Siemens Ag | Universal-Halbleiterscheibe für Hochspannungs-Halbleiterbauelemente, ihr Herstellungsverfahren und ihre Verwendung |
JP2007134421A (ja) * | 2005-11-09 | 2007-05-31 | Sansha Electric Mfg Co Ltd | パワーmosfet、igbtなどの縦型半導体装置とその製造方法 |
JP4412335B2 (ja) | 2007-02-23 | 2010-02-10 | 株式会社デンソー | 炭化珪素半導体装置の製造方法 |
JP4683075B2 (ja) * | 2008-06-10 | 2011-05-11 | 株式会社デンソー | 炭化珪素半導体装置およびその製造方法 |
JP5366297B2 (ja) * | 2009-02-10 | 2013-12-11 | 富士電機株式会社 | 半導体装置 |
KR101148335B1 (ko) * | 2009-07-23 | 2012-05-21 | 삼성전기주식회사 | 실리콘 반도체를 이용한 광전자 증배관 및 그 구조 셀 |
US9136352B2 (en) | 2009-07-31 | 2015-09-15 | Fuji Electric Co., Ltd. | Manufacturing method of semiconductor apparatus and semiconductor apparatus |
Family Cites Families (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1140822A (en) * | 1967-01-26 | 1969-01-22 | Westinghouse Brake & Signal | Semi-conductor elements |
FR2020370B1 (fr) * | 1968-10-11 | 1973-11-16 | Ibm | |
CA932072A (en) * | 1970-12-23 | 1973-08-14 | J. Kannam Peter | High frequency planar transistor employing highly resistive guard ring |
JPS5534582B2 (fr) * | 1974-06-24 | 1980-09-08 | ||
DE2846637A1 (de) * | 1978-10-11 | 1980-04-30 | Bbc Brown Boveri & Cie | Halbleiterbauelement mit mindestens einem planaren pn-uebergang und zonen- guard-ringen |
DE3012430A1 (de) * | 1980-03-31 | 1981-10-08 | Siemens AG, 1000 Berlin und 8000 München | Planare halbleiteranordnung mit erhoehter durchbruchsspannung |
JPS57160159A (en) * | 1981-03-28 | 1982-10-02 | Toshiba Corp | High breakdown voltage planar type semiconductor device |
JPS58100460A (ja) * | 1981-12-11 | 1983-06-15 | Hitachi Ltd | 縦形mos半導体装置 |
JPS58192369A (ja) * | 1982-05-07 | 1983-11-09 | Toshiba Corp | 高耐圧プレ−ナ型半導体装置 |
DE3220250A1 (de) * | 1982-05-28 | 1983-12-01 | Siemens AG, 1000 Berlin und 8000 München | Halbleiterbauelement mit planarstruktur |
JPS5976466A (ja) * | 1982-10-25 | 1984-05-01 | Mitsubishi Electric Corp | プレ−ナ形半導体装置 |
JPS60196975A (ja) * | 1984-08-24 | 1985-10-05 | Nissan Motor Co Ltd | 縦型mosfet |
JPS5998557A (ja) * | 1982-11-27 | 1984-06-06 | Nissan Motor Co Ltd | Mosトランジスタ |
US4803532A (en) * | 1982-11-27 | 1989-02-07 | Nissan Motor Co., Ltd. | Vertical MOSFET having a proof structure against puncture due to breakdown |
GB2134705B (en) * | 1983-01-28 | 1985-12-24 | Philips Electronic Associated | Semiconductor devices |
JPS61158177A (ja) * | 1984-12-28 | 1986-07-17 | Toshiba Corp | 半導体装置 |
JPS61182264A (ja) * | 1985-02-08 | 1986-08-14 | Nissan Motor Co Ltd | 縦型mosトランジスタ |
EP0222326A2 (fr) * | 1985-11-12 | 1987-05-20 | General Electric Company | Méthode de fabrication d'un dispositif semi-conducteur ayant une grille isolée |
JPS63269514A (ja) * | 1987-04-27 | 1988-11-07 | Mitsubishi Electric Corp | 半導体素子の製造方法 |
JPS6469051A (en) * | 1987-09-10 | 1989-03-15 | Matsushita Electronics Corp | Schottky-barrier semiconductor device |
JPH01270346A (ja) * | 1988-04-22 | 1989-10-27 | Fuji Electric Co Ltd | 半導体装置 |
JPH01295460A (ja) * | 1988-05-24 | 1989-11-29 | Matsushita Electric Works Ltd | 半導体装置 |
US5032878A (en) * | 1990-01-02 | 1991-07-16 | Motorola, Inc. | High voltage planar edge termination using a punch-through retarding implant |
-
1990
- 1990-01-25 JP JP2013613A patent/JP2701502B2/ja not_active Expired - Lifetime
-
1991
- 1991-01-24 US US07/645,872 patent/US5184204A/en not_active Expired - Lifetime
- 1991-01-24 GB GB9101540A patent/GB2240427B/en not_active Expired - Lifetime
- 1991-01-24 FR FR919100810A patent/FR2657463B1/fr not_active Expired - Lifetime
- 1991-01-25 DE DE4102192A patent/DE4102192C2/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
GB9101540D0 (en) | 1991-03-06 |
DE4102192C2 (de) | 1996-02-29 |
DE4102192A1 (de) | 1991-08-08 |
JPH03219678A (ja) | 1991-09-27 |
JP2701502B2 (ja) | 1998-01-21 |
GB2240427B (en) | 1993-11-24 |
FR2657463A1 (fr) | 1991-07-26 |
US5184204A (en) | 1993-02-02 |
GB2240427A (en) | 1991-07-31 |
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