FI117369B - Menetelmä elektroniikkamoduulin valmistamiseksi - Google Patents

Menetelmä elektroniikkamoduulin valmistamiseksi Download PDF

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Publication number
FI117369B
FI117369B FI20041524A FI20041524A FI117369B FI 117369 B FI117369 B FI 117369B FI 20041524 A FI20041524 A FI 20041524A FI 20041524 A FI20041524 A FI 20041524A FI 117369 B FI117369 B FI 117369B
Authority
FI
Finland
Prior art keywords
layer
conductor
component
film
contact
Prior art date
Application number
FI20041524A
Other languages
English (en)
Finnish (fi)
Swedish (sv)
Other versions
FI20041524A (fi
FI20041524A0 (fi
Inventor
Antti Iihola
Risto Tuominen
Original Assignee
Imbera Electronics Oy
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Imbera Electronics Oy filed Critical Imbera Electronics Oy
Priority to FI20041524A priority Critical patent/FI117369B/fi
Publication of FI20041524A0 publication Critical patent/FI20041524A0/fi
Priority to JP2007542017A priority patent/JP5160895B2/ja
Priority to PCT/FI2005/000499 priority patent/WO2006056643A2/en
Priority to CN2005800402916A priority patent/CN101065843B/zh
Priority to US11/667,429 priority patent/US8062537B2/en
Priority to KR1020077014479A priority patent/KR101101603B1/ko
Publication of FI20041524A publication Critical patent/FI20041524A/fi
Application granted granted Critical
Publication of FI117369B publication Critical patent/FI117369B/fi

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
    • H05K1/188—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit manufactured by mounting on or attaching to a structure having a conductive layer, e.g. a metal foil, such that the terminals of the component are connected to or adjacent to the conductive layer before embedding, and by using the conductive layer, which is patterned after embedding, at least partially for connecting the component
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/19—Manufacturing methods of high density interconnect preforms
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L24/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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    • H01—ELECTRIC ELEMENTS
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
    • H01L2224/82009—Pre-treatment of the connector or the bonding area
    • H01L2224/8203—Reshaping, e.g. forming vias
    • H01L2224/82035—Reshaping, e.g. forming vias by heating means
    • H01L2224/82039—Reshaping, e.g. forming vias by heating means using a laser
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
    • H01L2224/82009—Pre-treatment of the connector or the bonding area
    • H01L2224/8203—Reshaping, e.g. forming vias
    • H01L2224/82047—Reshaping, e.g. forming vias by mechanical means, e.g. severing, pressing, stamping
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8312—Aligning
    • H01L2224/83121—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
    • H01L2224/83132—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors using marks formed outside the semiconductor or solid-state body, i.e. "off-chip"
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/921—Connecting a surface with connectors of different types
    • H01L2224/9212—Sequential connecting processes
    • H01L2224/92142—Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92144—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a build-up interconnect
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
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    • H01L2924/01006—Carbon [C]
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
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    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
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    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
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    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • H01L2924/3511—Warping
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0335—Layered conductors or foils
    • H05K2201/0355—Metal foils
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10674—Flip chip
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49126—Assembling bases

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
FI20041524A 2004-11-26 2004-11-26 Menetelmä elektroniikkamoduulin valmistamiseksi FI117369B (fi)

Priority Applications (6)

Application Number Priority Date Filing Date Title
FI20041524A FI117369B (fi) 2004-11-26 2004-11-26 Menetelmä elektroniikkamoduulin valmistamiseksi
JP2007542017A JP5160895B2 (ja) 2004-11-26 2005-11-23 電子モジュールの製造方法
PCT/FI2005/000499 WO2006056643A2 (en) 2004-11-26 2005-11-23 Method for manufacturing an electronics module
CN2005800402916A CN101065843B (zh) 2004-11-26 2005-11-23 制造电子模块的方法
US11/667,429 US8062537B2 (en) 2004-11-26 2005-11-23 Method for manufacturing an electronics module
KR1020077014479A KR101101603B1 (ko) 2004-11-26 2005-11-23 전자 모듈 제조 방법

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FI20041524 2004-11-26
FI20041524A FI117369B (fi) 2004-11-26 2004-11-26 Menetelmä elektroniikkamoduulin valmistamiseksi

Publications (3)

Publication Number Publication Date
FI20041524A0 FI20041524A0 (fi) 2004-11-26
FI20041524A FI20041524A (fi) 2006-03-17
FI117369B true FI117369B (fi) 2006-09-15

Family

ID=33515276

Family Applications (1)

Application Number Title Priority Date Filing Date
FI20041524A FI117369B (fi) 2004-11-26 2004-11-26 Menetelmä elektroniikkamoduulin valmistamiseksi

Country Status (6)

Country Link
US (1) US8062537B2 (zh)
JP (1) JP5160895B2 (zh)
KR (1) KR101101603B1 (zh)
CN (1) CN101065843B (zh)
FI (1) FI117369B (zh)
WO (1) WO2006056643A2 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8742572B2 (en) 2006-08-04 2014-06-03 Micron Technology, Inc. Microelectronic devices and methods for manufacturing microelectronic devices

Families Citing this family (42)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FI20031341A (fi) 2003-09-18 2005-03-19 Imbera Electronics Oy Menetelmä elektroniikkamoduulin valmistamiseksi
FI117814B (fi) * 2004-06-15 2007-02-28 Imbera Electronics Oy Menetelmä elektroniikkamoduulin valmistamiseksi
DE102005003632A1 (de) 2005-01-20 2006-08-17 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Katheter für die transvaskuläre Implantation von Herzklappenprothesen
GB2441265B (en) 2005-06-16 2012-01-11 Imbera Electronics Oy Method for manufacturing a circuit board structure, and a circuit board structure
FI122128B (fi) * 2005-06-16 2011-08-31 Imbera Electronics Oy Menetelmä piirilevyrakenteen valmistamiseksi
FI119714B (fi) 2005-06-16 2009-02-13 Imbera Electronics Oy Piirilevyrakenne ja menetelmä piirilevyrakenteen valmistamiseksi
US8841759B2 (en) * 2006-12-23 2014-09-23 Lg Innotek Co., Ltd. Semiconductor package and manufacturing method thereof
DE102007015819A1 (de) * 2007-03-30 2008-10-09 Robert Bosch Gmbh Verfahren zur Herstellung einer elektronischen Baugruppe sowie elektronische Baugruppe
US20100328913A1 (en) * 2007-03-30 2010-12-30 Andreas Kugler Method for the producing an electronic subassembly, as well as electronic subassembly
US7896915B2 (en) 2007-04-13 2011-03-01 Jenavalve Technology, Inc. Medical device for treating a heart valve insufficiency
DE102007024189A1 (de) * 2007-05-24 2008-11-27 Robert Bosch Gmbh Verfahren zur Herstellung einer elektronischen Baugruppe
DE102008009220A1 (de) * 2008-02-06 2009-08-13 Robert Bosch Gmbh Verfahren zum Herstellen einer Leiterplatte
ES2903231T3 (es) 2008-02-26 2022-03-31 Jenavalve Tech Inc Stent para el posicionamiento y anclaje de una prótesis valvular en un sitio de implantación en el corazón de un paciente
US9044318B2 (en) 2008-02-26 2015-06-02 Jenavalve Technology Gmbh Stent for the positioning and anchoring of a valvular prosthesis
US8264085B2 (en) 2008-05-05 2012-09-11 Infineon Technologies Ag Semiconductor device package interconnections
FI123205B (fi) 2008-05-12 2012-12-31 Imbera Electronics Oy Piirimoduuli ja menetelmä piirimoduulin valmistamiseksi
JP5833926B2 (ja) 2008-10-30 2015-12-16 アーテー・ウント・エス・オーストリア・テヒノロギー・ウント・ジュステームテッヒニク・アクチェンゲゼルシャフトＡｔ ＆ Ｓ Ａｕｓｔｒｉａ Ｔｅｃｈｎｏｌｏｇｉｅ ＆ Ｓｙｓｔｅｍｔｅｃｈｎｉｋ Ａｋｔｉｅｎｇｅｓｅｌｌｓｃｈａｆｔ 電子構成部品をプリント回路基板に組み込むための方法
AT12316U1 (de) 2008-10-30 2012-03-15 Austria Tech & System Tech Verfahren zur integration eines elektronischen bauteils in eine leiterplatte
US8124449B2 (en) 2008-12-02 2012-02-28 Infineon Technologies Ag Device including a semiconductor chip and metal foils
FI122216B (fi) 2009-01-05 2011-10-14 Imbera Electronics Oy Rigid-flex moduuli
FI20095110A0 (fi) 2009-02-06 2009-02-06 Imbera Electronics Oy Elektroniikkamoduuli, jossa on EMI-suoja
JP2013526388A (ja) 2010-05-25 2013-06-24 イエナバルブ テクノロジー インク 人工心臓弁、及び人工心臓弁とステントを備える経カテーテル搬送体内プロテーゼ
US8735735B2 (en) 2010-07-23 2014-05-27 Ge Embedded Electronics Oy Electronic module with embedded jumper conductor
AT13055U1 (de) * 2011-01-26 2013-05-15 Austria Tech & System Tech Verfahren zur integration eines elektronischen bauteils in eine leiterplatte oder ein leiterplatten-zwischenprodukt sowie leiterplatte oder leiterplatten-zwischenprodukt
KR20140089385A (ko) 2011-10-31 2014-07-14 메이코 일렉트로닉스 컴파니 리미티드 부품내장기판의 제조방법 및 이 방법을 이용하여 제조한 부품내장기판
JP5688162B2 (ja) 2011-11-08 2015-03-25 株式会社メイコー 部品内蔵基板の製造方法及びこの方法を用いて製造した部品内蔵基板
KR101233640B1 (ko) * 2011-11-28 2013-02-15 대덕전자 주식회사 내장형 인쇄회로기판의 수율 향상방법
JP5521130B1 (ja) 2012-08-30 2014-06-11 パナソニック株式会社 電子部品パッケージおよびその製造方法
JP5651807B2 (ja) 2012-09-05 2015-01-14 パナソニックＩｐマネジメント株式会社 半導体装置およびその製造方法
US9084382B2 (en) * 2012-10-18 2015-07-14 Infineon Technologies Austria Ag Method of embedding an electronic component into an aperture of a substrate
US9825209B2 (en) 2012-12-21 2017-11-21 Panasonic Intellectual Property Management Co., Ltd. Electronic component package and method for manufacturing the same
CN104584210B (zh) 2012-12-21 2017-09-26 松下知识产权经营株式会社 电子部件封装件及其制造方法
JP5624700B1 (ja) 2012-12-21 2014-11-12 パナソニック株式会社 電子部品パッケージおよびその製造方法
JP5624697B1 (ja) 2012-12-21 2014-11-12 パナソニック株式会社 電子部品パッケージおよびその製造方法
CN105491978A (zh) 2013-08-30 2016-04-13 耶拿阀门科技股份有限公司 用于假体瓣膜的径向可折叠框架及其制造方法
US9380697B2 (en) 2014-01-28 2016-06-28 Panasonic Intellectual Property Management Co., Ltd. Electronic device and manufacturing method for same
US9373762B2 (en) 2014-06-17 2016-06-21 Panasonic Intellectual Property Management Co., Ltd. Electronic part package
WO2016177562A1 (en) 2015-05-01 2016-11-10 Jenavalve Technology, Inc. Device and method with reduced pacemaker rate in heart valve replacement
JP6620989B2 (ja) 2015-05-25 2019-12-18 パナソニックＩｐマネジメント株式会社 電子部品パッケージ
JP7081749B2 (ja) 2016-05-13 2022-06-07 イエナバルブ テクノロジー インク 心臓弁プロテーゼ送達システム
CN110392557A (zh) 2017-01-27 2019-10-29 耶拿阀门科技股份有限公司 心脏瓣膜模拟
EP3557608A1 (en) 2018-04-19 2019-10-23 AT & S Austria Technologie & Systemtechnik Aktiengesellschaft Packaged integrated circuit with interposing functionality and method for manufacturing such a packaged integrated circuit

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4246595A (en) 1977-03-08 1981-01-20 Matsushita Electric Industrial Co., Ltd. Electronics circuit device and method of making the same
JP3094481B2 (ja) 1991-03-13 2000-10-03 松下電器産業株式会社 電子回路装置とその製造方法
US5302851A (en) * 1991-12-19 1994-04-12 International Business Machines Corporation Circuit assembly with polyimide insulator
US5838545A (en) * 1996-10-17 1998-11-17 International Business Machines Corporation High performance, low cost multi-chip modle package
US6232666B1 (en) * 1998-12-04 2001-05-15 Mciron Technology, Inc. Interconnect for packaging semiconductor dice and fabricating BGA packages
KR100298828B1 (ko) * 1999-07-12 2001-11-01 윤종용 재배선 필름과 솔더 접합을 이용한 웨이퍼 레벨 칩 스케일 패키지 제조방법
US6284564B1 (en) * 1999-09-20 2001-09-04 Lockheed Martin Corp. HDI chip attachment method for reduced processing
US6242282B1 (en) * 1999-10-04 2001-06-05 General Electric Company Circuit chip package and fabrication method
US6271469B1 (en) 1999-11-12 2001-08-07 Intel Corporation Direct build-up layer on an encapsulated die package
US6475877B1 (en) 1999-12-22 2002-11-05 General Electric Company Method for aligning die to interconnect metal on flex substrate
TW574261B (en) * 2000-08-28 2004-02-01 Ube Industries Method of producing through-hole in aromatic polyimide film
US6489185B1 (en) 2000-09-13 2002-12-03 Intel Corporation Protective film for the fabrication of direct build-up layers on an encapsulated die package
JP2002158307A (ja) * 2000-11-22 2002-05-31 Toshiba Corp 半導体装置及びその製造方法
FI115285B (fi) * 2002-01-31 2005-03-31 Imbera Electronics Oy Menetelmä komponentin upottamiseksi alustaan ja kontaktin muodostamiseksi
FI119215B (fi) * 2002-01-31 2008-08-29 Imbera Electronics Oy Menetelmä komponentin upottamiseksi alustaan ja elektroniikkamoduuli
JP2004063890A (ja) * 2002-07-30 2004-02-26 Fujitsu Ltd 半導体装置の製造方法
FI115601B (fi) 2003-04-01 2005-05-31 Imbera Electronics Oy Menetelmä elektroniikkamoduulin valmistamiseksi ja elektroniikkamoduuli
WO2005013623A1 (en) * 2003-08-05 2005-02-10 Koninklijke Philips Electronics N.V. Multi-view image generation
FI117812B (fi) * 2004-08-05 2007-02-28 Imbera Electronics Oy Komponentin sisältävän kerroksen valmistaminen
JP2006100666A (ja) * 2004-09-30 2006-04-13 Toshiba Corp 半導体装置及びその製造方法
US7743128B2 (en) * 2005-04-20 2010-06-22 Netqos, Inc. Method and system for visualizing network performance characteristics

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8742572B2 (en) 2006-08-04 2014-06-03 Micron Technology, Inc. Microelectronic devices and methods for manufacturing microelectronic devices

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KR101101603B1 (ko) 2012-01-02
US8062537B2 (en) 2011-11-22
US20070267136A1 (en) 2007-11-22
FI20041524A (fi) 2006-03-17
WO2006056643A2 (en) 2006-06-01
FI20041524A0 (fi) 2004-11-26
CN101065843B (zh) 2010-08-18
WO2006056643A3 (en) 2006-11-09
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CN101065843A (zh) 2007-10-31
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