EP2589071A2 - Films fins et procédés de fabrication associés utilisant du cyclohexasilane - Google Patents

Films fins et procédés de fabrication associés utilisant du cyclohexasilane

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Publication number
EP2589071A2
EP2589071A2 EP11801265.7A EP11801265A EP2589071A2 EP 2589071 A2 EP2589071 A2 EP 2589071A2 EP 11801265 A EP11801265 A EP 11801265A EP 2589071 A2 EP2589071 A2 EP 2589071A2
Authority
EP
European Patent Office
Prior art keywords
cyclohexasilane
chamber
deposition
silicon
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP11801265.7A
Other languages
German (de)
English (en)
Other versions
EP2589071A4 (fr
Inventor
Robert Torres, Jr.
Terry Arthur Francis
Satoshi Hasaka
Paul David Brabant
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Matheson Tri-Gas Inc
Original Assignee
Matheson Tri-Gas Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matheson Tri-Gas Inc filed Critical Matheson Tri-Gas Inc
Publication of EP2589071A2 publication Critical patent/EP2589071A2/fr
Publication of EP2589071A4 publication Critical patent/EP2589071A4/fr
Withdrawn legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02529Silicon carbide
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/24Deposition of silicon only
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02Epitaxial-layer growth
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02Elements
    • C30B29/06Silicon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/0257Doping during depositing
    • H01L21/02573Conductivity type
    • H01L21/02576N-type
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/0257Doping during depositing
    • H01L21/02573Conductivity type
    • H01L21/02579P-type
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD

Definitions

  • the present invention relates generally to selective epitaxial deposition of silicon-containing materials and more particularly to the use of cyclohexasilane, C 6 Hi 2 , in chemical vapor deposition processes for the deposition of thin silicon- containing materials on various substrates.
  • CVD chemical vapor deposition
  • the process is often used in the semiconductor industry to produce thin films.
  • the wafer substrate
  • volatile precursors which react and/or decompose on the substrate surface to produce the desired deposit.
  • volatile by-products are also produced, which are removed by gas flow through the reaction chamber.
  • Ultrahigh vacuum CVD (UHVCVD) - CVD processes at a very low pressure, typically 10 "9 Torr base/ 10 "5 to 50mTorr operating pressure.
  • silane SiH 4
  • SiH 4 very thin silicon-containing films using silane
  • a selective epitaxial process involves a deposition reaction and an etch reaction.
  • the deposition and etch reactions occur simultaneously with relatively different reaction rates to an epitaxial layer and to a polycrystalline layer.
  • the epitaxial layer is formed on a monocrystalline surface while a polycrystalline layer is deposited on at least a second layer, such as an existing polycrystalline layer and/or an amorphous layer.
  • the deposited polycrystalline layer is generally etched at a faster rate than the epitaxial layer. Therefore, by changing the concentration of an etchant gas, the net selective process results in deposition of epitaxial material and limited, or no, deposition of polycrystalline material.
  • a selective epitaxial process may result in the formation of an epilayer of silicon-containing material on a monocrystalline silicon surface while no deposition is left on the spacer.
  • the performance of semiconductors devices may be further enhanced by increasing circuit performance.
  • the amount of current that flows through the channel of a metal oxide semiconductor (MOS) transistor is directly proportional to a mobility of carriers in the channel, and the use of high mobility MOS transistors enables more current to flow and consequently faster circuit performance.
  • MOS metal oxide semiconductor
  • mobility of the carriers in the channel of a MOS transistor can be increased by producing a mechanical stress, i.e., strain, in the channel.
  • a number of approaches for inducing strain in Si- and Ge-containing materials have focused on exploiting the differences in the lattice constants between various crystalline materials.
  • thin layers of a particular crystalline material are deposited onto a different crystalline material in such a way that the deposited layer adopts the lattice constant of the underlying single crystal material.
  • Strain may also be introduced into single crystalline Si-containing materials by replacing Si in the lattice structure with a dopant, commonly referred to as substitutional doping.
  • substitutional doping For example, substitution of germanium atoms for some of the silicon atoms in the lattice structure of single crystalline silicon produces a compressive strain in the resulting substitutionally doped single crystalline silicon material because the germanium atoms are larger than the silicon atoms that they replace.
  • a tensile strain may be introduced into single crystalline silicon by substitutional doping with carbon, because carbon atoms are smaller than the silicon atoms that they replace. See, e.g., Judy L.
  • in situ doping is often preferred over ex situ doping followed by annealing to incorporate the dopant into the lattice structure because the annealing may undesirably consume thermal budget.
  • in situ substitutional carbon doping is complicated by the tendency for the dopant to incorporate non-substitutionally during deposition, e.g., interstitially in domains or clusters within the silicon, rather than by substituting for silicon atoms in the lattice structure. See, e.g., the aforementioned article by Hoyt.
  • Non-substitutional doping also complicates substitutional doping using other material systems, e.g., carbon doping of SiGe, doping of Si and SiGe with electrically active dopants, etc.
  • prior deposition methods have been used to make crystalline silicon having an in situ doped substitutional carbon content of up to 2.3 atomic %, which corresponds to a lattice spacing of over 5.4 A and a tensile stress of less than 1.0 GPa.
  • prior deposition methods are not known to have been successful for depositing single crystal silicon having an in situ doped substitutional carbon content of greater than 2.3 atomic %.
  • the elemental composition of doped thin films is often not homogeneous in the cross-film and/or through-film directions because of differences in relative incorporation rates of the dopant elements.
  • the resulting films do not exhibit uniform elemental concentrations and, therefore, do not exhibit uniform film physical properties across the surface and/or through the thickness of the film.
  • cyclohexasilane like trisilane, can be used as a silicon precursor to deposit very thin, smooth Si-containing films over large area substrates.
  • a method for depositing a thin film comprising: introducing a gas comprising cyclohexasilane to a chamber, wherein the chamber contains a substrate having a substrate surface; establishing cyclohexasilane chemical vapor deposition and decomposition conditions in the chamber; and depositing a Si-containing film onto the substrate surface.
  • a deposition method comprising: providing a substrate disposed within a chamber, wherein the substrate comprises a first surface having a first surface morphology and a second surface having a second surface morphology different from the first surface morphology; introducing cyclohexasilane to the chamber under chemical vapor deposition conditions; initiating decomposition of said cyclohexasilane; and depositing a Si-containing film onto the substrate over both of the first surface and the second surface.
  • a high-rate deposition method comprising: delivering cyclohexasilane to a mixed substrate surface under chemical vapor deposition conditions, at a delivery rate of at least about 0.001 milligrams per minute per square centimeter of the mixed substrate surface, and depositing a silicon-containing material onto the mixed substrate surface at a rate of about 10 A per minute or greater.
  • deposition and/or growth methods have now been developed that utilize cyclohexasilane and a carbon source to deposit carbon-doped Si-containing films using a modified chemical vapor deposition and/or growth system (reduced pressure chemical CVD) which operates in the range of lOmTorr to 200 Torr.
  • a modified chemical vapor deposition and/or growth system reduced pressure chemical CVD
  • Such deposition and/or growth methods are capable of producing a variety of Si-containing single crystal films that are substitutional ⁇ doped with carbon to various levels, including levels that are significantly higher than those achieved using prior methods.
  • preferred deposition and/or growth methods using cyclohexasilane as a silicon source can be used to deposit a variety of carbon-doped single crystal Si films having a range of substitutional carbon levels, including levels of greater than 1.8 atomic % while simultaneously maintaining a constant reaction temperature throughout the process.
  • Another embodiment provides a method for depositing an epitaxial silicon film, comprising: providing a substrate disposed within a chamber; initiating decomposition of said cyclohexasilane; and exposing the substrate to cyclohexasilane under reduced pressure chemical vapor deposition and/or growth conditions and depositing a single silicon film onto the substrate at a temperature of less than about 550°C and a pressure of less than about 200 Torr.
  • Another embodiment provides a method for depositing an epitaxial silicon film, comprising: providing a substrate disposed within a chamber; introducing cyclohexasilane and a carbon source to the chamber under reduced pressure CVD conditions and depositing a single crystalline silicon film onto the substrate at a temperature of less than about 550°C and a pressure of less than about 200 Torr thereby producing a single crystalline silicon film comprising at least 1.8 atomic % substitutional carbon, as determined by x-ray diffraction.
  • Another embodiment provides an integrated circuit comprising a first single crystalline Si-containing region and a second single crystalline Si-containing region, at least one of the first single crystalline Si-containing region and the second single crystalline Si-containing region comprising an amount of substitutional carbon effective to exert a tensile stress on a third single crystalline Si-containing region positioned between the first single crystalline Si-containing region and the second single crystalline Si-containing region, the third single crystalline Si- containing region exhibiting an increase in carrier mobility of at least about 10% as compared to a comparable unstressed region.
  • a modified low pressure-chemical vapor deposition and/or growth system for forming an epitaxial film on a substrate, comprising a deposition and/or growth chamber having chamber dimensions and opposite ends; a decomposition chamber is operatively disposed between the cyclohexasilane source and the chamber thus allowing the initiation of cyclohexasilane decomposition prior to entry into the chamber; a gas inlet adjacent the other of the ends of the chamber for introducing decomposed cyclohexasilane into the chamber; and a substrate support means for supporting the substrates within the chamber.
  • a modified low pressure-chemical vapor deposition and/or growth system for forming an epitaxial film on a substrate, comprising a deposition and/or growth chamber having chamber dimensions and opposite ends; a high-speed pump means connected to one of the ends of the chamber and operative to maintain the deposition and/or growth pressure in the chamber at or below 200 Torr; a gas inlet adjacent the other of the ends of the chamber for introducing gas into the chamber so that the gas flows generally in a direction from the gas inlet to the pump means; substrate support means for supporting the substrates within the chamber; and said high speed pump is capable of flowing a carrier gas into said chamber at concentrations so high that any contaminants, such as but not limited to oxygen, water, carbon monoxide, carbon dioxide, siloxanes, disiloxanes, and higher siloxanes present are diluted out.
  • any contaminants such as but not limited to oxygen, water, carbon monoxide, carbon dioxide, siloxanes, disiloxanes, and higher siloxanes present are diluted out.
  • Figure 1 is a schematic view of a reactor set up for a system employing cyclohexasilane and a carrier gas for selectively depositing silicon-containing films in accordance with the present invention.
  • Figure 2 is a schematic view of a reactor for selectively depositing silicon-containing films having a degradation chamber positioned between the bubbler containing cyclohexasilane and the reaction chamber in accordance with the present invention.
  • Figure 3 is a schematic view of a reactor set up for a system having a high speed pump employing cyclohexasilane, a carbon source, an etchant gas, and a carrier gas for selectively depositing silicon-containing films in accordance with the present invention.
  • Figure 4 shows a schematic illustration of a device containing selectively and epitaxially deposited silicon-containing layers within a MOSFET.
  • the methods described herein enable the production of novel epitaxial Si-containing films that are uniformly thin, as well as doped epitaxial Si-containing films in which the dopant is uniformly distributed throughout the film, preferably in both the across-film and through-film directions and may contain relatively high levels of substitutional carbon.
  • the methods described herein also enable the production of very thin, continuous films.
  • Substrate refers either to the workpiece upon which deposition and/or growth is desired, or the surface exposed to the deposition and/or growth gas(es).
  • the substrate may be a single crystal silicon wafer, or may be a semiconductor-on-insulator (SOI) substrate, or may be an epitaxial Si, SiGe or III-V material deposited upon such wafers.
  • Workpieces are not limited to wafers, but also include glass, plastic, or any other substrate employed in semiconductor processing.
  • a "mixed substrate” is a substrate that has two or more different types of surfaces.
  • the surfaces can be made from different elements such as copper or silicon, or from different metals, such as copper or aluminum, or from different Si-containing materials, such as silicon or silicon dioxide. Even if the materials are made from the same element, the surfaces can be different if the morphologies of the surfaces are different. The electrical properties of surfaces can also make them different from each other.
  • silicon- containing layers are simultaneously formed over conductive semiconductive materials and dielectrics. Examples of dielectric materials include silicon dioxide (including low dielectric constant forms such as carbon-doped and fluorine-doped oxides of silicon), silicon nitride, metal oxide and metal silicate.
  • epitaxial epitaxially
  • heteroepitaxial epitaxially
  • single-crystal epitaxially
  • Epitaxial deposition and/or growth may be heteroepitaxial when the composition of the deposited layer is different from that of the substrate.
  • crystallinity of a layer generally falls along a continuum from amorphous to polycrystalline to single-crystal; the skilled artisan can readily determine when a crystal structure can be considered single-crystal or epitaxial, despite low density faults.
  • Specific examples of mixed substrates include without limitation single crystal/polycrystalline, single crystal/amorphous, epitaxial/polycrystalline, epitaxial/amorphous, single crystal/dielectric, epitaxial/dielectric, conductor/dielectric, and semiconductor/dielectric. [0039] Even if the materials are made from the same element, the surfaces can be different if the morphologies (crystallinity) of the surfaces are different.
  • Such a mixed substrate comprises a first surface having a first surface morphology and a second surface having a second surface morphology.
  • surface morphology refers to the crystalline structure of the substrate surface.
  • Amorphous and crystalline are examples of different morphologies.
  • Polycrystalline morphology is a crystalline structure that consists of a disorderly arrangement of orderly crystals and thus has an intermediate degree of order. The atoms in a polycrystalline material are ordered within each of the crystals, but the crystals themselves lack long range order with respect to one another.
  • Single crystal morphology is a crystalline structure that has a high degree of long range order.
  • Epitaxial films are characterized by a crystal structure and orientation that is identical to the substrate upon which they are grown, typically single crystal.
  • the atoms in these materials are arranged in a lattice-like structure that persists over relatively long distances (on an atomic scale).
  • Amorphous morphology is a noncrystalline structure having a low degree of order because the atoms lack a definite periodic arrangement.
  • Other morphologies include microcrystalline and mixtures of amorphous and crystalline material.
  • Embodiments of the invention generally provide methods and apparatus for forming and treating a silicon-containing epitaxial layer. Specific embodiments pertain to methods and apparatus for forming and treating an epitaxial layer during the manufacture of a transistor.
  • silicon-containing materials, compounds, films or layers should be construed to include a composition containing at least silicon and may contain germanium, carbon, boron, arsenic, phosphorus gallium and/or aluminum. Other elements, such as metals, halogens or hydrogen may be incorporated within a silicon-containing material, compound, film or layer, usually in part per million (ppm) concentrations.
  • Compounds or alloys of silicon- containing materials may be represented by an abbreviation, such as Si for silicon, SiGe for silicon germanium, Si:C for silicon carbon and SiGeC for silicon germanium carbon. The abbreviations do not represent chemical equations with stoichiometrical relationships, nor represent any particular reduction/oxidation state of the silicon-containing materials.
  • the delivery of cyclohexasilane to the surface of a substrate results in the formation of a Si- containing film.
  • delivery of decomposed cyclohexasilane to the surface whether it be mixed or patterned substrate surface is accomplished by introducing the cyclohexasilane to a suitable chamber having the substrate disposed therein.
  • a high quality Si-containing film can be deposited onto the surface of the substrate regardless of the various surface types.
  • Deposition may be suitably conducted according to the various CVD methods known to those skilled in the art, but the greatest benefits are obtained when deposition is conducted according to the CVD methods taught herein.
  • the disclosed methods may be suitably practiced by employing CVD, including plasma-enhanced chemical vapor deposition (PECVD) or thermal CVD, utilizing gaseous cyclohexasilane to deposit a Si-containing film onto a mixed substrate contained within a CVD chamber.
  • PECVD plasma-enhanced chemical vapor deposition
  • thermal CVD utilizing gaseous cyclohexasilane to deposit a Si-containing film onto a mixed substrate contained within a CVD chamber.
  • Thermal CVD is preferred.
  • cyclohexasilane 106 is preferably introduced to the chamber 120 in the form of a gas or as a component of a feed gas.
  • the total pressure in the CVD chamber is preferably in the range of about 0.001 torr to about 1000 torr, more preferably in the range of about 0.1 torr to about 850 torr, most preferably in the range of about 1 torr to about 760 torr.
  • the temperature of the chamber is preferably about 450°C or greater, more preferably about 500°C or greater, even more preferably about 550°C or greater.
  • deposition takes place at a temperature of about 750°C or less, more preferably about 725°C or less, most preferably about 700°C or less.
  • the substrate can be heated by a variety of manners known in the art. Those skilled in the art can adjust these temperature ranges to take into account the realities of actual manufacturing, e.g., preservation of thermal budget, deposition rate, etc. However, it is critical that the temperature reach the point at which decomposition of cyclohexasilane is initiated. Preferred deposition temperatures thus depend on the desired application, but are typically in the range of about 400°C to about 750°C, preferably about 425°C to about 725°C, more preferably about 450°C to about 700°C.
  • the partial pressure of cyclohexasilane is preferably in the range of about 0.0001% to about 100% of the total pressure, more preferably about 0.001% to about 50% of the total pressure.
  • the feed gas 102 can include a gas or gases other than cyclohexasilane, such as inert carrier gases. Hydrogen is typically a preferred carrier gas due to improved hydrogen termination. However other inert carrier gases such as argon, helium, and nitrogen may also be employed.
  • cyclohexasilane is introduced to the chamber by way of a bubbler 1 12 used with a carrier gas 102 to entrain cyclohexasilane vapor 107, more preferably a temperature controlled bubbler.
  • a suitable manifold may be used to supply feed gas(es) to the CVD chamber.
  • the gas flow in the CVD chamber is horizontal, most preferably the chamber is a single-wafer, single pass, laminar horizontal gas flow reactor, preferably radiantly heated.
  • Suitable reactors of this type are commercially available, and preferred models include Centura® RP-CVD (Reduced Pressure- Vacuum Chemical Vapor Deposition) manufactured by Applied Materials.
  • CVD may be conducted by introducing plasma products (in situ or downstream of a remote plasma generator) to the chamber, but thermal CVD is preferred.
  • the feed gas may also contain other materials known by those skilled in the art to be useful for doping or alloying Si-containing films, as desired.
  • the gas further comprises one or more precursors selected from the group consisting of germanium source, carbon source, boron source, gallium source, indium source, arsenic source, phosphorous source, antimony source, nitrogen source and oxygen source.
  • Specific examples of such sources include: silane, disilane and cyclohexasilane as silicon sources; germane, digermane and trigermane as germanium sources; NF 3 , ammonia, hydrazine and atomic nitrogen as nitrogen sources; various hydrocarbons, e.g., methane, ethane, propane, etc.
  • Carbon sources useful to deposit silicon-containing compounds include organosilanes, cyclohexasilanes, alkyls, alkenes and alkynes of ethyl, propyl and butyl.
  • Such carbon sources include but are not limited to carbon sources having a general formula of Si x H y (CH 3 ) z , where x is an integer in the range of 1 to 6 and where y and z are each independently an integer in the range of 0 to 6, methylated cyclohexasilane or dodecamethylcyclohexasilane (Si6Ci 2 H 36 ) and silylalkanes such as tetramethyldisilane (TMDS), monosilylmethane, disilylmethane, trisilylmethane and tetrasiiylmethane, and/or alkylsilanes such as monomethyl silane (MMS), and dimethyl silane, methylsilane (CH 3 SiH 3 ), dimethylsilane ((CH 3 ) 2 SiH 2 ), ethylsilane (CH 3 CH 2 SiH 3 ), methane (CH 4 ), ethylene (C 2 H 4 ), ethy
  • Incorporation of dopants into Si-containing films by CVD using cyclohexasilane is preferably accomplished by in situ doping using dopant precursors.
  • Precursors for electrical dopants include diborane, deuterated diborane, phosphine, arsenic vapor, and arsine.
  • SbH 3 and trimethylindium are preferred sources of antimony and indium, respectively.
  • Such dopant precursors are useful for the preparation of preferred films as described below, preferably boron-, phosphorous-, antimony-, indium-, and arsenic-doped silicon, SiC, SiGe and SiGeC films and alloys.
  • SiC silicon-containing silicon
  • SiGe silicon-containing germanium
  • dopants e.g., dopants
  • the amount of dopant precursor in the feed gas may be adjusted to provide the desired level of dopant in the Si-containing film.
  • Typical concentrations in the feed gas can be in the range of about 1 part per billion (ppb) to about 1% by weight based on total feed gas weight, although higher or lower amounts are sometimes preferred in order to achieve the desired property in the resulting film.
  • dilute mixtures of dopant precursor in a carrier gas can be delivered to the reactor via a mass flow controller with set points ranging from about 10 to about 200 standard, cubic centimeters per minute (seem), depending on desired dopant concentration and dopant gas concentration.
  • the dilute mixture is preferably further diluted by mixing with cyclohexasilane and any suitable carrier gas. Since typical total flow rates for deposition in the preferred Centura® series reactors often range from about 20 standard liters per minute (slm) to about 180 slm, the concentration of the dopant precursor used in such a method is small relative to total flow.
  • Deposition of the Si-containing films described herein is preferably conducted at a rate of about 5 A per minute or higher, more preferably about 10 A per minute or higher, most preferably about 20 A per minute or higher.
  • a preferred embodiment provides a high rate deposition method in which cyclohexasilane is delivered to the substrate surface at a delivery rate of at least about 0.001 milligram per minute per square centimeter of the substrate surface, more preferably at least about 0.003 milligram per minute per square centimeter of the substrate surface.
  • practice of this embodiment results in relatively fast deposition of the Si-containing material (as compared to other silicon sources), preferably at a rate of about 10 A per minute or higher, more preferably about 25 A per minute or higher, most preferably about 50 A per minute or higher.
  • a germanium source is also delivered to the surface along with the cyclohexasilane to thereby deposit a SiGe-containing material as the Si-containing material.
  • a mixed-morphology Si- containing film is deposited onto the mixed substrate.
  • the morphologies of the mixed-morphology film depend on the deposition temperature, pressure, reactant partial pressure(s) and reactant flow rates and the surface morphologies of the underlying substrate.
  • silicon-containing materials capable of forming single crystal films tend to form over properly prepared single crystal surfaces, whereas non-single crystal films tend to form over non-single crystalline surfaces.
  • Epitaxial film formation is favored for silicon-containing materials capable of forming pseudomorphic structures when the underlying single crystal surface has been properly treated, e.g., by ex-situ wet etching of any oxide layers followed by in situ cleaning and/or hydrogen bake steps, and when the growth conditions support such film growth.
  • Such treatment methods are known to those skilled in the art, see Peter Van Zant, "Microchip Fabrication," 4 th Ed., McGraw Hill, New York, (2000), pp. 385.
  • Polycrystalline and amorphous film formation is favored over amorphous and polycrystalline surfaces and over single crystal surfaces that have not been treated to enable epitaxial film growth.
  • Amorphous film formation is favored over amorphous and polycrystalline substrate surfaces at low temperatures, while polycrystalline films tend to form over amorphous and polycrystalline surfaces at relatively high deposition temperatures.
  • Cyclohexasilane is preferably delivered to the mixed substrate surface for a period of time at a sufficient temperature for decomposition to initiate and at a delivery rate that is effective to form a Si-containing film having the desired thickness.
  • Film thickness over a particular surface can range from about 10 A to about 10 microns or even more, depending on the application.
  • the thickness of the Si-containing film over any particular surface is in the range of about 50 A to about 5,000 A, more preferably about 250 A to about 2,500 A.
  • the Si- containing film deposited onto this mixed substrate preferably has a thickness Ti over the first surface and a thickness T 2 over the second surface such that Ti :T 2 is in the range of about 10: 1 to about 1 : 10, more preferably about 5: 1 to about 1 :5, even more preferably about 2: 1 to about 1 :2, and most preferably about 1.3: 1 to about 1 : 1.3.
  • cyclohexasilane is used in a method for making a base structure for a bipolar transistor.
  • the method for making the base structure comprises providing a substrate surface that comprises an active area and an insulator and supplying cyclohexasilane to the substrate surface under conditions effective to deposit a silicon-containing film onto the substrate over both the active area and the insulator.
  • the Si-containing film is deposited onto the mixed substrate in the form of a SiGe-containing film, preferably a SiGe or a SiGeC film, comprising from about 0.1 atomic % to about 80 atomic % germanium, preferably about 1 atomic % to about 60 atomic %.
  • the SiGe-containing film is preferably deposited by simultaneously introducing a germanium source and cyclohexasilane to the chamber, more preferably by using a mixture of cyclohexasilane and a germanium source.
  • the SiGe-containing film may be deposited onto a buffer layer as described above, preferably onto a silicon or doped silicon buffer layer, or directly onto the mixed substrate.
  • the germanium source is germane or digermane.
  • the relative proportions of elements in the film e.g., silicon, germanium, carbon, dopants, etc., are preferably controlled by varying the feed gas composition as discussed above.
  • the germanium concentration may be constant through the thickness of the film or a graded film can be produced by varying the concentration of the germanium source in the feed gas during the deposition.
  • a preferred gas mixture for the deposition of SiGe comprises a hydrogen carrier gas, germane or digermane as the germanium source, and cyclohexasilane.
  • the weight ratio of cyclohexasilane to germanium source in the feed gas is preferably in the range of about 10:90 to about 99: 1, more preferably about 20:80 to about 95:5.
  • the germanium source is preferably delivered to the mixed substrate at a delivery rate of at least about 0.001 milligrams per minute per square centimeter of the mixed substrate surface, more preferably at least about 0.003 milligrams per minute per square centimeter of the mixed substrate surface.
  • the delivery rate of the germanium source is preferably adjusted in concert with the delivery rate of cyclohexasilane to achieve the desired deposition rate and film composition.
  • the delivery rate of the germanium source is varied to produce a graded germanium concentration SiGe or SiGeC film.
  • the surface morphology and composition of at least one surface of the underlying mixed substrate is effective to allow strained heteroepitaxial growth of SiGe films thereon.
  • a deposited epitaxial layer is "strained" when it is constrained to have a lattice structure in at least two dimensions that is the same as that of the underlying single crystal substrate, but different from its inherent lattice constant.
  • Lattice strain is present because the atoms depart from the positions that they would normally occupy in the lattice structure of the freestanding, bulk material when the film deposits in such a way that its lattice structure matches that of the underlying single crystal substrate.
  • the present invention discloses methods of creating high levels of strain through achieving high levels of substitutional carbon.
  • Cyclohexasilane deposition conditions are thus preferably created by supplying sufficient energy to initiate the decomposition of cyclohexasilane and thus enable the resulting silicon products to deposit at a rate that is controlled primarily by the rate at which it is delivered to the substrate surface, more preferably by heating the substrate as described below.
  • a preferred deposition method involves establishing cyclohexasilane decomposition and deposition conditions in a suitable chamber in the presence of cyclohexasilane and depositing a Si-containing film onto a substrate contained within the chamber.
  • decomposition of cyclohexasilane may be initiated prior to the chamber by way of decomposition techniques such as, but not limited to, thermal, photolysis, radiation, ion bombardment, plasma, etc.
  • Si-containing materials can be deposited in the usual fashion over the Si- containing materials described herein, including metals, dielectric materials, semiconductors, and doped semiconductors. Si-containing materials may also be subjected to other semiconductor manufacturing processes such as annealing, etching, ion implantation, polishing, etc.
  • a diffusion source is a layer that acts as a source of one or more dopant elements. Such diffusion layers are typically deposited in close proximity to a region where the dopant is desired, then heated to drive the dopant from the diffusion layer to the desired destination.
  • diffusion sources there are limitations on the use of such diffusion sources. For example, the deposition and drive steps are time-consuming, and the heating involved in these steps may exceed thermal budgets.
  • Other doping methods such as ion implantation can be used, but shallow implantation is difficult to achieve by ion implantation.
  • Si-containing diffusion sources can be made using cyclohexasilane as the silicon source.
  • These diffusion sources are preferably made by introducing cyclohexasilane and a dopant precursor to a chamber and depositing a highly doped Si-containing film by thermal CVD onto a substrate, in close proximity to the ultimate destination for the dopant.
  • the amount of dopant precursor introduced to the chamber can vary over a broad range, depending on the ultimate application, but is preferably effective to provide a dopant concentration in the resulting diffusion source in the range of from about lxl O 16 to about lxl 0 22 atoms/cm 3 .
  • the ratio of dopant precursor to cyclohexasilane introduced to the chamber can range from about 0.00001% to 150%, preferably about 0.001% to about 75%, by weight based on total weight of cyclohexasilane and dopant precursor.
  • Diffusion layer deposition temperatures can be in the range of from about 400°C to about 650°C, but are preferably in the range of about 450°C to about 600°C Lower deposition temperatures tend to have a smaller impact on thermal budgets and provide smoother, more continuous films, but higher temperatures tend to provide faster deposition.
  • the thickness of the diffusion source is preferably in the range of about 25 A to about 150 A, more preferably about 50 A to about 100 A.
  • the diffusion source is preferably a continuous Si-containing film having a substantially uniform thickness, more preferably having a thickness non-uniformity of about 10% or less, and a substantially uniform distribution of dopant(s).
  • the Si-containing films described herein are also useful as anti- reflective coatings.
  • Photolithographic processes using intense sources of electromagnetic radiation are typically employed to pattern substrates in semiconductor manufacturing.
  • Anti-reflective coatings are frequently applied to surfaces in order to reduce the amount of reflected radiation.
  • the coating is usually designed so that its anti-reflective properties are maximized for the type of incident radiation by adjusting the thickness of the coating to be some multiple of the wavelength of the radiation. It is generally desirable for the multiple to be as small as possible in order to avoid secondary optical effects, but it is generally more difficult to prepare such thin, optical-quality films.
  • the wavelength of incident radiation used for photolithography has also become shorter, with a commensurate decrease in the desired thickness for the anti-reflective coating.
  • a preferred embodiment provides anti-reflective coatings useful in semiconductor manufacturing.
  • Preferred anti reflective coatings comprise a Si- containing film as described herein that has a substantially uniform thickness, more preferably a thickness non-uniformity of about 10% or less, so that the antireflective properties are substantially constant across the surface of the substrate.
  • the thickness of the anti-reflective coating is preferably selected to be effective to suppress reflection of at least part of the incident radiation, more preferably about 75% or less of the incident radiation is reflected. Typical thicknesses are lower multiples of the wavelength of the incident radiation, preferably about 100 A to about 4000 A, more preferably about 300 A to about 1000 A.
  • the Si-containing film preferably comprises elemental nitrogen, oxygen and/or carbon, and is more preferably selected from the group consisting of Si ⁇ N, Si ⁇ 0 ⁇ N, and Si ⁇ C ⁇ N.
  • Preferred anti-reflective coatings are preferably deposited using cyclohexasilane and, optionally, an oxygen, nitrogen and/or carbon precursor, using the deposition techniques taught elsewhere herein.
  • Preferred oxygen precursors include diatomic oxygen and ozone; preferred nitrogen precursors include hydrazine, atomic nitrogen, hydrogen cyanide, and ammonia; and preferred carbon precursors include carbon dioxide, carbon monoxide, hydrogen cyanide, alkyl silanes and silylated alkanes.
  • Such Si ⁇ N, Si ⁇ 0 ⁇ N, and Si ⁇ C ⁇ N films are also useful for other purposes, preferably for thin etch stops.
  • An apparatus for depositing a Si-containing material, such as but not limited to, cyclohexasilane, trisilane, tetrasilane, disilane, pentasilane on a surface.
  • a schematic diagram illustrating a preferred apparatus is shown in Figure 1.
  • This apparatus 100 comprises a carrier gas source 102, a temperature controlled bubbler 1 12 containing liquid cyclohexasilane 106, and a gas line 103 operatively connecting the gas source 102 to the bubbler 1 12.
  • a CVD chamber 120 equipped with an exhaust line 130, is operatively connected to the bubbler 1 12 by a feed line 1 15.
  • the flow of cyclohexasilane, entrained in the carrier gas, that is vaporized cyclohexasilane 107, from the bubbler 1 12 to the CVD chamber 120, is preferably aided by a temperature regulation source (not shown) operatively disposed in proximity to the bubbler.
  • the temperature regulation source maintains the cyclohexasilane 106 at a temperature in the range of about 10°C to about 70°C, preferably about 20°C to about 52°C, to thereby control the vaporization rate of the cyclohexasilane.
  • the CVD chamber 120 is a single-wafer, horizontal gas flow reactor.
  • the apparatus is also comprised of a manifold (not shown) operatively connected to the feed line 1 15 to control the passage of the cyclohexasilane 106 from the bubbler 1 12 to the CVD chamber 120, desirably in a manner to allow separate tuning of the gas flow uniformity over the substrate(s) housed in the chamber 120.
  • the feed line 1 15 is maintained at a temperature in the range of about 35°C to about 70°C, preferably about 40°C to about 52°C, to prevent condensation of the vaporized cyclohexasilane 107.
  • the apparatus described above in Figure 1 can be modified according to Figure 2 to incorporate a decomposition chamber 218 in feed line 215.
  • Vaporized cyclohexasilane 207 enters decomposition chamber 218 and decomposition is initiated by way of thermal, photolysis, radiation, ion bombardment, plasma, etc., Such decomposition methods are known to those skilled in the art.
  • the yield of a semiconductor device manufacturing process that utilizes silane can be improved by replacing the silane with cyclohexasilane, as described herein.
  • the replacement may improve yields in a variety of processes, it has particular utility when the process involves depositing a Si-containing film having an average thickness of about 2000 A or less, and becomes increasingly preferred as film thickness is decreased.
  • the replacement is useful for depositing films having a thickness of about 300 A or less, even more useful for depositing films having a thickness of about 150 A or less, and especially useful when for depositing films having a thickness of about 100 A or less.
  • the replacement is particularly useful for improving yields when the surface area of the substrate is about 300 cm 2 or greater; and even more so when the surface area is about 700 cm 2 or greater.
  • the replacement of silane with cyclohexasilane improves device yield by about 2% or more, more preferably about 5% or more, calculated as [cyclohexasilane device yield-silane device yield]/silane device yield, and multiplying by 100 to express the result as a percentage.
  • a preferred replacement method involves modifying a CVD process to take advantage of the ability to deposit cyclohexasilane at a lower temperature, e.g., using the temperature parameters discussed above for the thermal CVD of cyclohexasilane.
  • the replacement of silane with cyclohexasilane preferably further involves reducing the deposition temperature to T t , where T s >T t .
  • T t is in the range of about 450°C to about 600°C, more preferably in the range of about 450°C to about 525°C
  • the process of introducing silane to the chamber is also modified when replacing the silane with cyclohexasilane to take into account the liquid nature of cyclohexasilane at room temperature as discussed above, e.g., by using a bubbler, heated gas lines, etc.
  • the present invention further provides a process for selectively and epitaxially depositing silicon and silicon-containing materials while accomplishing in situ substitutional doping of Si-containing materials.
  • improved methods disclosed herein are capable of achieving commercially significant levels of substitutional doping without unduly sacrificing deposition and/or growth speed, selectivity, and/or the quality (e.g., crystal quality) of the deposited materials.
  • the process is versatile enough to form silicon-containing materials with varied elemental concentrations while having a fast deposition and/or growth rate and maintaining a process temperature in the range of about 250°C - 550°C, and preferably about 500°C - 525°C while maintaining a pressure in the range of about 10 mTorr - 200 Torr and preferably lOmTorr - 50 Torr and more preferably l OmTorr - 10 Torr.
  • the etching step takes place at the same temperature as the deposition and/or growth step.
  • deposition and/or growth parameters that are critical to selectively and epitaxially depositing silicon and silicon-containing materials while accomplishing in situ substitutional doping of Si-containing materials.
  • two critical parameters that allow one to accomplish the teachings of the present invention are the use higher order silanes including straight and isomeric forms, such as, but not limited to cyclohexasilane (n-cyclohexasilane, iso-cyclohexasilane and cyclo- cyclohexasilane) in combination with a low pressure chemical vapor deposition and/or growth system (as shown if Figures 1 and 2) which has been modified in accordance with the present invention to incorporate the use of a high speed pump.
  • higher order silanes such as, but not limited to cyclohexasilane
  • cyclohexasilane enables higher deposition and/or growth rate at lower temperature and for silicon-containing films incorporating carbon, higher incorporation of substitutional carbon atoms than the use of mono-silane as a silicon source gas.
  • Higher silanes, such as cyclohexasilane while easier to deposit at lower temperatures, thereby providing greater selectivity by enabling amorphous growth versus poly crystalline material.
  • Higher silanes have traditionally been difficult to employ in epitaxy processes as they are prone to polymerization, thus forming higher chain polymers (gas phase nucleation) which deposit in the form of particles.
  • epitaxial silicon films may be formed by exposing a substrate contained within a chamber to a relatively high carrier gas flow rate in combination with a relatively low flow rate of cyclohexasilane by utilizing a reduced pressure CVD system having a high speed pump, at a temperature of less than about 550°C and a pressure in the range of about 10 mTorr - 200 Torr, preferably l OmTorr - 50 Torr and more preferably lOmTorr - 10 Torr.
  • the high speed pump is capable of flowing a carrier gas into said chamber at concentrations so high that any contaminants, such as but not limited to oxygen, water, carbon monoxide, carbon dioxide, siloxanes, disiloxanes, and higher siloxanes present are diluted out.
  • the crystalline Si may be in situ doped to contain relatively high levels of substitutional carbon by carrying out the deposition and/or growth at a relatively high flow rate using cyclohexasilane as a silicon source and a carbon- containing gas as a carbon source under these modified CVD conditions.
  • the deposition and/or growth of a single crystalline silicon film onto the substrate takes place at a temperature of less than about 550°C and a pressure in the range of about 10 mTorr - 200 Torr, preferably 1 OmTorr - 50 Torr and more preferably lOmTorr - 10 Torr, the single crystalline silicon film comprises about 1.8 atomic % to about 3.0 atomic % substitutional carbon, as determined by x-ray diffraction.
  • the deposition and/or growth of carbon-doped layers in accordance with this invention can be conducted with or without an etchant gas, selectively or non-selectively, as described in greater detail below. In the event an etchant gas is employed there is the added benefit that the pressure and temperature do not need to be cycled depending upon whether the cycle is a deposition and/or growth or etching cycle.
  • a relatively high carrier gas flow rate e.g., a relatively low ratio of cyclohexasilane flow rate to hydrogen carrier gas flow rate
  • a relatively low cyclohexasilane flow rate e.g., about 50mg/min to about 200 mg/min
  • a relatively low deposition and/or growth pressure e.g., preferably in the range of from about 10 millitorr to about ten Torr and more preferably at a pressure of less than 1 Torr
  • a relatively low deposition and/or growth temperature e.g., preferably in the range of from about 250°C to about 550°C, more preferably in the range of from about 500°C to about 525°C.
  • the amount of carbon substitutional ⁇ doped into a Si-containing material may be determined by measuring the perpendicular lattice spacing of the doped Si-containing material by x-ray diffraction. See, e.g., Judy L. Hoyt, "Substitutional Carbon Incorporation and Electronic Characterization of Si) -y C y /Si and Sii -x-y Ge x C y /Si Heteroj unctions," Chapter 3 in “Silicon-Germanium Carbon Alloy,” Taylor and Francis, N.Y., pp. 59-89, 2002. As illustrated in FIG.
  • the total carbon content in the doped silicon may be determined by SIMS, and the non-substitutional carbon content may be determined by subtracting the substitutional carbon content from the total carbon content.
  • the amount of other elements substitutionally doped into other Si- containing materials may be determined in a similar manner.
  • Various embodiments provide methods for depositing carbon-doped Si- containing materials (such as carbon-doped single crystalline Si) using cyclohexasilane, a carbon source and, optionally, source(s) of other elements such as electrical active dopant(s).
  • cyclohexasilane such as carbon-doped single crystalline Si
  • source(s) of other elements such as electrical active dopant(s).
  • the delivery of decomposed cyclohexasilane and a carbon source to the surface of a substrate preferably results in the formation of an epitaxial carbon-doped Si-containing film on the surface of the substrate.
  • an etchant gas may be delivered to the substrate in conjunction with decomposed cyclohexasilane and carbon source, and the Si-containing film is deposited selectively over single crystal substrates or single crystal regions of mixed substrates.
  • Methods employing relatively high deposition and/or growth rates are preferred, and in preferred embodiments such methods have been found to result in the deposition and/or growth of in situ doped crystalline Si-containing materials containing relatively high levels of substitutional carbon.
  • One or more embodiments of the invention generally provide processes to selectively and epitaxially deposit silicon-containing materials on monocrystalline surfaces of a substrate during fabrication of electronic devices.
  • the epitaxial process typically includes repeating a cycle of a deposition and/or growth process and an etching process until the desired thickness of an epitaxial layer is grown. Exemplary alternating deposition and etch processes are disclosed in U.S. Patent No. 7,312, 128 the entire content of which is incorporated herein by reference.
  • the deposition process includes exposing the substrate surface to a deposition gas containing at least cyclohexasilane and a carrier gas, wherein the carrier has a flow rate from 0-20,000 and preferably from 2,000 to 10,000 and more preferably from 100 to 2000 times greater than the flow rate of cyclohexasilane.
  • the deposition gas may also include a germanium source and/or carbon source, as well as a dopant source.
  • the deposition gas contains a sufficient amount of an n-type dopant precursor that results in the in the epitaxial film containing at least about lxl 0 20 atoms/cm 3 of an n-type dopant.
  • the final epitaxial film contains at least about 2x10 20 atoms/cm 3 of an n-type dopant, and more specifically, at least about 5x10 20 atoms/cm 3 of an n-type dopant.
  • these levels of dopant concentration will be referred to as heavily doped with an n-type dopant.
  • suitable n- type dopants include P, As and Sb.
  • the substrate is exposed to an etching gas.
  • the etching gas includes a carrier gas and an etchant, such as chlorine gas or hydrogen chloride.
  • the etching gas removes silicon-containing materials deposited during the deposition process.
  • the polycrystalline/amorphous layer is removed at a faster rate than the epitaxial layer. Therefore, the net result of the deposition and etching processes forms epitaxially grown silicon-containing material on monocrystalline surfaces while minimizing growth, if any, of polycrystalline/amorphous silicon-containing material on the secondary surfaces.
  • a cycle of the deposition and etching processes may be repeated as needed to obtain the desired thickness of silicon-containing materials.
  • the silicon-containing materials which can be deposited by embodiments of the invention include silicon, silicon germanium, silicon carbon, silicon germanium carbon, and variants thereof, including dopants.
  • deposition processes may be conducted at lower temperatures than etching reactions, since etchants often need a high temperature to be activated.
  • cyclohexasilane due to the fact it can be deposited amorphously, allows for the etching process to be maintained at temperatures consistent with the deposition temperature thereby minimizing the effort to regulate and adjust the reaction temperatures throughout the deposition process.
  • Another preferred embodiment provides a method for performing blanket or nonselective epitaxy with alternating steps of deposition and etch results in improved crystallinity of epitaxial films grown using cyclohexasilane.
  • An exemplary process includes loading a substrate into a process chamber and adjusting the conditions within the process chamber to a desired temperature and pressure. Then, a deposition process is initiated to form an epitaxial layer on a monocrystalline surface of the substrate at a rate of approximately 2-4 nm per minute. The deposition process is then terminated.
  • the substrates may be unpatterned or patterned.
  • Patterned substrates are substrates that include electronic features formed into or onto the substrate surface.
  • the patterned substrate usually contains monocrystalline surfaces and at least one secondary or feature surface that is non-monocrystalline, such as a dielectric, polycrystalline or amorphous surfaces.
  • Monocrystalline surfaces include the bare crystalline substrate or a deposited single crystal layer usually made from a material such as silicon, silicon germanium or silicon carbon.
  • Polycrystalline or amorphous surfaces may include dielectric materials, such as polysilicon, photoresist materials, oxides or nitrides, specifically silicon oxide or silicon nitride, as well as amorphous silicon surfaces or combinations thereof.
  • the conditions in the process chamber are adjusted to a predetermined temperature and pressure.
  • the temperature is tailored to the particular conducted process.
  • the process chamber is maintained at a temperature below about 550°C during deposition and etching.
  • the process chamber is usually maintained at a pressure in the range of about 10 mTorr - 200 Torr, preferably lOmTorr - 50 Torr and more preferably lOmTorr - 10 Torr during deposition.
  • the pressure may fluctuate during and between process steps, but is generally maintained constant.
  • the substrate is exposed to a deposition gas to form an epitaxial layer.
  • the substrate is exposed to the deposition gas for a period of time of about 0.5 seconds to about 30 seconds, for example, from about 1 second to about 20 seconds, and more specifically from about 5 seconds to about 10 seconds.
  • the deposition step lasts for about 10 to 1 1 seconds.
  • the specific exposure time of the deposition process is determined in relation to the exposure time during a subsequent etching process, as well as particular precursors and temperature used in the process.
  • the substrate is exposed to the deposition gas long enough to form a maximized thickness of an epitaxial layer.
  • the deposition gas contains at least eyelohexasilane and a carrier gas, and may contain at least one secondary elemental source, such as a carbon source or precursor and/or a germanium source or precursor. Also, the deposition gas may further include a dopant compound to provide a source of a dopant, such as boron, arsenic, phosphorus, gallium and/or aluminum. In an alternative embodiment, the deposition gas may include at least one etchant.
  • Cyclohexasilane as introduced to said chamber typically has a purity level in the range of approximately 95 % to approximately 99.9% and having oxygenated impurities less than 2000 ppm and preferably having oxygenated impurities less than 2 ppm and more preferably having oxygenated impurities less than 500 ppb.
  • Cyclohexasilane is usually provided into the process chamber at a rate in a range from about 5 seem to about 500 seem, preferably from about 10 seem to about 300 seem, and more preferably from about 50 seem to about 200 seem, for example, about 100 seem.
  • cyclohexasilane is flowed at about 60 seem.
  • Silicon sources useful in the deposition gas to deposit silicon- containing compounds include but are not limited to cyclohexasilane, halogenated cyclohexasilanes and organocyclohexasilanes.
  • Halogenated silanes include compounds with the empirical formula X' y Si 4 H(io -y ), where X -F, CI, Br or I.
  • Cyclohexasilane is usually provided into the process chamber along with a carrier gas.
  • the carrier gas has a flow rate from about 1 slm (standard liters per minute) to about 50 slm, at a pressure of less than 100 Torr. For example, from about 12 slm to about 45 slm, and more specifically from about 20 slm to about 40 slm, for example, about 34 slm at a pressure of about less than 100 Torr.
  • Carrier gases may include helium, nitrogen (N 2 ), hydrogen (H 2 ), argon, and combinations thereof.
  • a carrier gas may be selected based on the precursor(s) used and/or the process temperature during the epitaxial process.
  • the carrier gas is the same throughout for each of the deposition and etching steps. However, some embodiments may use different carrier gases in particular steps.
  • hydrogen is utilized as a carrier gas in embodiments featuring low temperature (e.g., less than 550°C) processes.
  • the deposition gas used also contains at least one secondary elemental source, such as a carbon source and/or a germanium source.
  • a carbon source may be added during deposition to the process chamber with the silicon source and carrier gas to form a silicon-containing compound, such as a silicon carbon material.
  • a carbon source, i.e. 100%, is usually provided into the process chamber at a rate in the range from about 0.1 seem to about 40 seem, for e x ample, from about 3 seem to about 25 seem, and more specifically, from about 5 seem to about 25 seem, for example, about 10 seem.
  • the carbon sources as introduced to said chamber typically has a purity level in the range of approximately 97 % to approximately 99.9% and having oxygenated impurities less than 100 ppm and preferably having oxygenated impurities less than 10 ppm and more preferably having oxygenated impurities less than 500 ppb.
  • the deposition gas used during deposition may further include at least one dopant compound to provide a source of elemental dopant, such as boron, arsenic, phosphorus, gallium or aluminum.
  • Dopants provide the deposited silicon- containing compounds with various conductive characteristics, such as directional electron flow in a controlled and desired pathway required by the electronic device. Films of the silicon-containing compounds are doped with particular dopants to achieve the desired conductive characteristic.
  • the silicon-containing compound is doped n-type, such as with phosphorus, antimony and/or arsenic to a concentration in the range from about 10 20 atoms/cm 3 to about 10 21 atoms/cm 3 .
  • a dopant source is usually provided into the process chamber during deposition in the range from about 0.1 seem to about 20 seem, for example, from about 0.5 seem to about 10 seem, and more specifically from about 1 seem to about 5 seem, for example, about 3 seem.
  • Alkylphosphines include trimethylphosphine ((CH 3 ) 3 P), dimethylphosphine ((CH 3 ) 2 PH), triethylphosphine ((CH 3 CH 2 ) 3 P) and diethylphosphine ((CH 3 CH 2 ) 2 PH).
  • Examples of aluminum and gallium dopant sources include trimethylaluminum (Me 3 Al), triethylaluminum (Et 3 Al), dimethylaluminumchloride (Me 2 AlCl), aluminum chloride (A1C1 3 ), trimethylgallium (Me 3 Ga), triethylgallium (Et 3 Ga), dimethylgalliumchloride (Me 2 GaCl) and gallium chloride (GaCl 3 ).
  • the process chamber may be flushed with a purge gas or the carrier gas and/or the process chamber may be evacuated with a vacuum pump.
  • the purging and/or evacuating processes remove excess deposition gas, reaction by-products and other contaminants.
  • the process chamber may be purged for about 10 seconds by flowing a carrier gas at about 5 slm. A cycle of deposition and etch may be repeated for numerous cycles.
  • a blanket or non-selective deposition is performed at low temperatures, for example, below about 550°C and lower, using a silicon source, preferably cyclohexasilane.
  • a silicon source preferably cyclohexasilane.
  • This assists in amorphous growth (rather than polycrystalline) on dielectric surfaces such as oxide and nitride during the deposition step (nonselective deposition), which facilitates removal of the layer on dielectric surfaces by a subsequent etch step and minimizes damage on single crystalline layer grown on the crystalline substrate.
  • a typical selective epitaxy process involves a deposition reaction and an etch reaction.
  • the epitaxial layer is formed on a monocrystalline surface while a polycrystalline layer is deposited on at least a second layer, such as an existing polycrystalline layer and/or an amorphous layer.
  • the deposition and etch reactions occur simultaneously with relatively different reaction rates to an epitaxial layer and to a polycrystalline layer.
  • the deposited polycrystalline layer is generally etched at a faster rate than the epitaxial layer. Therefore, by changing the concentration of an etchant gas, the net selective process results in deposition of epitaxy material and limited, or no, deposition of polycrystalline material.
  • a selective epitaxy process may result in the formation of an epilayer of silicon-containing material on a monocrystalline silicon surface while no deposition is left on the spacer.
  • Source/drain extension features are manufactured by etching a silicon surface to make a recessed source/drain feature and subsequently filling the etched surface with a selectively grown epilayers, such as a silicon germanium (SiGe) material.
  • a selectively grown epilayers such as a silicon germanium (SiGe) material.
  • Selective epitaxy permits near complete dopant activation with in situ doping, so that the post annealing process is omitted. Therefore, junction depth can be defined accurately by silicon etching and selective epitaxy.
  • the ultra shallow source/drain junction inevitably results in increased series resistance. Also, junction consumption during silicide formation increases the series resistance even further.
  • an elevated source/drain is epitaxially and selectively grown on the junction. Typically, the elevated source/drain layer is undoped silicon.
  • Embodiments of the present invention provide selective epitaxy processes for silicon-containing films, for example, Si:C films with high substitutional carbon concentration (greater than 1.8 %), which can be used for forming tensile stressed channel of N-type Metal Oxide Semiconductor Field Effect Transistor (MOSFET) structure when epitaxial films are grown on recessed source/drain of a transistor.
  • MOSFET Metal Oxide Semiconductor Field Effect Transistor
  • cyclohexasilane enables high growth rates at very low temperatures.
  • the methods follow a sequential order, however, the process is not limited to the exact steps described herein. For example, other process steps can be inserted between steps as long as the order of process sequence is maintained.
  • the individual steps of an epitaxial deposition will now be described according to one or more embodiments.
  • MOSFET devices formed by processes described herein may contain a pMOS component or an nMOS component.
  • the pMOS component, with a p-type channel has holes that are responsible for channel conduction, while the nMOS component, with a n-type channel, has electrons that are responsible channel conduction. Therefore, for example, a silicon-containing material such as SiGe may be deposited in a recessed area to form a pMOS component. In another example, a silicon-containing film such as SiC may be deposited in a recessed area to form a nMOS component. SiGe is used for pMOS application for several reasons.
  • SiGe grown epitaxially on the top of silicon has compressive stress inside the film because the lattice constant of SiGe is larger than that of silicon.
  • the compressive stress is transferred in the lateral dimension to create compressive strain in the pMOS channel and to increase mobility of the holes.
  • SiC can be used in the recessed areas to create tensile stress in the channel, since the lattice constant of SiC is smaller than that of silicon. The tensile stress is transferred into the channel and increases the electron mobility. Therefore, in one embodiment, a first silicon-containing layer is formed with a first lattice strain value and a second silicon-containing layer is formed with a second lattice strain value.
  • the carbon-doped silicon epitaxial layer is desirable to selectively form the carbon-doped silicon epitaxial layer on the source/drain either through selective deposition or by post-deposition processing. Furthermore, it is desirable for the carbon-doped silicon epitaxial layer to contain substitutional C atoms to induce tensile strain in the channel. Higher channel tensile strain can be achieved with increased substitutional C content in a carbon-doped silicon source and drain.
  • n- doped epitaxial layer involves exposing a substrate in a process chamber to deposition gases including a silicon source, a carbon source and an n-dopant source at a first temperature and pressure and then exposing the substrate to an etchant without varying the temperature or the pressure.
  • deposition gases including a silicon source, a carbon source and an n-dopant source at a first temperature and pressure and then exposing the substrate to an etchant without varying the temperature or the pressure.
  • a source/drain extension is formed within a MOSFET device 400 wherein the silicon-containing layers are epitaxially and selectively deposited on the surface of the substrate 410.
  • a source/drain region 412 is formed by implanting ions into the surface of a substrate 410. The segments of source/drain region 412 are bridged by the gate 418 formed on gate oxide layer 416 and spacer 414.
  • silicon-containing epitaxial layer 420 and polycrystalline layer 422 are SiC-containing layers with a carbon concentration in a range of at least about 1.8 atomic % substitutional carbon to at least about 3.0 atomic % substitutional carbon, as determined by x-ray diffraction.
  • silicon-containing epitaxial layer 420 and polycrystalline layer 422 are SiGe-containing layers with a germanium concentration in a range from about 1 at % to about 50 at %, preferably about 24 at % or less.
  • Multiple SiGe-containing layers containing varying amounts of silicon and germanium may be stacked to form silicon-containing epitaxial layer 240 with a graded elemental concentration.
  • a first SiGe-layer may be deposited with a germanium concentration in a range from about 15 at % to about 25 at % and a second SiGe-layer may be deposited with a germanium concentration in a range from about 25 at % to about 35 at %.
  • FIG. 3 illustrates a preferred reactor system 300 employing a carrier gas 302 (helium in the illustrated embodiment), a carbon source 304 (methylsilane in the illustrated embodiment), a silicon source 306 (cyclohexasilane in the illustrated embodiment) and an etching gas 308.
  • Reactor system 300 utilized by the present invention comprises a Centura ® RP-CVD (Reduced Pressure-Vacuum Chemical Vapor Deposition) manufactured by Applied Materials and modified according to the present invention by adding a high flow pump 350 as discussed further below.
  • Centura ® RP-CVD Reduced Pressure-Vacuum Chemical Vapor Deposition
  • the gases introduced into the reactor system 300 are highly purified by a gas purifier (not shown) before being introduced into reaction chamber 320. Therefore, it is necessary to provide the gas purifier such that the gas is introduced into the reaction chamber 320 after having been purified highly. Thereby, an impurity of oxygen, water, siloxanes, carbon monoxide (CO), carbon dioxide (C0 2 ) or the like included in the gas, is minimized.
  • Some of the carrier gas 302 flow is shunted to a vaporizer in the form of a bubbler 312, from which carrier gas 302 carries vaporized cyclohexasilane 307 at a ratio of approximately 0.005, thereby forming a saturated process gas.
  • the carrier gas 302 merges with the other reactants at the main gas cabinet 330, upstream of the injection manifold (not shown) for deposition chamber 320.
  • a source of etchant gas 308 is also optionally provided for selective deposition processes.
  • the reactor system 300 also includes a high speed pump 350. It has been discovered that this high speed pump 350 is essential to the present invention as it allows main carrier gas 302 flowing to the chamber to flow at a much higher rate than that of cyclohexasilane saturated vapor 307, that is in the range of 0- 20,000 and preferably from 2,000 to 10,000 and more preferably from 100 to 2000 times greater than the flow rate of the cyclohexasilane saturated vapor 307.
  • interstitial oxygen content should be 1 E18 atom/cm 3 or lower and preferably less than 2E17 atom/cm 3 .
  • Interfacial oxygen content should be below SIMS detectable limits (dose at interface) with a background of 5E17 atom/cm 3 .
  • Interstitial carbon content should be 5E17 atom/cm 3 or lower.
  • Interfacial carbon should be below SIMS detectable limits with a minimum background of 5E17 atom/cm 3 or lower. This requirement is accomplished as a result of the high speed pump 350 as carrier gas 302 at pressures in the range of about 10 mTorr - 200 Torr, preferably lOmTorr - 50 Torr and more preferably l OmTorr - 10 Torr has a flow rate of up to 50slm which is approximately two hundred times that of cyclohexasilane saturated vapor 307; consequently, impurities that may be present in reaction chamber 320 are literally diluted out.
  • a central controller (not shown), electrically connected to the various controllable components of reactor system 300.
  • the controller is programmed to provide gas flows, temperatures, pressures, etc., to practice the deposition processes as described herein upon a substrate housed within reaction chamber 320.
  • the controller typically includes a memory and a microprocessor, and may be programmed by software, hardwired or a combination of the two, and the functionality of the controller may be distributed among processors located in different physical locations. Accordingly, the controller can also represent a plurality of controllers distributed through reactor system 300.
  • the dopant hydride source 310 is preferably also provided to produce in situ doped semiconductor layers with enhanced conductivity.
  • the dopant hydride is arsine or phosphine, and the layer is n-type doped.
  • the diluent inert gas for the dopant hydride is also hydrogen gas.
  • phosphine 310 and methylsilane 304 are preferably stored at their source containers in, e.g., hydrogen.
  • Typical dopant hydride concentrations are 0.1% to 5% in hydrogen 302, more typically 0.5% to 1.0% in hydrogen for arsine and phosphine.
  • Typical carbon source concentrations are 5% to 50% in hydrogen 302, more typically 10% to 30% in hydrogen.
  • experiments are being conducted with 20% methylsilane 304 in hydrogen 302.
  • the apparatus described above in Figure 3 can be modified to incorporate a decomposition chamber (not shown) in feed line /.
  • Vaporized cyclohexasilane 307 enters decomposition chamber and decomposition is initiated by way of thermal, photolysis, radiation, ion bombardment, plasma, etc., Such decomposition methods are known to those skilled in the art.

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Abstract

Le cyclohexasilane est utilisé dans les procédés de dépôt chimique en phase vapeur pour déposer des films contenant du silicium épitaxié sur des substrats. Ces procédés sont utiles dans la fabrication de semi-conducteurs pour fournir une variété d'avantages, y compris un dépôt uniforme sur des surfaces hétérogènes, des taux de dépôt élevés, et une plus grande productivité de fabrication. En outre, le Si cristallin peut être dopé in situ pour contenir des niveaux relativement élevés de carbone substitutionnel en réalisant le dépôt à un débit relativement élevé en utilisant le cyclohexasilane en tant que source de silicium et un gaz contenant du carbone tel que le dodécalméthylcyclohexasilane ou le tétraméthyldisilane dans des conditions de CVD modifiées.
EP11801265.7A 2010-07-02 2011-06-23 Films fins et procédés de fabrication associés utilisant du cyclohexasilane Withdrawn EP2589071A4 (fr)

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Families Citing this family (290)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9394608B2 (en) 2009-04-06 2016-07-19 Asm America, Inc. Semiconductor processing reactor and components thereof
US8802201B2 (en) 2009-08-14 2014-08-12 Asm America, Inc. Systems and methods for thin-film deposition of metal oxides using excited nitrogen-oxygen species
JP5719546B2 (ja) * 2009-09-08 2015-05-20 東京応化工業株式会社 塗布装置及び塗布方法
JP5469966B2 (ja) * 2009-09-08 2014-04-16 東京応化工業株式会社 塗布装置及び塗布方法
KR20130139844A (ko) * 2010-07-02 2013-12-23 매티슨 트라이-개스, 인크. Si-함유 재료 및 치환적으로 도핑된 결정성 si-함유 재료의 선택적 에피택시
CN101916770B (zh) * 2010-07-13 2012-01-18 清华大学 具有双缓变结的Si-Ge-Si半导体结构及其形成方法
US9218962B2 (en) 2011-05-19 2015-12-22 Globalfoundries Inc. Low temperature epitaxy of a semiconductor alloy including silicon and germanium employing a high order silane precursor
US9312155B2 (en) 2011-06-06 2016-04-12 Asm Japan K.K. High-throughput semiconductor-processing apparatus equipped with multiple dual-chamber modules
JP6121993B2 (ja) * 2011-06-10 2017-04-26 マサチューセッツ インスティテュート オブ テクノロジー 半導体への高濃度活性ドーピングおよびこのようなドーピングにより生成される半導体装置
US10854498B2 (en) 2011-07-15 2020-12-01 Asm Ip Holding B.V. Wafer-supporting device and method for producing same
US20130023129A1 (en) 2011-07-20 2013-01-24 Asm America, Inc. Pressure transmitter for a semiconductor processing environment
US9017481B1 (en) 2011-10-28 2015-04-28 Asm America, Inc. Process feed management for semiconductor substrate processing
US9214393B2 (en) * 2012-04-02 2015-12-15 Taiwan Semiconductor Manufacturing Co., Ltd. Surface tension modification using silane with hydrophobic functional group for thin film deposition
US9396902B2 (en) * 2012-05-22 2016-07-19 Varian Semiconductor Equipment Associates, Inc. Gallium ION source and materials therefore
JP6275373B2 (ja) * 2012-08-28 2018-02-07 株式会社日本触媒 シリコン膜形成方法、およびシリコン膜形成装置
US10714315B2 (en) 2012-10-12 2020-07-14 Asm Ip Holdings B.V. Semiconductor reaction chamber showerhead
JP2014093345A (ja) * 2012-11-01 2014-05-19 Japan Advanced Institute Of Science & Technology Hokuriku 複数の基板上へシリコン膜を一括して形成する方法
US9617161B2 (en) * 2012-12-25 2017-04-11 Nippon Shokubai Co., Ltd. Method for producing cyclohexasilane
JP6343145B2 (ja) * 2012-12-25 2018-06-13 株式会社日本触媒 シクロヘキサシランの製造方法
WO2014103728A1 (fr) * 2012-12-27 2014-07-03 昭和電工株式会社 Dispositif de formation de film
WO2014103727A1 (fr) * 2012-12-27 2014-07-03 昭和電工株式会社 DISPOSITIF DE FORMATION DE FILM DE SiC ET PROCÉDÉ DE PRODUCTION DE FILM DE SiC
TWI607510B (zh) * 2012-12-28 2017-12-01 半導體能源研究所股份有限公司 半導體裝置及半導體裝置的製造方法
US20160376700A1 (en) 2013-02-01 2016-12-29 Asm Ip Holding B.V. System for treatment of deposition reactor
US9650727B2 (en) * 2013-07-03 2017-05-16 Applied Materials, Inc. Reactor gas panel common exhaust
JP2015053382A (ja) * 2013-09-06 2015-03-19 株式会社日本触媒 シリコン含有エピタキシャル膜およびその製造方法ならびに半導体装置
JP6368465B2 (ja) * 2013-09-06 2018-08-01 株式会社日本触媒 排ガス処理方法
US10683571B2 (en) 2014-02-25 2020-06-16 Asm Ip Holding B.V. Gas supply manifold and method of supplying gases to chamber using same
US10167557B2 (en) 2014-03-18 2019-01-01 Asm Ip Holding B.V. Gas distribution system, reactor including the system, and methods of using the same
US11015245B2 (en) 2014-03-19 2021-05-25 Asm Ip Holding B.V. Gas-phase reactor and system having exhaust plenum and components thereof
US10858737B2 (en) 2014-07-28 2020-12-08 Asm Ip Holding B.V. Showerhead assembly and components thereof
US9890456B2 (en) 2014-08-21 2018-02-13 Asm Ip Holding B.V. Method and system for in situ formation of gas-phase compounds
US10941490B2 (en) 2014-10-07 2021-03-09 Asm Ip Holding B.V. Multiple temperature range susceptor, assembly, reactor and system including the susceptor, and methods of using the same
US9657845B2 (en) 2014-10-07 2017-05-23 Asm Ip Holding B.V. Variable conductance gas distribution apparatus and method
CN105609406B (zh) * 2014-11-19 2018-09-28 株式会社日立国际电气 半导体器件的制造方法、衬底处理装置、气体供给系统
US10276355B2 (en) 2015-03-12 2019-04-30 Asm Ip Holding B.V. Multi-zone reactor, system including the reactor, and method of using the same
US10458018B2 (en) 2015-06-26 2019-10-29 Asm Ip Holding B.V. Structures including metal carbide material, devices including the structures, and methods of forming same
US10600673B2 (en) 2015-07-07 2020-03-24 Asm Ip Holding B.V. Magnetic susceptor to baseplate seal
US10211308B2 (en) 2015-10-21 2019-02-19 Asm Ip Holding B.V. NbMC layers
KR102458309B1 (ko) * 2015-12-28 2022-10-24 삼성전자주식회사 SiOCN 물질막의 형성 방법 및 반도체 소자의 제조 방법
US11139308B2 (en) 2015-12-29 2021-10-05 Asm Ip Holding B.V. Atomic layer deposition of III-V compounds to form V-NAND devices
US10529554B2 (en) 2016-02-19 2020-01-07 Asm Ip Holding B.V. Method for forming silicon nitride film selectively on sidewalls or flat surfaces of trenches
US10190213B2 (en) 2016-04-21 2019-01-29 Asm Ip Holding B.V. Deposition of metal borides
US10865475B2 (en) 2016-04-21 2020-12-15 Asm Ip Holding B.V. Deposition of metal borides and silicides
US10367080B2 (en) 2016-05-02 2019-07-30 Asm Ip Holding B.V. Method of forming a germanium oxynitride film
US10032628B2 (en) 2016-05-02 2018-07-24 Asm Ip Holding B.V. Source/drain performance through conformal solid state doping
US11453943B2 (en) 2016-05-25 2022-09-27 Asm Ip Holding B.V. Method for forming carbon-containing silicon/metal oxide or nitride film by ALD using silicon precursor and hydrocarbon precursor
US10612137B2 (en) 2016-07-08 2020-04-07 Asm Ip Holdings B.V. Organic reactants for atomic layer deposition
US9859151B1 (en) 2016-07-08 2018-01-02 Asm Ip Holding B.V. Selective film deposition method to form air gaps
US10714385B2 (en) 2016-07-19 2020-07-14 Asm Ip Holding B.V. Selective deposition of tungsten
US9887082B1 (en) 2016-07-28 2018-02-06 Asm Ip Holding B.V. Method and apparatus for filling a gap
US9812320B1 (en) 2016-07-28 2017-11-07 Asm Ip Holding B.V. Method and apparatus for filling a gap
KR102532607B1 (ko) 2016-07-28 2023-05-15 에이에스엠 아이피 홀딩 비.브이. 기판 가공 장치 및 그 동작 방법
CN107815730A (zh) * 2016-09-14 2018-03-20 上海新昇半导体科技有限公司 掺杂气体缓冲装置、掺杂气体供给装置及方法
US10643826B2 (en) 2016-10-26 2020-05-05 Asm Ip Holdings B.V. Methods for thermally calibrating reaction chambers
US11532757B2 (en) 2016-10-27 2022-12-20 Asm Ip Holding B.V. Deposition of charge trapping layers
US10643904B2 (en) 2016-11-01 2020-05-05 Asm Ip Holdings B.V. Methods for forming a semiconductor device and related semiconductor device structures
US10229833B2 (en) 2016-11-01 2019-03-12 Asm Ip Holding B.V. Methods for forming a transition metal nitride film on a substrate by atomic layer deposition and related semiconductor device structures
US10714350B2 (en) 2016-11-01 2020-07-14 ASM IP Holdings, B.V. Methods for forming a transition metal niobium nitride film on a substrate by atomic layer deposition and related semiconductor device structures
US10134757B2 (en) 2016-11-07 2018-11-20 Asm Ip Holding B.V. Method of processing a substrate and a device manufactured by using the method
KR102546317B1 (ko) 2016-11-15 2023-06-21 에이에스엠 아이피 홀딩 비.브이. 기체 공급 유닛 및 이를 포함하는 기판 처리 장치
KR20180068582A (ko) 2016-12-14 2018-06-22 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
US11581186B2 (en) 2016-12-15 2023-02-14 Asm Ip Holding B.V. Sequential infiltration synthesis apparatus
US11447861B2 (en) 2016-12-15 2022-09-20 Asm Ip Holding B.V. Sequential infiltration synthesis apparatus and a method of forming a patterned structure
KR20180070971A (ko) 2016-12-19 2018-06-27 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
US10269558B2 (en) 2016-12-22 2019-04-23 Asm Ip Holding B.V. Method of forming a structure on a substrate
US10867788B2 (en) 2016-12-28 2020-12-15 Asm Ip Holding B.V. Method of forming a structure on a substrate
US11390950B2 (en) 2017-01-10 2022-07-19 Asm Ip Holding B.V. Reactor system and method to reduce residue buildup during a film deposition process
US10655221B2 (en) 2017-02-09 2020-05-19 Asm Ip Holding B.V. Method for depositing oxide film by thermal ALD and PEALD
US10468261B2 (en) 2017-02-15 2019-11-05 Asm Ip Holding B.V. Methods for forming a metallic film on a substrate by cyclical deposition and related semiconductor device structures
US10529563B2 (en) 2017-03-29 2020-01-07 Asm Ip Holdings B.V. Method for forming doped metal oxide films on a substrate by cyclical deposition and related semiconductor device structures
USD876504S1 (en) 2017-04-03 2020-02-25 Asm Ip Holding B.V. Exhaust flow control ring for semiconductor deposition apparatus
US9923081B1 (en) * 2017-04-04 2018-03-20 Applied Materials, Inc. Selective process for source and drain formation
US10256322B2 (en) * 2017-04-04 2019-04-09 Applied Materials, Inc. Co-doping process for n-MOS source drain application
KR102457289B1 (ko) 2017-04-25 2022-10-21 에이에스엠 아이피 홀딩 비.브이. 박막 증착 방법 및 반도체 장치의 제조 방법
US10892156B2 (en) 2017-05-08 2021-01-12 Asm Ip Holding B.V. Methods for forming a silicon nitride film on a substrate and related semiconductor device structures
US10770286B2 (en) 2017-05-08 2020-09-08 Asm Ip Holdings B.V. Methods for selectively forming a silicon nitride film on a substrate and related semiconductor device structures
US11306395B2 (en) 2017-06-28 2022-04-19 Asm Ip Holding B.V. Methods for depositing a transition metal nitride film on a substrate by atomic layer deposition and related deposition apparatus
US10685834B2 (en) 2017-07-05 2020-06-16 Asm Ip Holdings B.V. Methods for forming a silicon germanium tin layer and related semiconductor device structures
KR20190009245A (ko) 2017-07-18 2019-01-28 에이에스엠 아이피 홀딩 비.브이. 반도체 소자 구조물 형성 방법 및 관련된 반도체 소자 구조물
US11018002B2 (en) 2017-07-19 2021-05-25 Asm Ip Holding B.V. Method for selectively depositing a Group IV semiconductor and related semiconductor device structures
US11374112B2 (en) 2017-07-19 2022-06-28 Asm Ip Holding B.V. Method for depositing a group IV semiconductor and related semiconductor device structures
US10541333B2 (en) 2017-07-19 2020-01-21 Asm Ip Holding B.V. Method for depositing a group IV semiconductor and related semiconductor device structures
US10590535B2 (en) 2017-07-26 2020-03-17 Asm Ip Holdings B.V. Chemical treatment, deposition and/or infiltration apparatus and method for using the same
US10770336B2 (en) 2017-08-08 2020-09-08 Asm Ip Holding B.V. Substrate lift mechanism and reactor including same
US10692741B2 (en) 2017-08-08 2020-06-23 Asm Ip Holdings B.V. Radiation shield
US10249524B2 (en) 2017-08-09 2019-04-02 Asm Ip Holding B.V. Cassette holder assembly for a substrate cassette and holding member for use in such assembly
US11769682B2 (en) 2017-08-09 2023-09-26 Asm Ip Holding B.V. Storage apparatus for storing cassettes for substrates and processing apparatus equipped therewith
US11139191B2 (en) 2017-08-09 2021-10-05 Asm Ip Holding B.V. Storage apparatus for storing cassettes for substrates and processing apparatus equipped therewith
USD900036S1 (en) 2017-08-24 2020-10-27 Asm Ip Holding B.V. Heater electrical connector and adapter
TWI783027B (zh) 2017-08-28 2022-11-11 日商日本觸媒股份有限公司 氫化矽烷組合物
US11830730B2 (en) 2017-08-29 2023-11-28 Asm Ip Holding B.V. Layer forming method and apparatus
US11056344B2 (en) 2017-08-30 2021-07-06 Asm Ip Holding B.V. Layer forming method
US11295980B2 (en) 2017-08-30 2022-04-05 Asm Ip Holding B.V. Methods for depositing a molybdenum metal film over a dielectric surface of a substrate by a cyclical deposition process and related semiconductor device structures
KR102491945B1 (ko) 2017-08-30 2023-01-26 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
KR102401446B1 (ko) 2017-08-31 2022-05-24 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
TWI775922B (zh) 2017-08-31 2022-09-01 日商日本觸媒股份有限公司 氫化矽烷組合物
KR102630301B1 (ko) 2017-09-21 2024-01-29 에이에스엠 아이피 홀딩 비.브이. 침투성 재료의 순차 침투 합성 방법 처리 및 이를 이용하여 형성된 구조물 및 장치
US10844484B2 (en) 2017-09-22 2020-11-24 Asm Ip Holding B.V. Apparatus for dispensing a vapor phase reactant to a reaction chamber and related methods
US10658205B2 (en) 2017-09-28 2020-05-19 Asm Ip Holdings B.V. Chemical dispensing apparatus and methods for dispensing a chemical to a reaction chamber
US10403504B2 (en) 2017-10-05 2019-09-03 Asm Ip Holding B.V. Method for selectively depositing a metallic film on a substrate
US10319588B2 (en) 2017-10-10 2019-06-11 Asm Ip Holding B.V. Method for depositing a metal chalcogenide on a substrate by cyclical deposition
US10923344B2 (en) 2017-10-30 2021-02-16 Asm Ip Holding B.V. Methods for forming a semiconductor structure and related semiconductor structures
KR102443047B1 (ko) 2017-11-16 2022-09-14 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치 방법 및 그에 의해 제조된 장치
US10910262B2 (en) 2017-11-16 2021-02-02 Asm Ip Holding B.V. Method of selectively depositing a capping layer structure on a semiconductor device structure
US11022879B2 (en) 2017-11-24 2021-06-01 Asm Ip Holding B.V. Method of forming an enhanced unexposed photoresist layer
CN111316417B (zh) 2017-11-27 2023-12-22 阿斯莫Ip控股公司 与批式炉偕同使用的用于储存晶圆匣的储存装置
US11639811B2 (en) 2017-11-27 2023-05-02 Asm Ip Holding B.V. Apparatus including a clean mini environment
US10872771B2 (en) 2018-01-16 2020-12-22 Asm Ip Holding B. V. Method for depositing a material film on a substrate within a reaction chamber by a cyclical deposition process and related device structures
US11482412B2 (en) 2018-01-19 2022-10-25 Asm Ip Holding B.V. Method for depositing a gap-fill layer by plasma-assisted deposition
TWI799494B (zh) 2018-01-19 2023-04-21 荷蘭商Asm 智慧財產控股公司 沈積方法
USD903477S1 (en) 2018-01-24 2020-12-01 Asm Ip Holdings B.V. Metal clamp
US11018047B2 (en) 2018-01-25 2021-05-25 Asm Ip Holding B.V. Hybrid lift pin
USD880437S1 (en) 2018-02-01 2020-04-07 Asm Ip Holding B.V. Gas supply plate for semiconductor manufacturing apparatus
US11081345B2 (en) 2018-02-06 2021-08-03 Asm Ip Holding B.V. Method of post-deposition treatment for silicon oxide film
US10896820B2 (en) 2018-02-14 2021-01-19 Asm Ip Holding B.V. Method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process
WO2019158960A1 (fr) 2018-02-14 2019-08-22 Asm Ip Holding B.V. Procédé de dépôt d'un film contenant du ruthénium sur un substrat par un processus de dépôt cyclique
US10731249B2 (en) 2018-02-15 2020-08-04 Asm Ip Holding B.V. Method of forming a transition metal containing film on a substrate by a cyclical deposition process, a method for supplying a transition metal halide compound to a reaction chamber, and related vapor deposition apparatus
KR102636427B1 (ko) 2018-02-20 2024-02-13 에이에스엠 아이피 홀딩 비.브이. 기판 처리 방법 및 장치
US10658181B2 (en) 2018-02-20 2020-05-19 Asm Ip Holding B.V. Method of spacer-defined direct patterning in semiconductor fabrication
US10975470B2 (en) 2018-02-23 2021-04-13 Asm Ip Holding B.V. Apparatus for detecting or monitoring for a chemical precursor in a high temperature environment
US11473195B2 (en) 2018-03-01 2022-10-18 Asm Ip Holding B.V. Semiconductor processing apparatus and a method for processing a substrate
US11629406B2 (en) 2018-03-09 2023-04-18 Asm Ip Holding B.V. Semiconductor processing apparatus comprising one or more pyrometers for measuring a temperature of a substrate during transfer of the substrate
US11114283B2 (en) 2018-03-16 2021-09-07 Asm Ip Holding B.V. Reactor, system including the reactor, and methods of manufacturing and using same
WO2019182763A1 (fr) * 2018-03-20 2019-09-26 Applied Materials, Inc. Procédé de co-dopage pour application de source-drain n-mos
KR102646467B1 (ko) 2018-03-27 2024-03-11 에이에스엠 아이피 홀딩 비.브이. 기판 상에 전극을 형성하는 방법 및 전극을 포함하는 반도체 소자 구조
US10510536B2 (en) * 2018-03-29 2019-12-17 Asm Ip Holding B.V. Method of depositing a co-doped polysilicon film on a surface of a substrate within a reaction chamber
US11230766B2 (en) 2018-03-29 2022-01-25 Asm Ip Holding B.V. Substrate processing apparatus and method
US11088002B2 (en) 2018-03-29 2021-08-10 Asm Ip Holding B.V. Substrate rack and a substrate processing system and method
KR102501472B1 (ko) 2018-03-30 2023-02-20 에이에스엠 아이피 홀딩 비.브이. 기판 처리 방법
TWI811348B (zh) 2018-05-08 2023-08-11 荷蘭商Asm 智慧財產控股公司 藉由循環沉積製程於基板上沉積氧化物膜之方法及相關裝置結構
KR20190129718A (ko) 2018-05-11 2019-11-20 에이에스엠 아이피 홀딩 비.브이. 기판 상에 피도핑 금속 탄화물 막을 형성하는 방법 및 관련 반도체 소자 구조
KR102596988B1 (ko) 2018-05-28 2023-10-31 에이에스엠 아이피 홀딩 비.브이. 기판 처리 방법 및 그에 의해 제조된 장치
US11718913B2 (en) 2018-06-04 2023-08-08 Asm Ip Holding B.V. Gas distribution system and reactor system including same
US11270899B2 (en) 2018-06-04 2022-03-08 Asm Ip Holding B.V. Wafer handling chamber with moisture reduction
US11286562B2 (en) 2018-06-08 2022-03-29 Asm Ip Holding B.V. Gas-phase chemical reactor and method of using same
KR102568797B1 (ko) 2018-06-21 2023-08-21 에이에스엠 아이피 홀딩 비.브이. 기판 처리 시스템
US10797133B2 (en) 2018-06-21 2020-10-06 Asm Ip Holding B.V. Method for depositing a phosphorus doped silicon arsenide film and related semiconductor device structures
TW202405221A (zh) 2018-06-27 2024-02-01 荷蘭商Asm Ip私人控股有限公司 用於形成含金屬材料及包含含金屬材料的膜及結構之循環沉積方法
CN112292478A (zh) 2018-06-27 2021-01-29 Asm Ip私人控股有限公司 用于形成含金属的材料的循环沉积方法及包含含金属的材料的膜和结构
US10612136B2 (en) 2018-06-29 2020-04-07 ASM IP Holding, B.V. Temperature-controlled flange and reactor system including same
KR20200002519A (ko) 2018-06-29 2020-01-08 에이에스엠 아이피 홀딩 비.브이. 박막 증착 방법 및 반도체 장치의 제조 방법
US10388513B1 (en) 2018-07-03 2019-08-20 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US10755922B2 (en) 2018-07-03 2020-08-25 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US10767789B2 (en) 2018-07-16 2020-09-08 Asm Ip Holding B.V. Diaphragm valves, valve components, and methods for forming valve components
US11053591B2 (en) 2018-08-06 2021-07-06 Asm Ip Holding B.V. Multi-port gas injection system and reactor system including same
US10883175B2 (en) 2018-08-09 2021-01-05 Asm Ip Holding B.V. Vertical furnace for processing substrates and a liner for use therein
US10829852B2 (en) 2018-08-16 2020-11-10 Asm Ip Holding B.V. Gas distribution device for a wafer processing apparatus
US11430674B2 (en) 2018-08-22 2022-08-30 Asm Ip Holding B.V. Sensor array, apparatus for dispensing a vapor phase reactant to a reaction chamber and related methods
US11024523B2 (en) 2018-09-11 2021-06-01 Asm Ip Holding B.V. Substrate processing apparatus and method
KR20200030162A (ko) 2018-09-11 2020-03-20 에이에스엠 아이피 홀딩 비.브이. 박막 증착 방법
US11049751B2 (en) 2018-09-14 2021-06-29 Asm Ip Holding B.V. Cassette supply system to store and handle cassettes and processing apparatus equipped therewith
CN110970344A (zh) 2018-10-01 2020-04-07 Asm Ip控股有限公司 衬底保持设备、包含所述设备的系统及其使用方法
US11232963B2 (en) 2018-10-03 2022-01-25 Asm Ip Holding B.V. Substrate processing apparatus and method
KR102592699B1 (ko) 2018-10-08 2023-10-23 에이에스엠 아이피 홀딩 비.브이. 기판 지지 유닛 및 이를 포함하는 박막 증착 장치와 기판 처리 장치
US10847365B2 (en) 2018-10-11 2020-11-24 Asm Ip Holding B.V. Method of forming conformal silicon carbide film by cyclic CVD
US10811256B2 (en) 2018-10-16 2020-10-20 Asm Ip Holding B.V. Method for etching a carbon-containing feature
KR102605121B1 (ko) 2018-10-19 2023-11-23 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치 및 기판 처리 방법
KR102546322B1 (ko) 2018-10-19 2023-06-21 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치 및 기판 처리 방법
USD948463S1 (en) 2018-10-24 2022-04-12 Asm Ip Holding B.V. Susceptor for semiconductor substrate supporting apparatus
US11087997B2 (en) 2018-10-31 2021-08-10 Asm Ip Holding B.V. Substrate processing apparatus for processing substrates
KR20200051105A (ko) 2018-11-02 2020-05-13 에이에스엠 아이피 홀딩 비.브이. 기판 지지 유닛 및 이를 포함하는 기판 처리 장치
US11572620B2 (en) 2018-11-06 2023-02-07 Asm Ip Holding B.V. Methods for selectively depositing an amorphous silicon film on a substrate
US11031242B2 (en) * 2018-11-07 2021-06-08 Asm Ip Holding B.V. Methods for depositing a boron doped silicon germanium film
US10818758B2 (en) 2018-11-16 2020-10-27 Asm Ip Holding B.V. Methods for forming a metal silicate film on a substrate in a reaction chamber and related semiconductor device structures
US10847366B2 (en) 2018-11-16 2020-11-24 Asm Ip Holding B.V. Methods for depositing a transition metal chalcogenide film on a substrate by a cyclical deposition process
US10559458B1 (en) 2018-11-26 2020-02-11 Asm Ip Holding B.V. Method of forming oxynitride film
US11217444B2 (en) 2018-11-30 2022-01-04 Asm Ip Holding B.V. Method for forming an ultraviolet radiation responsive metal oxide-containing film
KR102636428B1 (ko) 2018-12-04 2024-02-13 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치를 세정하는 방법
US11158513B2 (en) 2018-12-13 2021-10-26 Asm Ip Holding B.V. Methods for forming a rhenium-containing film on a substrate by a cyclical deposition process and related semiconductor device structures
TW202037745A (zh) 2018-12-14 2020-10-16 荷蘭商Asm Ip私人控股有限公司 形成裝置結構之方法、其所形成之結構及施行其之系統
TW202405220A (zh) 2019-01-17 2024-02-01 荷蘭商Asm Ip 私人控股有限公司 藉由循環沈積製程於基板上形成含過渡金屬膜之方法
KR20200091543A (ko) 2019-01-22 2020-07-31 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
CN111524788B (zh) 2019-02-01 2023-11-24 Asm Ip私人控股有限公司 氧化硅的拓扑选择性膜形成的方法
KR20200102357A (ko) 2019-02-20 2020-08-31 에이에스엠 아이피 홀딩 비.브이. 3-d nand 응용의 플러그 충진체 증착용 장치 및 방법
JP2020136678A (ja) 2019-02-20 2020-08-31 エーエスエム・アイピー・ホールディング・ベー・フェー 基材表面内に形成された凹部を充填するための方法および装置
TW202104632A (zh) 2019-02-20 2021-02-01 荷蘭商Asm Ip私人控股有限公司 用來填充形成於基材表面內之凹部的循環沉積方法及設備
KR102626263B1 (ko) 2019-02-20 2024-01-16 에이에스엠 아이피 홀딩 비.브이. 처리 단계를 포함하는 주기적 증착 방법 및 이를 위한 장치
JP2020133004A (ja) 2019-02-22 2020-08-31 エーエスエム・アイピー・ホールディング・ベー・フェー 基材を処理するための基材処理装置および方法
KR20200108243A (ko) 2019-03-08 2020-09-17 에이에스엠 아이피 홀딩 비.브이. SiOC 층을 포함한 구조체 및 이의 형성 방법
KR20200108248A (ko) 2019-03-08 2020-09-17 에이에스엠 아이피 홀딩 비.브이. SiOCN 층을 포함한 구조체 및 이의 형성 방법
KR20200108242A (ko) 2019-03-08 2020-09-17 에이에스엠 아이피 홀딩 비.브이. 실리콘 질화물 층을 선택적으로 증착하는 방법, 및 선택적으로 증착된 실리콘 질화물 층을 포함하는 구조체
JP2020167398A (ja) 2019-03-28 2020-10-08 エーエスエム・アイピー・ホールディング・ベー・フェー ドアオープナーおよびドアオープナーが提供される基材処理装置
KR20200116855A (ko) 2019-04-01 2020-10-13 에이에스엠 아이피 홀딩 비.브이. 반도체 소자를 제조하는 방법
US11447864B2 (en) 2019-04-19 2022-09-20 Asm Ip Holding B.V. Layer forming method and apparatus
KR20200125453A (ko) 2019-04-24 2020-11-04 에이에스엠 아이피 홀딩 비.브이. 기상 반응기 시스템 및 이를 사용하는 방법
KR20200130118A (ko) 2019-05-07 2020-11-18 에이에스엠 아이피 홀딩 비.브이. 비정질 탄소 중합체 막을 개질하는 방법
KR20200130121A (ko) 2019-05-07 2020-11-18 에이에스엠 아이피 홀딩 비.브이. 딥 튜브가 있는 화학물질 공급원 용기
KR20200130652A (ko) 2019-05-10 2020-11-19 에이에스엠 아이피 홀딩 비.브이. 표면 상에 재료를 증착하는 방법 및 본 방법에 따라 형성된 구조
JP2020188255A (ja) 2019-05-16 2020-11-19 エーエスエム アイピー ホールディング ビー.ブイ. ウェハボートハンドリング装置、縦型バッチ炉および方法
JP2020188254A (ja) 2019-05-16 2020-11-19 エーエスエム アイピー ホールディング ビー.ブイ. ウェハボートハンドリング装置、縦型バッチ炉および方法
USD975665S1 (en) 2019-05-17 2023-01-17 Asm Ip Holding B.V. Susceptor shaft
USD947913S1 (en) 2019-05-17 2022-04-05 Asm Ip Holding B.V. Susceptor shaft
USD935572S1 (en) 2019-05-24 2021-11-09 Asm Ip Holding B.V. Gas channel plate
USD922229S1 (en) 2019-06-05 2021-06-15 Asm Ip Holding B.V. Device for controlling a temperature of a gas supply unit
KR20200141002A (ko) 2019-06-06 2020-12-17 에이에스엠 아이피 홀딩 비.브이. 배기 가스 분석을 포함한 기상 반응기 시스템을 사용하는 방법
KR20200143254A (ko) 2019-06-11 2020-12-23 에이에스엠 아이피 홀딩 비.브이. 개질 가스를 사용하여 전자 구조를 형성하는 방법, 상기 방법을 수행하기 위한 시스템, 및 상기 방법을 사용하여 형성되는 구조
USD944946S1 (en) 2019-06-14 2022-03-01 Asm Ip Holding B.V. Shower plate
USD931978S1 (en) 2019-06-27 2021-09-28 Asm Ip Holding B.V. Showerhead vacuum transport
KR20210005515A (ko) 2019-07-03 2021-01-14 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치용 온도 제어 조립체 및 이를 사용하는 방법
JP2021015791A (ja) 2019-07-09 2021-02-12 エーエスエム アイピー ホールディング ビー.ブイ. 同軸導波管を用いたプラズマ装置、基板処理方法
CN112216646A (zh) 2019-07-10 2021-01-12 Asm Ip私人控股有限公司 基板支撑组件及包括其的基板处理装置
KR20210010307A (ko) 2019-07-16 2021-01-27 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
KR20210010820A (ko) 2019-07-17 2021-01-28 에이에스엠 아이피 홀딩 비.브이. 실리콘 게르마늄 구조를 형성하는 방법
KR20210010816A (ko) 2019-07-17 2021-01-28 에이에스엠 아이피 홀딩 비.브이. 라디칼 보조 점화 플라즈마 시스템 및 방법
US11643724B2 (en) 2019-07-18 2023-05-09 Asm Ip Holding B.V. Method of forming structures using a neutral beam
CN112242296A (zh) 2019-07-19 2021-01-19 Asm Ip私人控股有限公司 形成拓扑受控的无定形碳聚合物膜的方法
CN112309843A (zh) 2019-07-29 2021-02-02 Asm Ip私人控股有限公司 实现高掺杂剂掺入的选择性沉积方法
CN112309899A (zh) 2019-07-30 2021-02-02 Asm Ip私人控股有限公司 基板处理设备
CN112309900A (zh) 2019-07-30 2021-02-02 Asm Ip私人控股有限公司 基板处理设备
US11587814B2 (en) 2019-07-31 2023-02-21 Asm Ip Holding B.V. Vertical batch furnace assembly
US11227782B2 (en) 2019-07-31 2022-01-18 Asm Ip Holding B.V. Vertical batch furnace assembly
US11587815B2 (en) 2019-07-31 2023-02-21 Asm Ip Holding B.V. Vertical batch furnace assembly
CN112323048B (zh) 2019-08-05 2024-02-09 Asm Ip私人控股有限公司 用于化学源容器的液位传感器
USD965044S1 (en) 2019-08-19 2022-09-27 Asm Ip Holding B.V. Susceptor shaft
USD965524S1 (en) 2019-08-19 2022-10-04 Asm Ip Holding B.V. Susceptor support
JP2021031769A (ja) 2019-08-21 2021-03-01 エーエスエム アイピー ホールディング ビー.ブイ. 成膜原料混合ガス生成装置及び成膜装置
KR20210024423A (ko) 2019-08-22 2021-03-05 에이에스엠 아이피 홀딩 비.브이. 홀을 구비한 구조체를 형성하기 위한 방법
USD940837S1 (en) 2019-08-22 2022-01-11 Asm Ip Holding B.V. Electrode
USD949319S1 (en) 2019-08-22 2022-04-19 Asm Ip Holding B.V. Exhaust duct
USD979506S1 (en) 2019-08-22 2023-02-28 Asm Ip Holding B.V. Insulator
USD930782S1 (en) 2019-08-22 2021-09-14 Asm Ip Holding B.V. Gas distributor
KR20210024420A (ko) 2019-08-23 2021-03-05 에이에스엠 아이피 홀딩 비.브이. 비스(디에틸아미노)실란을 사용하여 peald에 의해 개선된 품질을 갖는 실리콘 산화물 막을 증착하기 위한 방법
US11286558B2 (en) 2019-08-23 2022-03-29 Asm Ip Holding B.V. Methods for depositing a molybdenum nitride film on a surface of a substrate by a cyclical deposition process and related semiconductor device structures including a molybdenum nitride film
KR20210029090A (ko) 2019-09-04 2021-03-15 에이에스엠 아이피 홀딩 비.브이. 희생 캡핑 층을 이용한 선택적 증착 방법
KR20210029663A (ko) 2019-09-05 2021-03-16 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
US11562901B2 (en) 2019-09-25 2023-01-24 Asm Ip Holding B.V. Substrate processing method
CN112593212B (zh) 2019-10-02 2023-12-22 Asm Ip私人控股有限公司 通过循环等离子体增强沉积工艺形成拓扑选择性氧化硅膜的方法
TW202129060A (zh) 2019-10-08 2021-08-01 荷蘭商Asm Ip控股公司 基板處理裝置、及基板處理方法
KR20210043460A (ko) 2019-10-10 2021-04-21 에이에스엠 아이피 홀딩 비.브이. 포토레지스트 하부층을 형성하기 위한 방법 및 이를 포함한 구조체
KR20210045930A (ko) 2019-10-16 2021-04-27 에이에스엠 아이피 홀딩 비.브이. 실리콘 산화물의 토폴로지-선택적 막의 형성 방법
US11637014B2 (en) 2019-10-17 2023-04-25 Asm Ip Holding B.V. Methods for selective deposition of doped semiconductor material
KR20210047808A (ko) 2019-10-21 2021-04-30 에이에스엠 아이피 홀딩 비.브이. 막을 선택적으로 에칭하기 위한 장치 및 방법
KR20210050453A (ko) 2019-10-25 2021-05-07 에이에스엠 아이피 홀딩 비.브이. 기판 표면 상의 갭 피처를 충진하는 방법 및 이와 관련된 반도체 소자 구조
US11646205B2 (en) 2019-10-29 2023-05-09 Asm Ip Holding B.V. Methods of selectively forming n-type doped material on a surface, systems for selectively forming n-type doped material, and structures formed using same
KR20210054983A (ko) 2019-11-05 2021-05-14 에이에스엠 아이피 홀딩 비.브이. 도핑된 반도체 층을 갖는 구조체 및 이를 형성하기 위한 방법 및 시스템
US11501968B2 (en) 2019-11-15 2022-11-15 Asm Ip Holding B.V. Method for providing a semiconductor device with silicon filled gaps
KR20210062561A (ko) 2019-11-20 2021-05-31 에이에스엠 아이피 홀딩 비.브이. 기판의 표면 상에 탄소 함유 물질을 증착하는 방법, 상기 방법을 사용하여 형성된 구조물, 및 상기 구조물을 형성하기 위한 시스템
US11450529B2 (en) 2019-11-26 2022-09-20 Asm Ip Holding B.V. Methods for selectively forming a target film on a substrate comprising a first dielectric surface and a second metallic surface
CN112951697A (zh) 2019-11-26 2021-06-11 Asm Ip私人控股有限公司 基板处理设备
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60242612A (ja) * 1984-05-16 1985-12-02 Canon Inc 堆積膜の形成方法
EP0231660A2 (fr) * 1985-12-28 1987-08-12 Canon Kabushiki Kaisha Méthode de fabrication d'un dispositif électronique comportant une structure à multicouche
US20080138964A1 (en) * 2006-12-12 2008-06-12 Zhiyuan Ye Formation of Epitaxial Layer Containing Silicon and Carbon
US20090085095A1 (en) * 2007-10-01 2009-04-02 Arvind Kamath Profile Engineered Thin Film Devices and Structures

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06151801A (ja) * 1992-11-13 1994-05-31 Canon Inc 光電変換装置及び光電変換装置の製造方法
US5686734A (en) * 1993-01-22 1997-11-11 Canon Kabushiki Kaisha Thin film semiconductor device and photoelectric conversion device using the thin film semiconductor device
JP3745959B2 (ja) * 2000-12-28 2006-02-15 セイコーエプソン株式会社 シリコン薄膜パターンの形成方法
US7943531B2 (en) * 2007-10-22 2011-05-17 Applied Materials, Inc. Methods for forming a silicon oxide layer over a substrate
US20090242019A1 (en) * 2007-12-19 2009-10-01 Silexos, Inc Method to create high efficiency, low cost polysilicon or microcrystalline solar cell on flexible substrates using multilayer high speed inkjet printing and, rapid annealing and light trapping
US20130022745A1 (en) * 2009-08-14 2013-01-24 American Air Liquide, Inc. Silane blend for thin film vapor deposition

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60242612A (ja) * 1984-05-16 1985-12-02 Canon Inc 堆積膜の形成方法
EP0231660A2 (fr) * 1985-12-28 1987-08-12 Canon Kabushiki Kaisha Méthode de fabrication d'un dispositif électronique comportant une structure à multicouche
US20080138964A1 (en) * 2006-12-12 2008-06-12 Zhiyuan Ye Formation of Epitaxial Layer Containing Silicon and Carbon
US20090085095A1 (en) * 2007-10-01 2009-04-02 Arvind Kamath Profile Engineered Thin Film Devices and Structures

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
KONSTANTIN POKHODNYA ET AL: "Comparative study of low-temperature PECVD Of amorphous silicon using mono-, di-, trisilane and cyclohexasilane", PHOTOVOLTAIC SPECIALISTS CONFERENCE (PVSC), 2009 34TH IEEE, IEEE, PISCATAWAY, NJ, USA, 7 June 2009 (2009-06-07), pages 1758-1760, XP031626730, ISBN: 978-1-4244-2949-3 *
See also references of WO2012002995A2 *

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