Classifications

• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K3/00—Apparatus or processes for manufacturing printed circuits
  • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
  • H01L21/4814—Conductive parts
  • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation

Definitions

• the present invention relates to a manufacturing method of wiring circuit board having a ceramic substrate, and a wiring circuit board.
• a wiring circuit board having a ceramic substrate is manufactured by a method comprising a step of applying a photosensitive conductor paste on the surface of a ceramic substrate made from a ceramic green sheet , and a step of processing the applied photosensitive conductor layer by photolithography and forming a circuit pattern.
• the processing by photolithography consists of exposure and development by using a photo mask.
• the invention presents a manufacturing method of a wiring circuit board for achieving a wiring circuit pattern of such fine line, and a wiring circuit board.
• a manufacturing method of wiring circuit board of the invention comprises: (a) a step of fabricating a ceramic substrate,
• a circuit board of the invention comprises a ceramic substrate having surface roughness Ra of about 0.5 ⁇ m or less , and a wiring pattern formed on the surface of the ceramic substrate by photolithography.
• Ra is the value calculated in the formula:
• FIG. 1 is an explanatory diagram showing the manufacturing process of a manufacturing method of wiring circuit board in an embodiment of the invention.
• Fig. 2 shows an example of roughness curve on the surface of a ceramic substrate in the manufacturing method of wiring circuit board in the embodiment of the invention.
• Fig. 3 is a sectional view of a wiring circuit board in an embodiment of the invention. Best Mode for Carrying Out the Invention
• the ceramic substrate is fabricated by sintering ceramic particles, it is found out that the surface of the ceramic substrate has fine asperities, and that these asperities are disturbing minimization of line width of wiring pattern. Accordingly, in order to form a wiring pattern of a fine line width on the surface of ceramic substrate, it is found important to define the degree of surface roughness of the ceramic substrate, important to polish to have a smaller surface roughness , and important to polish so that Ra as the degree of surface roughness may be 0.5 ⁇ m or less. As a result, the present invention is completed.
• the manufacturing method of wiring circuit board of the invention comprises:
• the circuit board of the invention comprises a ceramic substrate having surface roughness Ra of about 0.5 ⁇ m or less , and a wiring pattern formed on the surface of the ceramic substrate by photolithography.
• the step of forming the photosensitive conductor layer includes a step of applying a photosensitive conductor paste on the surface of the ceramic substrate, and a step of drying the photosensitive conductor paste.
• the photolithography process includes a step of exposing the photosensitive conductor layer through a photo mask, and a step of developing the exposed photosensitive conductor layer and removing the unexposed region.
• the surface of the ceramic substrate is polished by using a powder abrasive having a mean particle size in a range of about 0.1 ⁇ m to about
• the wiring pattern has a fine line with a line width of about 40 ⁇ m or less.
• the ceramic substrate is manufactured in the process of baking a ceramic green sheet having ceramic powder and binder.
• the ceramic substrate is a sinter of a ceramic green sheet having ceramic powder and binder.
• the wiring pattern obtained by the photolithography is a pattern of photosensitive conductor layer formed by exposing and developing the photosensitive conductor layer through a photo mask, by placing the photosensitive conductor layer on the surface of the ceramic substrate. That is, in the manufacturing method of the wiring circuit board for obtaining a wiring circuit on a ceramic substrate, by applying a photo-sensitive conductor paste on the surface of a ceramic substrate, printing a wiring circuit pattern on this applied layer, and exposing and developing, it is characterized by polishing the surface of the ceramic substrate so that the roughness Ra may be 0.5 ⁇ m or less before applying the paste.
• Fig. 1 shows the manufacturing process of a manufacturing method of a wiring circuit board in an embodiment in the invention.
• a ceramic substrate 2 is manufactured in the same method as in the prior art, and its example is described below.
• Ceramic powder, binder resin, plasticizer, and solvent are kneaded, and a slurry is prepared.
• the ceramic powder is a mixture of about 45 to about 60 wt.% of inorganic powder with mean particle size of about 0.5 to about 1.5 ⁇ m, and about 40 to about 55 wt.% of alumina powder with mean particle size of about 1.0 to about 2. O ⁇ m.
• the inorganic powder is a compound powder containing CaO, A1 2 0 3 , si0 2 , B 2 0 3 , PbO, etc.
• binder resin include polyvinyl butyral resin, methacrylic acid resin, and other resin materials.
• the plasticizer any ordinary plasticizer may be used such as dibutyl phthalate.
• the solvent toluene, methyl ethyl ketone, or the like may be used.
• a ceramic green sheet 1 of about 0.1 to about 0.3 mm in thickness is fabricated.
• This ceramic green sheet 1 is cut to a vertical length of 100 to 250 mm and a lateral length of 100 to 250 mm.
• an internal circuit is placed on the surface of this ceramic green sheet 1.
• This ceramic green sheet 1 is laminated in multiple layers, pressed, and baked for 5 to 15 minutes at temperature of 880 to 950 °C .
• a ceramic substrate 2 is fabricated.
• the surface roughness Ra of thus fabricated ceramic substrate 2 is about 2.5 to about 5.0 ⁇ m.
• the surface 2b of the obtained ceramic substrate 2 is polished until the surface roughness Ra becomes 0.5 ⁇ m or less.
• the surface roughness Ra is measured and calculated as follows .
• the roughness curve of the surface of the ceramic substrate is measured.
• the polishing method of the surface of ceramic surface is not particularly limited, but the following method is an example.
• the surface is polished to surface roughness Ra of 0.5 ⁇ m or less.
• the abrasive fine particles of A1 2 0 3 , SiC or the like may be used.
• the mean particle size of the abrasive is preferred to be about 0.5 to about 10 ⁇ m.
• the grinding device lapping device or polishing device may be used.
• a photosensitive conductor paste 3 is applied on the polished ceramic substrate 2a.
• an ordinary application method is employed.
• the spin coat method, roll transfer method, or screen printing method may be employed.
• the screen printing method is preferred.
• the photosensitive conductor paste is not particularly limited, but, for example, Ag compound photo- sensitive conductor paste, Au compound photosensitive conductor paste, or Cu compound photosensitive conductor paste may be used.
• the applied paste is dried at temperature of about 80 to about 100 °C.
• a photosensitive conductor layer 3a is placed on the surface of the ceramic substrate 2a.
• the photosensitive conductor layer 3a is processed by photolithography.
• Ultraviolet rays (UV rays) are passed through a photo mask 4 having a specified wiring circuit pattern to expose the photosensitive conductor layer 3a.
• the wavelength of ultraviolet rays is preferred to be about 350 to about 450 nm, and the exposure dose is preferred to be about 400 to about 1200 mJ.
• the exposed photosensitive conductor layer 3a is developed.
• the developing device for example, an ordinary spray type developing device is used.
• the developing solution is sprayed over the exposed surface of the photosensitive conductor layer 3a, and by this spray, the unexposed portion of the photosensitive conductor layer is dissolved and removed.
• the photosensitive conductor layer 3a is developed, and a wiring circuit pattern 3b is formed.
• the spray pressure is preferred to be about 0.2 to 0.8 kg/cm 2 .
• As the developing solution for example, an aqueous solution of sodium carbonate of about 0.4 to about 1.0% is used.
• the ceramic substrate 2 having the developed wiring pattern 3b is baked for about 3 to 7 minutes at temperature of about 750 to 850 °C (preferably 780 to 820°C).
• a wiring circuit board 5 having the wiring circuit pattern 3b is fabricated.
• the surface roughness Ra of the ceramic substrate 2a is preferred to be about 0.5 ⁇ m or less . If the surface roughness Ra exceeds about 0.5 ⁇ m, it is not possible to form stably the wiring circuit pattern having a fine line of 40 ⁇ m or less.
• a ceramic green sheet 1 was fabricated. From this ceramic green sheet 1 , a glass ceramic substrate 2 of Al 2 ⁇ 3 -Si ⁇ 2 -B 2 ⁇ 3 -PbO system was fabricated.
• the surface of the ceramic substrate 2 was polished by a grinding device (lapping device 9B- 5L-IV or polishing device 9B-5P-IV, Speedfam) together with abrasive WA-#2000 or Polypla 700 (Fujimi Abrasive Industries, mean particle size 1.0 to 7.0 ⁇ m) .
• a grinding device lapping device 9B- 5L-IV or polishing device 9B-5P-IV, Speedfam
• abrasive WA-#2000 or Polypla 700 Fejimi Abrasive Industries, mean particle size 1.0 to 7.0 ⁇ m
• a first ceramic substrate 2a was obtained.
• the surface roughness Ra of this first ceramic substrate 2a was 0.5 ⁇ m.
• the ceramic substrate 2 fabricated in the same manner was polished, and a second ceramic substrate 2a having surface roughness Ra of 0.38 was obtained. Similar, a third ceramic substrate 2a having surface roughness Ra of 0.25 was obtained.
• photosensitive conductor paste 3 (Ag/Pt photosensitive conductor paste K3714, Du Pont) was applied by screen printing, and dried at temperature of 80 °C . Thus, a photosensitive conductor layer 3a was obtained.
• UV rays ultraviolet rays
• This photo mask 4 is a photo mask for test having a wiring pattern forming various line widths and line intervals and designed for measuring formable line widths and line intervals.
• a developing machine SL-400 Shinwa Industrial
• a developing solution (0.4% aqueous solution of sodium carbonate) was sprayed at a spray pressure of about 0.6 kg/cm 2 on the exposed surface of the photosensitive conductor layer 3a. By this spraying, the unexposed portion of the photosensitive conductor layer was dissolved and removed.
• a wiring pattern 3b having a specified shape was formed on the surface of first ceramic substrate, second ceramic substrate and third ceramic substrate.
• a wiring pattern of fine line having a line width of about 10 ⁇ m was obtained on the first ceramic substrate. Further, in the pattern of line width of about 10 ⁇ m or more, a fine line width was obtained.
• a wiring pattern of fine line having a line width of about 7 ⁇ m was obtained, and also in the pattern of line width of about 7 ⁇ m or more, a fine line width was obtained.
• a wiring pattern of fine line having a line width of about 5 ⁇ m was obtained, and also in the pattern of line width of about 5 ⁇ m or more, a fine line width was obtained.
• These fine lines are fine lines having a continuous and constant width. In these wiring patterns, there was no defect such as shorting between fine lines or disconnection.
• wiring patterns were formed by varying the exposure dose, spray pressure, concentration of developing solution, other exposure conditions , developing conditions , and baking conditions.
• the exposure dose was changed in a range from bout 400 mJ to about 1200 mJ.
• the spray pressure was changed in a range from about 0.2 kg/cm to about 0.8 kg/cm .
• the aqueous solution of sodium carbonate as developing solution was changed in the concentration in a range from about 0.4% to about 1.0%.
• the baking condition of the developed ceramic substrate was changed in temperature in a range from about 780°C to about 820°C, and in the time from bout 3 minutes to about 7 minutes.
• the photosensitive conductor paste 3 was same as the paste 3 above.
• the surface of the ceramic substrate 2 was polished to surface roughness Ra of 2.0 ⁇ m.
• the surface of other ceramic substrate 2 was polished to surface roughness Ra of 1.1 ⁇ m.
• the surface of a different ceramic substrate 2 was polished to surface roughness of 0.7 ⁇ m.
• a fourth comparative ceramic substrate 2a having surface roughness Ra of 2.0 ⁇ m, a fifth comparative ceramic substrate 2a having surface roughness Ra of 1.1 ⁇ m, and a sixth comparative ceramic substrate 2a having surface roughness Ra of 0.7 ⁇ m were prepared.
• wiring patterns 3b were formed in the same process as in the exemplary embodiments.
• a wiring pattern of fine line having a line width of about 45 ⁇ m were obtained, but in the pattern of line width of about 45 ⁇ m or less, fine line having a constant width was not obtained. In the pattern of line width of about 45 ⁇ m or less, shorting, disconnection or other defect was noted.
• a wiring pattern of fine line having a line width of about 30 ⁇ m were obtained, but in the pattern of line width of about 30 ⁇ m or less, fine line having a constant width was not obtained. In the pattern of line width of about 30 ⁇ m or less, shorting, disconnection or other defect was noted.
• wiring patterns were formed by varying the exposure dose. spray pressure, concentration of developing solution, other exposure conditions, developing conditions, and baking conditions.
• a wiring pattern of fine line having a line width of about 40 ⁇ m or less can be formed on a ceramic substrate, and a wiring pattern of such fine line can be formed stably. As a result, a circuit board of high density and high precision is obtained.

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• Engineering & Computer Science (AREA)
• Manufacturing & Machinery (AREA)
• Microelectronics & Electronic Packaging (AREA)
• Ceramic Engineering (AREA)
• Physics & Mathematics (AREA)
• Condensed Matter Physics & Semiconductors (AREA)
• General Physics & Mathematics (AREA)
• Computer Hardware Design (AREA)
• Power Engineering (AREA)
• Manufacturing Of Printed Wiring (AREA)
• Manufacturing Of Printed Circuit Boards (AREA)
• Devices For Post-Treatments, Processing, Supply, Discharge, And Other Processes (AREA)
• Production Of Multi-Layered Print Wiring Board (AREA)

Applications Claiming Priority (3)

Publications (1)

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• 1998
  • 1998-10-07 JP JP10285246A patent/JP2000114691A/ja active Pending
• 1999
  • 1999-09-27 TW TW088116532A patent/TW443082B/zh not_active IP Right Cessation
  • 1999-10-07 KR KR1020007006016A patent/KR20010032727A/ko not_active Application Discontinuation
  • 1999-10-07 EP EP99970262A patent/EP1038418A1/en not_active Withdrawn
  • 1999-10-07 CN CN99801769A patent/CN1287771A/zh active Pending
  • 1999-10-07 WO PCT/JP1999/005531 patent/WO2000021345A1/en not_active Application Discontinuation
  • 1999-10-07 ID IDW20001076A patent/ID24661A/id unknown

Non-Patent Citations (1)

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