EP0655837A3 - Gate-Treiber-Verfahren für einen bidirektional blockierenden lateralen MOSFET. - Google Patents

Gate-Treiber-Verfahren für einen bidirektional blockierenden lateralen MOSFET. Download PDF

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Publication number
EP0655837A3
EP0655837A3 EP94308841A EP94308841A EP0655837A3 EP 0655837 A3 EP0655837 A3 EP 0655837A3 EP 94308841 A EP94308841 A EP 94308841A EP 94308841 A EP94308841 A EP 94308841A EP 0655837 A3 EP0655837 A3 EP 0655837A3
Authority
EP
European Patent Office
Prior art keywords
gate drive
lateral mosfet
drive technique
bidirectional blocking
blocking lateral
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP94308841A
Other languages
English (en)
French (fr)
Other versions
EP0655837B1 (de
EP0655837A2 (de
Inventor
Richard K Williams
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Vishay Siliconix Inc
Original Assignee
Siliconix Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siliconix Inc filed Critical Siliconix Inc
Publication of EP0655837A2 publication Critical patent/EP0655837A2/de
Publication of EP0655837A3 publication Critical patent/EP0655837A3/de
Application granted granted Critical
Publication of EP0655837B1 publication Critical patent/EP0655837B1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/107—Substrate region of field-effect devices
    • H01L29/1075—Substrate region of field-effect devices of field-effect transistors
    • H01L29/1079—Substrate region of field-effect devices of field-effect transistors with insulated gate
    • H01L29/1087—Substrate region of field-effect devices of field-effect transistors with insulated gate characterised by the contact structure of the substrate region, e.g. for controlling or preventing bipolar effect
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/901—MOSFET substrate bias

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electronic Switches (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Power Conversion In General (AREA)
EP94308841A 1993-11-30 1994-11-30 Gate-Treiberschaltung und -Verfahren für einen bidirektional blockierenden lateralen MOSFET Expired - Lifetime EP0655837B1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/160,560 US5510747A (en) 1993-11-30 1993-11-30 Gate drive technique for a bidirectional blocking lateral MOSFET
US160560 1993-11-30

Publications (3)

Publication Number Publication Date
EP0655837A2 EP0655837A2 (de) 1995-05-31
EP0655837A3 true EP0655837A3 (de) 1996-05-01
EP0655837B1 EP0655837B1 (de) 1999-03-10

Family

ID=22577394

Family Applications (1)

Application Number Title Priority Date Filing Date
EP94308841A Expired - Lifetime EP0655837B1 (de) 1993-11-30 1994-11-30 Gate-Treiberschaltung und -Verfahren für einen bidirektional blockierenden lateralen MOSFET

Country Status (4)

Country Link
US (4) US5510747A (de)
EP (1) EP0655837B1 (de)
JP (1) JP3193579B2 (de)
DE (2) DE69416944D1 (de)

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US6268242B1 (en) * 1997-12-31 2001-07-31 Richard K. Williams Method of forming vertical mosfet device having voltage clamped gate and self-aligned contact
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Also Published As

Publication number Publication date
DE69416944D1 (de) 1999-04-15
US5510747A (en) 1996-04-23
DE655837T1 (de) 1996-02-29
US5612566A (en) 1997-03-18
EP0655837B1 (de) 1999-03-10
JPH0837303A (ja) 1996-02-06
JP3193579B2 (ja) 2001-07-30
EP0655837A2 (de) 1995-05-31
US5909139A (en) 1999-06-01
US5731732A (en) 1998-03-24

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