DE69735918T2 - Verbesserungen bei oder in Bezug auf nichtflüchtige Speicheranordnungen - Google Patents
Verbesserungen bei oder in Bezug auf nichtflüchtige Speicheranordnungen Download PDFInfo
- Publication number
- DE69735918T2 DE69735918T2 DE69735918T DE69735918T DE69735918T2 DE 69735918 T2 DE69735918 T2 DE 69735918T2 DE 69735918 T DE69735918 T DE 69735918T DE 69735918 T DE69735918 T DE 69735918T DE 69735918 T2 DE69735918 T2 DE 69735918T2
- Authority
- DE
- Germany
- Prior art keywords
- voltage
- memory cells
- control gate
- column
- cell column
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3404—Convergence or correction of memory cell threshold voltages; Repair or recovery of overerased or overprogrammed cells
- G11C16/3409—Circuits or methods to recover overerased nonvolatile memory cells detected during erase verification, usually by means of a "soft" programming step
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
- G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
- G11C16/16—Circuits for erasing electrically, e.g. erase voltage switching circuits for erasing blocks, e.g. arrays, words, groups
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3404—Convergence or correction of memory cell threshold voltages; Repair or recovery of overerased or overprogrammed cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3436—Arrangements for verifying correct programming or erasure
- G11C16/344—Arrangements for verifying correct erasure or for detecting overerased cells
- G11C16/3445—Circuits or methods to verify correct erasure of nonvolatile memory cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
- G11C29/028—Detection or location of defective auxiliary circuits, e.g. defective refresh counters with adaption or trimming of parameters
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/50—Marginal testing, e.g. race, voltage or current testing
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/50—Marginal testing, e.g. race, voltage or current testing
- G11C29/50004—Marginal testing, e.g. race, voltage or current testing of threshold voltage
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
- G06F2201/81—Threshold
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/50—Marginal testing, e.g. race, voltage or current testing
- G11C2029/5006—Current
Landscapes
- Read Only Memory (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Tests Of Electronic Circuits (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US2797196P | 1996-10-08 | 1996-10-08 | |
| US27971P | 1996-10-08 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| DE69735918D1 DE69735918D1 (de) | 2006-06-29 |
| DE69735918T2 true DE69735918T2 (de) | 2007-01-11 |
Family
ID=21840832
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE69735918T Expired - Lifetime DE69735918T2 (de) | 1996-10-08 | 1997-10-08 | Verbesserungen bei oder in Bezug auf nichtflüchtige Speicheranordnungen |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US5909397A (enExample) |
| EP (1) | EP0836196B1 (enExample) |
| JP (1) | JPH10125099A (enExample) |
| DE (1) | DE69735918T2 (enExample) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4229482B2 (ja) * | 1997-10-24 | 2009-02-25 | 株式会社ルネサステクノロジ | フラッシュメモリ内蔵マイクロコンピュータ |
| KR100305032B1 (ko) * | 1999-06-22 | 2001-11-01 | 윤종용 | 반도체 메모리 장치 |
| JP4138173B2 (ja) * | 1999-08-26 | 2008-08-20 | 株式会社ルネサステクノロジ | 不揮発性半導体記憶装置およびその消去方法 |
| US6128219A (en) * | 1999-10-27 | 2000-10-03 | Stmicroelectronics, S.R.L. | Nonvolatile memory test structure and nonvolatile memory reliability test method |
| US6684173B2 (en) * | 2001-10-09 | 2004-01-27 | Micron Technology, Inc. | System and method of testing non-volatile memory cells |
| US7345918B2 (en) * | 2005-08-31 | 2008-03-18 | Micron Technology, Inc. | Selective threshold voltage verification and compaction |
| US7986553B2 (en) * | 2007-06-15 | 2011-07-26 | Micron Technology, Inc. | Programming of a solid state memory utilizing analog communication of bit patterns |
| US9711211B2 (en) | 2015-10-29 | 2017-07-18 | Sandisk Technologies Llc | Dynamic threshold voltage compaction for non-volatile memory |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04222994A (ja) * | 1990-12-26 | 1992-08-12 | Mitsubishi Electric Corp | 不揮発性半導体記憶装置 |
| US5371706A (en) * | 1992-08-20 | 1994-12-06 | Texas Instruments Incorporated | Circuit and method for sensing depletion of memory cells |
| US5428621A (en) * | 1992-09-21 | 1995-06-27 | Sundisk Corporation | Latent defect handling in EEPROM devices |
| JPH06251593A (ja) * | 1993-02-24 | 1994-09-09 | Matsushita Electron Corp | フラッシュメモリの消去あるいは書き込み制御方法 |
| US5424991A (en) * | 1993-04-01 | 1995-06-13 | Cypress Semiconductor Corporation | Floating gate nonvolatile memory with uniformly erased threshold voltage |
| US5335198A (en) * | 1993-05-06 | 1994-08-02 | Advanced Micro Devices, Inc. | Flash EEPROM array with high endurance |
| US5521867A (en) * | 1993-12-01 | 1996-05-28 | Advanced Micro Devices, Inc. | Adjustable threshold voltage conversion circuit |
| US5412603A (en) * | 1994-05-06 | 1995-05-02 | Texas Instruments Incorporated | Method and circuitry for programming floating-gate memory cell using a single low-voltage supply |
| EP0757355B1 (en) * | 1995-07-31 | 2000-04-19 | STMicroelectronics S.r.l. | Mixed parallel-dichotomic serial sensing method for sensing multiple-levels non-volatile memory cells, and sensing circuit actuating such method |
-
1997
- 1997-09-22 US US08/935,240 patent/US5909397A/en not_active Expired - Lifetime
- 1997-10-08 DE DE69735918T patent/DE69735918T2/de not_active Expired - Lifetime
- 1997-10-08 JP JP27614197A patent/JPH10125099A/ja active Pending
- 1997-10-08 EP EP97117402A patent/EP0836196B1/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH10125099A (ja) | 1998-05-15 |
| DE69735918D1 (de) | 2006-06-29 |
| EP0836196A3 (en) | 1999-06-09 |
| EP0836196B1 (en) | 2006-05-24 |
| EP0836196A2 (en) | 1998-04-15 |
| US5909397A (en) | 1999-06-01 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 8364 | No opposition during term of opposition |