DE69614787T2 - Speichermatrix mit mehrzustandsspeicherzellen - Google Patents

Speichermatrix mit mehrzustandsspeicherzellen

Info

Publication number
DE69614787T2
DE69614787T2 DE69614787T DE69614787T DE69614787T2 DE 69614787 T2 DE69614787 T2 DE 69614787T2 DE 69614787 T DE69614787 T DE 69614787T DE 69614787 T DE69614787 T DE 69614787T DE 69614787 T2 DE69614787 T2 DE 69614787T2
Authority
DE
Germany
Prior art keywords
matrix
memory
memory cells
state
state memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69614787T
Other languages
English (en)
Other versions
DE69614787D1 (de
Inventor
Manzur Gill
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Semiconductor Corp
Original Assignee
National Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by National Semiconductor Corp filed Critical National Semiconductor Corp
Publication of DE69614787D1 publication Critical patent/DE69614787D1/de
Application granted granted Critical
Publication of DE69614787T2 publication Critical patent/DE69614787T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628—Programming or writing circuits; Data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628—Programming or writing circuits; Data input circuits
    • G11C11/5635—Erasing circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5642—Sensing or reading circuits; Data output circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/24—Bit-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/18—Bit line organisation; Bit line lay-out

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Read Only Memory (AREA)
  • Non-Volatile Memory (AREA)
DE69614787T 1995-02-13 1996-02-13 Speichermatrix mit mehrzustandsspeicherzellen Expired - Fee Related DE69614787T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/387,171 US5550772A (en) 1995-02-13 1995-02-13 Memory array utilizing multi-state memory cells
PCT/US1996/002209 WO1996025742A1 (en) 1995-02-13 1996-02-13 Memory array utilizing multi-state memory cells

Publications (2)

Publication Number Publication Date
DE69614787D1 DE69614787D1 (de) 2001-10-04
DE69614787T2 true DE69614787T2 (de) 2002-05-23

Family

ID=23528782

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69614787T Expired - Fee Related DE69614787T2 (de) 1995-02-13 1996-02-13 Speichermatrix mit mehrzustandsspeicherzellen

Country Status (4)

Country Link
US (1) US5550772A (de)
EP (1) EP0755559B1 (de)
DE (1) DE69614787T2 (de)
WO (1) WO1996025742A1 (de)

Families Citing this family (28)

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US6002614A (en) * 1991-02-08 1999-12-14 Btg International Inc. Memory apparatus including programmable non-volatile multi-bit memory cell, and apparatus and method for demarcating memory states of the cell
US5218569A (en) 1991-02-08 1993-06-08 Banks Gerald J Electrically alterable non-volatile memory with n-bits per memory cell
KR100256322B1 (ko) * 1994-03-03 2000-05-15 제니 필더 파울러-노드하임 프로그래밍 및 이레이즈를 이용한 저전압 단일트랜지스터 플래쉬 이이피롬셀
US5808937A (en) * 1994-12-16 1998-09-15 National Semiconductor Corporation Self-convergent method for programming FLASH and EEPROM memory cells that moves the threshold voltage from an erased threshold voltage range to one of a plurality of programmed threshold voltage ranges
US6353554B1 (en) 1995-02-27 2002-03-05 Btg International Inc. Memory apparatus including programmable non-volatile multi-bit memory cell, and apparatus and method for demarcating memory states of the cell
US6072719A (en) * 1996-04-19 2000-06-06 Kabushiki Kaisha Toshiba Semiconductor memory device
JPH10302486A (ja) * 1996-08-30 1998-11-13 Sanyo Electric Co Ltd 半導体記憶装置
JP3204119B2 (ja) * 1996-09-30 2001-09-04 日本電気株式会社 不揮発性半導体メモリおよびそのデータ書込方法
US5862074A (en) * 1996-10-04 1999-01-19 Samsung Electronics Co., Ltd. Integrated circuit memory devices having reconfigurable nonvolatile multi-bit memory cells therein and methods of operating same
US5835406A (en) * 1996-10-24 1998-11-10 Micron Quantum Devices, Inc. Apparatus and method for selecting data bits read from a multistate memory
JP3090066B2 (ja) * 1996-10-29 2000-09-18 日本電気株式会社 多値不揮発性半導体メモリ
US5959892A (en) * 1997-08-26 1999-09-28 Macronix International Co., Ltd. Apparatus and method for programming virtual ground EPROM array cell without disturbing adjacent cells
US5973957A (en) * 1997-09-16 1999-10-26 Intel Corporation Sense amplifier comprising a preamplifier and a differential input latch for flash memories
US5910914A (en) * 1997-11-07 1999-06-08 Silicon Storage Technology, Inc. Sensing circuit for a floating gate memory device having multiple levels of storage in a cell
KR100266745B1 (ko) * 1997-12-29 2000-09-15 윤종용 멀티-비트 데이터를 저장하기 위한 반도체 메모리 장치
US6040993A (en) * 1998-02-23 2000-03-21 Macronix International Co., Ltd. Method for programming an analog/multi-level flash EEPROM
KR100299872B1 (ko) * 1998-06-29 2001-10-27 박종섭 다비트데이터기록제어회로
TW446876B (en) * 1998-08-27 2001-07-21 Sanyo Electric Co Non-volatile semiconductor memory
US6128221A (en) * 1998-09-10 2000-10-03 Taiwan Semiconductor Manufacturing Co., Ltd. Circuit and programming method for the operation of flash memories to prevent programming disturbances
FR2786910B1 (fr) * 1998-12-04 2002-11-29 St Microelectronics Sa Memoire a grille flottante multiniveau
US6215697B1 (en) * 1999-01-14 2001-04-10 Macronix International Co., Ltd. Multi-level memory cell device and method for self-converged programming
US7057935B2 (en) * 2001-08-30 2006-06-06 Micron Technology, Inc. Erase verify for non-volatile memory
US6483734B1 (en) 2001-11-26 2002-11-19 Hewlett Packard Company Memory device having memory cells capable of four states
US7177199B2 (en) * 2003-10-20 2007-02-13 Sandisk Corporation Behavior based programming of non-volatile memory
US7450433B2 (en) * 2004-12-29 2008-11-11 Sandisk Corporation Word line compensation in non-volatile memory erase operations
TWI302751B (en) * 2006-06-14 2008-11-01 Macronix Int Co Ltd Nonvolatile memory cell, mixed nonvolatile memory array and method for operation thereof
US8525561B2 (en) 2011-10-18 2013-09-03 International Business Machines Corporation Phase lock loop having high frequency CMOS programmable divider with large divide ratio
US8791728B2 (en) 2011-10-18 2014-07-29 International Business Machines Corporation High frequency CMOS programmable divider with large divide ratio

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4181980A (en) * 1978-05-15 1980-01-01 Electronic Arrays, Inc. Acquisition and storage of analog signals
DE2828855C2 (de) * 1978-06-30 1982-11-18 Siemens AG, 1000 Berlin und 8000 München Wortweise elektrisch umprogrammierbarer, nichtflüchtiger Speicher sowie Verfahren zum Löschen bzw. Einschreiben eines bzw. in einen solchen Speicher(s)
IT1224062B (it) * 1979-09-28 1990-09-26 Ates Componenti Elettron Metodo di programmazione per una memoria a semiconduttore non volatile elettricamente alterabile
US4698787A (en) * 1984-11-21 1987-10-06 Exel Microelectronics, Inc. Single transistor electrically programmable memory device and method
JPH07120720B2 (ja) * 1987-12-17 1995-12-20 三菱電機株式会社 不揮発性半導体記憶装置
US5043940A (en) * 1988-06-08 1991-08-27 Eliyahou Harari Flash EEPROM memory systems having multistate storage cells
FR2650109B1 (fr) * 1989-07-20 1993-04-02 Gemplus Card Int Circuit integre mos a tension de seuil ajustable
US5204835A (en) * 1990-06-13 1993-04-20 Waferscale Integration Inc. Eprom virtual ground array
US5187683A (en) * 1990-08-31 1993-02-16 Texas Instruments Incorporated Method for programming EEPROM memory arrays
US5218569A (en) * 1991-02-08 1993-06-08 Banks Gerald J Electrically alterable non-volatile memory with n-bits per memory cell
US5346842A (en) * 1992-02-04 1994-09-13 National Semiconductor Corporation Method of making alternate metal/source virtual ground flash EPROM cell array
US5418743A (en) * 1992-12-07 1995-05-23 Nippon Steel Corporation Method of writing into non-volatile semiconductor memory
US5477499A (en) * 1993-10-13 1995-12-19 Advanced Micro Devices, Inc. Memory architecture for a three volt flash EEPROM
US5416738A (en) * 1994-05-27 1995-05-16 Alliance Semiconductor Corporation Single transistor flash EPROM cell and method of operation

Also Published As

Publication number Publication date
DE69614787D1 (de) 2001-10-04
US5550772A (en) 1996-08-27
WO1996025742A1 (en) 1996-08-22
EP0755559B1 (de) 2001-08-29
EP0755559A1 (de) 1997-01-29

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee