DE69604929T2 - Flash-eeprom-speicher mit getrennter referenzmatix - Google Patents
Flash-eeprom-speicher mit getrennter referenzmatixInfo
- Publication number
- DE69604929T2 DE69604929T2 DE69604929T DE69604929T DE69604929T2 DE 69604929 T2 DE69604929 T2 DE 69604929T2 DE 69604929 T DE69604929 T DE 69604929T DE 69604929 T DE69604929 T DE 69604929T DE 69604929 T2 DE69604929 T2 DE 69604929T2
- Authority
- DE
- Germany
- Prior art keywords
- matix
- eeprom memory
- flash eeprom
- separate reference
- separate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3436—Arrangements for verifying correct programming or erasure
- G11C16/3468—Prevention of overerasure or overprogramming, e.g. by verifying whilst erasing or writing
- G11C16/3477—Circuits or methods to prevent overerasing of nonvolatile memory cells, e.g. by detecting onset or cessation of current flow in cells and using the detector output to terminate erasing
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/26—Sensing or reading circuits; Data output circuits
- G11C16/28—Sensing or reading circuits; Data output circuits using differential sensing or reference cells, e.g. dummy cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3436—Arrangements for verifying correct programming or erasure
- G11C16/3468—Prevention of overerasure or overprogramming, e.g. by verifying whilst erasing or writing
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
- G11C29/026—Detection or location of defective auxiliary circuits, e.g. defective refresh counters in sense amplifiers
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
- G11C29/028—Detection or location of defective auxiliary circuits, e.g. defective refresh counters with adaption or trimming of parameters
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/50—Marginal testing, e.g. race, voltage or current testing
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/50—Marginal testing, e.g. race, voltage or current testing
- G11C29/50004—Marginal testing, e.g. race, voltage or current testing of threshold voltage
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/50—Marginal testing, e.g. race, voltage or current testing
- G11C2029/5006—Current
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/543,684 US5629892A (en) | 1995-10-16 | 1995-10-16 | Flash EEPROM memory with separate reference array |
PCT/US1996/013930 WO1997015054A2 (en) | 1995-10-16 | 1996-08-30 | A flash eeprom memory with separate reference array |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69604929D1 DE69604929D1 (de) | 1999-12-02 |
DE69604929T2 true DE69604929T2 (de) | 2000-06-21 |
Family
ID=24169131
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69604929T Expired - Fee Related DE69604929T2 (de) | 1995-10-16 | 1996-08-30 | Flash-eeprom-speicher mit getrennter referenzmatix |
Country Status (6)
Country | Link |
---|---|
US (1) | US5629892A (de) |
EP (1) | EP0856188B1 (de) |
JP (1) | JP3928022B2 (de) |
KR (1) | KR100445197B1 (de) |
DE (1) | DE69604929T2 (de) |
WO (1) | WO1997015054A2 (de) |
Families Citing this family (33)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7071060B1 (en) * | 1996-02-28 | 2006-07-04 | Sandisk Corporation | EEPROM with split gate source side infection with sidewall spacers |
US6222762B1 (en) * | 1992-01-14 | 2001-04-24 | Sandisk Corporation | Multi-state memory |
JP3920943B2 (ja) * | 1996-05-10 | 2007-05-30 | 株式会社ルネサステクノロジ | 不揮発性半導体記憶装置 |
WO2004090908A1 (ja) * | 1996-06-11 | 2004-10-21 | Nobuyoshi Takeuchi | ベリファイ機能を有する不揮発性記憶装置 |
JPH10261768A (ja) * | 1997-03-18 | 1998-09-29 | Fujitsu Ltd | 半導体集積回路 |
US5859796A (en) * | 1997-12-16 | 1999-01-12 | Advanced Micro Devices, Inc. | Programming of memory cells using connected floating gate analog reference cell |
JP3346274B2 (ja) * | 1998-04-27 | 2002-11-18 | 日本電気株式会社 | 不揮発性半導体記憶装置 |
US6038169A (en) * | 1999-03-18 | 2000-03-14 | Halo Lsi Design & Device Technology, Inc. | Read reference scheme for flash memory |
US6317362B1 (en) * | 1999-07-13 | 2001-11-13 | Sanyo Electric Co., Ltd. | Semiconductor memory device |
US6212103B1 (en) * | 1999-07-28 | 2001-04-03 | Xilinx, Inc. | Method for operating flash memory |
DE60037504T2 (de) | 2000-05-31 | 2008-12-11 | Stmicroelectronics S.R.L., Agrate Brianza | Referenzzellenmatrixanordnung zum Datenlesen in einer nichtflüchtigen Speicheranordnung |
EP1160794B1 (de) | 2000-05-31 | 2008-07-23 | STMicroelectronics S.r.l. | Schaltungsanordnung zum Programmieren von Daten in Referenzzellen einer nichtflüchtigen Multibitspeicheranordnung |
US6538922B1 (en) | 2000-09-27 | 2003-03-25 | Sandisk Corporation | Writable tracking cells |
US6525966B1 (en) * | 2000-12-06 | 2003-02-25 | Advanced Micro Devices, Inc. | Method and apparatus for adjusting on-chip current reference for EEPROM sensing |
US6697283B2 (en) | 2001-01-03 | 2004-02-24 | Micron Technology, Inc. | Temperature and voltage compensated reference current generator |
US6490212B1 (en) * | 2001-07-11 | 2002-12-03 | Silicon Storage Technology, Inc. | Bitline precharge matching |
US7057935B2 (en) * | 2001-08-30 | 2006-06-06 | Micron Technology, Inc. | Erase verify for non-volatile memory |
US6654285B1 (en) * | 2002-02-27 | 2003-11-25 | Advanced Micro Devices, Inc. | Method of matching core cell and reference cell source resistances |
US7163860B1 (en) | 2003-05-06 | 2007-01-16 | Spansion Llc | Method of formation of gate stack spacer and charge storage materials having reduced hydrogen content in charge trapping dielectric flash memory device |
US7237074B2 (en) * | 2003-06-13 | 2007-06-26 | Sandisk Corporation | Tracking cells for a memory system |
US7301807B2 (en) | 2003-10-23 | 2007-11-27 | Sandisk Corporation | Writable tracking cells |
US7038948B2 (en) * | 2004-09-22 | 2006-05-02 | Spansion Llc | Read approach for multi-level virtual ground memory |
US7068204B1 (en) | 2004-09-28 | 2006-06-27 | Spansion Llc | System that facilitates reading multi-level data in non-volatile memory |
US7142456B2 (en) * | 2004-10-08 | 2006-11-28 | Lexmark International | Distributed programmed memory cells used as memory reference currents |
US7447077B2 (en) * | 2005-08-05 | 2008-11-04 | Halo Lsi, Inc. | Referencing scheme for trap memory |
US8773934B2 (en) | 2006-09-27 | 2014-07-08 | Silicon Storage Technology, Inc. | Power line compensation for flash memory sense amplifiers |
US7787282B2 (en) * | 2008-03-21 | 2010-08-31 | Micron Technology, Inc. | Sensing resistance variable memory |
US8988940B2 (en) | 2012-07-31 | 2015-03-24 | International Business Machines Corporation | Structure and method for narrowing voltage threshold distribution in non-volatile memories |
US9437257B2 (en) * | 2012-12-31 | 2016-09-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Sensing circuit, memory device and data detecting method |
US9496046B1 (en) | 2015-08-14 | 2016-11-15 | Integrated Silicon Solution, Inc. | High speed sequential read method for flash memory |
US11430516B2 (en) | 2020-04-06 | 2022-08-30 | Crossbar, Inc. | Distinct chip identifier sequence utilizing unclonable characteristics of resistive memory on a chip |
US11823739B2 (en) * | 2020-04-06 | 2023-11-21 | Crossbar, Inc. | Physically unclonable function (PUF) generation involving high side programming of bits |
US11727986B2 (en) * | 2020-04-06 | 2023-08-15 | Crossbar, Inc. | Physically unclonable function (PUF) generation involving programming of marginal bits |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3482724D1 (de) * | 1983-04-07 | 1990-08-23 | Toshiba Kawasaki Kk | Festwertspeicher. |
DE3472502D1 (en) * | 1983-09-16 | 1988-08-04 | Fujitsu Ltd | Plural-bit-per-cell read-only memory |
US5142495A (en) * | 1989-03-10 | 1992-08-25 | Intel Corporation | Variable load for margin mode |
US5172338B1 (en) * | 1989-04-13 | 1997-07-08 | Sandisk Corp | Multi-state eeprom read and write circuits and techniques |
US5077691A (en) * | 1989-10-23 | 1991-12-31 | Advanced Micro Devices, Inc. | Flash EEPROM array with negative gate voltage erase operation |
JP2853217B2 (ja) * | 1989-11-21 | 1999-02-03 | 日本電気株式会社 | 半導体メモリ |
JP3454520B2 (ja) * | 1990-11-30 | 2003-10-06 | インテル・コーポレーション | フラッシュ記憶装置の書込み状態を確認する回路及びその方法 |
US5335198A (en) * | 1993-05-06 | 1994-08-02 | Advanced Micro Devices, Inc. | Flash EEPROM array with high endurance |
EP0714546B1 (de) * | 1993-05-28 | 2000-02-02 | Macronix International Co., Ltd. | Lösch- und programmprüfungsschaltung für nichtflüchtige speicher |
JP2835272B2 (ja) * | 1993-12-21 | 1998-12-14 | 株式会社東芝 | 半導体記憶装置 |
ATE218003T1 (de) * | 1995-02-10 | 2002-06-15 | Micron Technology Inc | Schneller leseverstärker für einen flash-speicher |
-
1995
- 1995-10-16 US US08/543,684 patent/US5629892A/en not_active Expired - Lifetime
-
1996
- 1996-08-30 WO PCT/US1996/013930 patent/WO1997015054A2/en active IP Right Grant
- 1996-08-30 KR KR10-1998-0702563A patent/KR100445197B1/ko not_active IP Right Cessation
- 1996-08-30 JP JP51580197A patent/JP3928022B2/ja not_active Expired - Fee Related
- 1996-08-30 EP EP96929800A patent/EP0856188B1/de not_active Expired - Lifetime
- 1996-08-30 DE DE69604929T patent/DE69604929T2/de not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JPH11513833A (ja) | 1999-11-24 |
JP3928022B2 (ja) | 2007-06-13 |
WO1997015054A2 (en) | 1997-04-24 |
EP0856188B1 (de) | 1999-10-27 |
DE69604929D1 (de) | 1999-12-02 |
KR19990064084A (ko) | 1999-07-26 |
US5629892A (en) | 1997-05-13 |
EP0856188A2 (de) | 1998-08-05 |
KR100445197B1 (ko) | 2004-11-16 |
WO1997015054A3 (en) | 1997-07-03 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: SPANSION LLC (N.D.GES.D. STAATES DELAWARE), SU, US |
|
8339 | Ceased/non-payment of the annual fee |