DE69615512T2 - Verfahren zur Herstellung eines Bipolar-Transistors - Google Patents

Verfahren zur Herstellung eines Bipolar-Transistors

Info

Publication number
DE69615512T2
DE69615512T2 DE69615512T DE69615512T DE69615512T2 DE 69615512 T2 DE69615512 T2 DE 69615512T2 DE 69615512 T DE69615512 T DE 69615512T DE 69615512 T DE69615512 T DE 69615512T DE 69615512 T2 DE69615512 T2 DE 69615512T2
Authority
DE
Germany
Prior art keywords
manufacturing
bipolar transistor
bipolar
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69615512T
Other languages
English (en)
Other versions
DE69615512D1 (de
Inventor
Takeshi Watanabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of DE69615512D1 publication Critical patent/DE69615512D1/de
Application granted granted Critical
Publication of DE69615512T2 publication Critical patent/DE69615512T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234—Bipolar junction transistors [BJT]
    • H01L29/66272—Silicon vertical transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73—Bipolar junction transistors
    • H01L29/732—Vertical transistors
    • H01L29/7322—Vertical transistors having emitter-base and base-collector junctions leaving at the same surface of the body, e.g. planar transistor

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Bipolar Transistors (AREA)
DE69615512T 1995-12-06 1996-12-04 Verfahren zur Herstellung eines Bipolar-Transistors Expired - Fee Related DE69615512T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7344360A JP2907323B2 (ja) 1995-12-06 1995-12-06 半導体装置およびその製造方法

Publications (2)

Publication Number Publication Date
DE69615512D1 DE69615512D1 (de) 2001-10-31
DE69615512T2 true DE69615512T2 (de) 2002-05-23

Family

ID=18368641

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69615512T Expired - Fee Related DE69615512T2 (de) 1995-12-06 1996-12-04 Verfahren zur Herstellung eines Bipolar-Transistors

Country Status (6)

Country Link
US (2) US6034412A (de)
EP (1) EP0778615B1 (de)
JP (1) JP2907323B2 (de)
KR (1) KR100338014B1 (de)
DE (1) DE69615512T2 (de)
TW (1) TW315502B (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19842106A1 (de) 1998-09-08 2000-03-09 Inst Halbleiterphysik Gmbh Vertikaler Bipolartransistor und Verfahren zu seiner Herstellung
JP4945167B2 (ja) * 2006-05-12 2012-06-06 スタンレー電気株式会社 半導体発光素子の製造方法及び該製造方法により製造された半導体発光素子の実装方法
JP2019075536A (ja) * 2017-10-11 2019-05-16 株式会社村田製作所 パワーアンプモジュール

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4772566A (en) * 1987-07-01 1988-09-20 Motorola Inc. Single tub transistor means and method
JP2748420B2 (ja) * 1988-08-12 1998-05-06 ソニー株式会社 バイポーラトランジスタ及びその製造方法
JPH02153534A (ja) * 1988-12-06 1990-06-13 Toshiba Corp 半導体装置の製造方法
US5204276A (en) * 1988-12-06 1993-04-20 Kabushiki Kaisha Toshiba Method of manufacturing semiconductor device
US5001533A (en) * 1988-12-22 1991-03-19 Kabushiki Kaisha Toshiba Bipolar transistor with side wall base contacts
JPH0744186B2 (ja) * 1989-03-13 1995-05-15 株式会社東芝 半導体装置の製造方法
JPH03138946A (ja) * 1989-10-24 1991-06-13 Sony Corp 半導体装置
US5374846A (en) * 1990-08-31 1994-12-20 Nec Corporation Bipolar transistor with a particular base and collector regions
JPH04361533A (ja) * 1991-06-10 1992-12-15 Mitsubishi Electric Corp 半導体集積回路装置の製造方法
JPH0521719A (ja) * 1991-07-11 1993-01-29 Nec Corp 半導体集積回路装置
JP3039166B2 (ja) * 1992-11-12 2000-05-08 日本電気株式会社 半導体装置およびその製造方法
JP2565113B2 (ja) * 1993-11-01 1996-12-18 日本電気株式会社 半導体装置

Also Published As

Publication number Publication date
TW315502B (de) 1997-09-11
US6034412A (en) 2000-03-07
US6165860A (en) 2000-12-26
DE69615512D1 (de) 2001-10-31
EP0778615A1 (de) 1997-06-11
KR100338014B1 (ko) 2002-11-23
JPH09162192A (ja) 1997-06-20
EP0778615B1 (de) 2001-09-26
JP2907323B2 (ja) 1999-06-21

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee